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    IC chip package with directly connected leads
    6.
    发明授权
    IC chip package with directly connected leads 失效
    IC芯片封装，直接连接引线

    公开(公告)号：US06249041B1

    公开(公告)日：2001-06-19

    申请号：US09089310

    申请日：1998-06-02

    申请人： Y. Mohammed Kasem ,  Anthony C. Tsui ,  Lixiong Luo ,  Yueh-Se Ho

    发明人： Y. Mohammed Kasem ,  Anthony C. Tsui ,  Lixiong Luo ,  Yueh-Se Ho

    IPC分类号： H01L23495

    CPC分类号： H01L24/33 ,  H01L23/4951 ,  H01L23/49555 ,  H01L23/49562 ,  H01L23/49568 ,  H01L2224/32245 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012

    摘要： An improved semiconductor device is disclosed. In one embodiment, the semiconductor device includes a semiconductor chip with contact areas on the top or bottom surface. A first lead assembly, formed from a semi-rigid sheet of conductive material, has a lead assembly contact attached to one of the contact areas of the semiconductor chip. The first lead assembly also has at least one lead connected to and extending from the lead assembly contact. A second lead assembly, also formed from a semi-rigid sheet of conductive material, has a lead assembly contact attached to another one of the contact areas of the semiconductor chip. The second lead assembly also has at least one lead connected to and extending from the lead assembly contact. An encapsulant encloses the semiconductor chip, the lead assembly contact of the first lead assembly and the lead assembly contact of the second lead assembly. The semiconductor device has low electrical and thermal resistance contributions from the package due to the direct connection of the lead assemblies to the chip. The semiconductor device may be formed as either a leaded package or a leadless chip carrier package.

    摘要翻译： 公开了一种改进的半导体器件。 在一个实施例中，半导体器件包括在顶表面或底表面上具有接触区域的半导体芯片。 由半刚性导电材料片形成的第一引线组件具有连接到半导体芯片的一个接触区域的引线组件触点。 第一引线组件还具有连接到引线组件触点并从引线组件触点延伸的至少一个引线。 还由半刚性导电材料片形成的第二引线组件具有连接到半导体芯片的另一个接触区域的引线组件触点。 第二引线组件还具有连接到引线组件触点并从引线组件触点延伸的至少一个引线。 密封剂封装半导体芯片，第一引线组件的引线组件触点和第二引线组件的引线组件触点。 由于引线组件直接连接到芯片，半导体器件具有来自封装的低和低电阻贡献。 半导体器件可以形成为引线封装或无引线芯片载体封装。

    Chip scale surface mount package for semiconductor device and process of fabricating the same
    7.
    发明授权
    Chip scale surface mount package for semiconductor device and process of fabricating the same 有权
    用于半导体器件的芯片级表面贴装封装及其制造方法

    公开(公告)号：US06876061B2

    公开(公告)日：2005-04-05

    申请号：US10157584

    申请日：2002-05-28

    申请人： Felix Zandman ,  Y. Mohammed Kasem ,  Yueh-Se Ho

    发明人： Felix Zandman ,  Y. Mohammed Kasem ,  Yueh-Se Ho

    IPC分类号： H01L23/12 ,  H01L21/301 ,  H01L21/768 ,  H01L23/28 ,  H01L23/31 ,  H01L29/06 ,  H01L23/04 ,  H01L23/48 ,  H01L23/52

    CPC分类号： H01L21/76898 ,  H01L23/3107 ,  H01L23/3114 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/13091 ,  H01L2924/00

    摘要： A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate). Since no wire bonds are required, the resulting package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.

    摘要翻译： 在晶片尺寸上制造在骰子的两侧形成触点的半导体封装。 晶片的背面附着在金属板上。 分割骰子的划痕线被锯切以暴露金属板，但切口不延伸通过金属板。 可以包括多个子层的金属层形成在骰子的前侧，金属覆盖金属板的暴露部分并延伸骰子的侧边缘。 金属层的分开的部分也可以覆盖骰子正面上的连接垫。 使用与用于制造第一组锯切的刀片相比较窄的第二组锯切与第一组锯切重合。 结果，金属层保留在连接骰子（通过金属板）的前侧和前侧的骰子的侧边缘上。 由于不需要引线键合，所以产生的封装是坚固的，并且在芯片的背面和前面之间提供低电阻电连接。