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45 条记录 (耗时 0.036 秒)

    MANUFACTURING PROCESS AND APPARATUS FOR PRINTING IMPRINT ON DEFECTIVE BOARD
    4.
    发明申请
    MANUFACTURING PROCESS AND APPARATUS FOR PRINTING IMPRINT ON DEFECTIVE BOARD 审中-公开
    制造工艺和打印缺陷板上的印刷装置

    公开(公告)号：US20070263862A1

    公开(公告)日：2007-11-15

    申请号：US11465814

    申请日：2006-08-21

    申请人： Tzyy-Jang Tseng ,  Cheng-Po Yu ,  Chi-Min Chang ,  Cheng-Hung Yu

    发明人： Tzyy-Jang Tseng ,  Cheng-Po Yu ,  Chi-Min Chang ,  Cheng-Hung Yu

    IPC分类号： G09C3/08

    CPC分类号： H05K1/0269 ,  H05K3/0097 ,  H05K3/225 ,  H05K2201/09936 ,  H05K2203/013

    摘要： A manufacturing process and an apparatus for printing imprint on defective board are provided. An automatic printing device is used for replacing operator, so as to reduce manpower and to increase the correctness and veracity of defect mark printing. The manufacturing process includes the following steps: first, an image sensor captures an image of a defect mark and transmits the image to a processing unit for data processing. Next, the data is compared, and an inkjet head is notified of the correct printing position to print ink on the customer identification mark of the printed circuit board.

    摘要翻译： 提供了制造工艺和用于在缺陷板上印刷压印的装置。 使用自动打印装置来代替操作者，以减少人力和提高缺陷标记打印的正确性和真实性。 制造过程包括以下步骤：首先，图像传感器捕获缺陷标记的图像，并将图像发送到用于数据处理的处理单元。 接下来，比较数据，并且通知喷墨头正确的打印位置以在印刷电路板的客户识别标记上印刷墨水。

    Circuit board and manufacturing method thereof
    5.
    发明授权
    Circuit board and manufacturing method thereof 有权
    电路板及其制造方法

    公开(公告)号：US08294041B2

    公开(公告)日：2012-10-23

    申请号：US12170082

    申请日：2008-07-09

    申请人： Cheng-Po Yu ,  Cheng-Hung Yu

    发明人： Cheng-Po Yu ,  Cheng-Hung Yu

    IPC分类号： H05K1/11

    CPC分类号： H05K1/0231 ,  H05K1/0219 ,  H05K1/162 ,  H05K3/107 ,  H05K2201/09036 ,  H05K2201/09809 ,  Y10T29/49117

    摘要： A circuit board including a first dielectric layer having a first surface and a second surface, a first circuit layer, a second dielectric layer, and a second circuit layer is provided. At least one trench is formed on the first surface, and the first circuit layer is formed on an inside wall of the trench. In addition, the second dielectric layer is disposed in the trench, and covers the first circuit layer. The second circuit layer is disposed in the trench, and the second dielectric layer is located between the first circuit layer and the second circuit layer. A manufacturing method of the circuit board is further provided.

    摘要翻译： 提供一种电路板，包括具有第一表面和第二表面的第一介电层，第一电路层，第二电介质层和第二电路层。 在第一表面上形成至少一个沟槽，并且第一电路层形成在沟槽的内壁上。 此外，第二电介质层设置在沟槽中并覆盖第一电路层。 第二电路层设置在沟槽中，第二电介质层位于第一电路层和第二电路层之间。 还提供了电路板的制造方法。

    SELECTIVE METAL SURFACE TREATMENT PROCESS AND APPARATUS FOR CIRCUIT BOARD AND RESIST USED IN THE PROCESS
    6.
    发明申请
    SELECTIVE METAL SURFACE TREATMENT PROCESS AND APPARATUS FOR CIRCUIT BOARD AND RESIST USED IN THE PROCESS 审中-公开
    选择性金属表面处理工艺和电路板的使用方法

    公开(公告)号：US20070281388A1

    公开(公告)日：2007-12-06

    申请号：US11456213

    申请日：2006-07-10

    申请人： Cheng-Po Yu ,  Cheng-Hung Yu ,  Chi-Min Chang

    发明人： Cheng-Po Yu ,  Cheng-Hung Yu ,  Chi-Min Chang

    IPC分类号： H01L21/00 ,  H01L21/4763

    CPC分类号： H05K3/243 ,  H01L21/6715 ,  H05K3/0076 ,  H05K3/0079 ,  H05K3/28 ,  H05K2201/0391 ,  H05K2203/013 ,  H05K2203/058

    摘要： A selective metal surface treatment process of a circuit board, which has a solder mask and a multiple of selective metal treatment surface areas, wherein the solder mask covers the surface of the circuit board but exposes the selective metal surface treatment areas, is provided. The selective metal surface treatment process includes using a printhead to selectively print a resist on a selective metal surface treatment area, performing a surface treatment of the other selective metal surface treatment areas, and removing the resist. A selective metal surface treatment apparatus used for performing the selective metal surface treatment process of the circuit board is also provided. Through the present invention, unnecessary waste of the materials in the process is reduced and the processing time is shortened.

    摘要翻译： 提供具有焊接掩模和多个选择性金属处理表面积的电路板的选择性金属表面处理工艺，其中焊接掩模覆盖电路板的表面，但暴露选择性金属表面处理区域。 选择性金属表面处理方法包括使用打印头选择性地在选择性金属表面处理区域上印刷抗蚀剂，对其它选择性金属表面处理区域进行表面处理，并除去抗蚀剂。 还提供了用于执行电路板的选择性金属表面处理工艺的选择性金属表面处理装置。 通过本发明，可以减少处理过程中不必要的材料浪费，缩短处理时间。

    CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
    7.
    发明申请
    CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF 有权
    电路板及其制造方法

    公开(公告)号：US20090250247A1

    公开(公告)日：2009-10-08

    申请号：US12170082

    申请日：2008-07-09

    申请人： Cheng-Po Yu ,  Cheng-Hung Yu

    发明人： Cheng-Po Yu ,  Cheng-Hung Yu

    IPC分类号： H05K1/02 ,  H01R43/00

    CPC分类号： H05K1/0231 ,  H05K1/0219 ,  H05K1/162 ,  H05K3/107 ,  H05K2201/09036 ,  H05K2201/09809 ,  Y10T29/49117

    摘要： A circuit board including a first dielectric layer having a first surface and a second surface, a first circuit layer, a second dielectric layer, and a second circuit layer is provided. At least one trench is formed on the first surface, and the first circuit layer is formed on an inside wall of the trench. In addition, the second dielectric layer is disposed in the trench, and covers the first circuit layer. The second circuit layer is disposed in the trench, and the second dielectric layer is located between the first circuit layer and the second circuit layer. A manufacturing method of the circuit board is further provided.

    摘要翻译： 提供一种电路板，包括具有第一表面和第二表面的第一介电层，第一电路层，第二电介质层和第二电路层。 在第一表面上形成至少一个沟槽，并且第一电路层形成在沟槽的内壁上。 此外，第二电介质层设置在沟槽中并覆盖第一电路层。 第二电路层设置在沟槽中，第二电介质层位于第一电路层和第二电路层之间。 还提供了电路板的制造方法。

    Color filter array having hybrid color filters and manufacturing method thereof
    8.
    发明授权
    Color filter array having hybrid color filters and manufacturing method thereof 有权
    具有混合滤色器的滤色器阵列及其制造方法

    公开(公告)号：US08765333B2

    公开(公告)日：2014-07-01

    申请号：US13561103

    申请日：2012-07-30

    申请人： Cheng-Hung Yu

    发明人： Cheng-Hung Yu

    IPC分类号： G02B5/20 ,  G03F7/20

    CPC分类号： G02B5/201 ,  G03F7/0007

    摘要： A method for manufacturing a color filter array having hybrid color filters includes providing a high-grade photoresist and a low-grade photoresist, forming a plurality of first color filters on a substrate, and forming a plurality of second color filters and a plurality of third color filters on the substrate. The first color filters include the high-grade photoresist, and the second color filters and the third color filters include the low-grade photoresist. The high-grade photoresist of the first color filters includes a first amount of large size pigments in one unit area and the low-grade photoresists of the second color filters and the third color filters include a second amount of large size pigments in one unit area. A ratio of the second amount to the first amount is equal to or larger than 1.

    摘要翻译： 一种制造具有混合滤色器的滤色器阵列的方法，包括提供高级光致抗蚀剂和低等级光致抗蚀剂，在衬底上形成多个第一滤色器，以及形成多个第二滤色器和多个第三滤色器 基底上的滤色器。 第一滤色器包括高级光致抗蚀剂，第二滤色器和第三滤色器包括低等级光致抗蚀剂。 第一滤色器的高级光致抗蚀剂包括在一个单位面积中的第一量的大尺寸颜料和第二滤色器的低等级光致抗蚀剂和第三滤色器在一个单位面积中包括第二量的大尺寸颜料 。 第二量与第一量的比例等于或大于1。

    MULTILAYER THREE-DIMENSIONAL CIRCUIT STRUCTURE
    9.
    发明申请
    MULTILAYER THREE-DIMENSIONAL CIRCUIT STRUCTURE 审中-公开
    多层三维电路结构

    公开(公告)号：US20110253435A1

    公开(公告)日：2011-10-20

    申请号：US13166133

    申请日：2011-06-22

    申请人： Han-Pei Huang ,  Cheng-Hung Yu

    发明人： Han-Pei Huang ,  Cheng-Hung Yu

    IPC分类号： H05K1/03 ,  H05K1/11

    CPC分类号： H05K3/4644 ,  B33Y10/00 ,  B33Y80/00 ,  H05K1/0284 ,  H05K3/046 ,  H05K3/06 ,  H05K3/185 ,  H05K3/205 ,  H05K3/386 ,  H05K2201/0236 ,  H05K2201/09118 ,  H05K2203/0108 ,  H05K2203/013 ,  H05K2203/107 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

    摘要： A multilayer three-dimensional circuit structure and a manufacturing method thereof are provided in the present invention. The manufacturing method includes following steps. First, a three-dimensional insulating structure is provided. A first three-dimensional circuit structure is then formed on a surface of the three-dimensional insulating structure. Next, an insulating layer covering the first three-dimensional circuit structure is formed. Thereafter, a second three-dimensional circuit structure is formed on the insulating layer. Subsequently, at least a conductive via penetrating the insulating layer is formed for electrically connecting the second three-dimensional circuit structure and the first three-dimensional circuit structure.

    摘要翻译： 本发明提供了一种多层三维电路结构及其制造方法。 制造方法包括以下步骤。 首先，提供三维绝缘结构。 然后在三维绝缘结构的表面上形成第一三维电路结构。 接下来，形成覆盖第一三维电路结构的绝缘层。 此后，在绝缘层上形成第二三维电路结构。 随后，至少形成了穿过绝缘层的导电通孔，用于电连接第二三维电路结构和第一三维电路结构。

    METHOD OF FABRICATING IMAGE SENSOR AND REWORKING METHOD THEREOF
    10.
    发明申请
    METHOD OF FABRICATING IMAGE SENSOR AND REWORKING METHOD THEREOF 有权
    制作图像传感器的方法及其制作方法

    公开(公告)号：US20110212567A1

    公开(公告)日：2011-09-01

    申请号：US12714093

    申请日：2010-02-26

    申请人： Hsin-Ting TSAI ,  Cheng-Hung Yu ,  Chin-Kuang Liu ,  Kun-Yen Hsu

    发明人： Hsin-Ting TSAI ,  Cheng-Hung Yu ,  Chin-Kuang Liu ,  Kun-Yen Hsu

    IPC分类号： H01L31/0232 ,  H01L31/18 ,  H01L27/14

    CPC分类号： H01L27/14687 ,  H01L27/14636 ,  H01L27/14685

    摘要： A method of fabricating an image sensor device is provided. First, a substrate comprising a pixel array region and a pad region is provided. A patterned metal layer and a first planarization layer having an opening exposing the patterned metal layer in the pad region are sequentially formed on the substrate. A color filter array is formed on the first planarization layer in the pixel array region. A second planarization layer is formed to cover the color filter array and filled into the opening. A plurality of microlens is formed above the color filter array on the second planarization layer. A capping layer is conformally formed on the microlens and the second planarization layer. An etching step is performed to remove the capping layer and the second planarization layer in the opening so as to expose the patterned metal layer in the pad region.

    摘要翻译： 提供一种制造图像传感器装置的方法。 首先，提供包括像素阵列区域和衬垫区域的衬底。 图案化金属层和具有露出焊盘区域中的图案化金属层的开口的第一平坦化层依次形成在基板上。 在像素阵列区域中的第一平坦化层上形成滤色器阵列。 形成第二平坦化层以覆盖滤色器阵列并填充到开口中。 在第二平坦化层上的滤色器阵列上方形成多个微透镜。 覆盖层保形地形成在微透镜和第二平坦化层上。 执行蚀刻步骤以去除开口中的覆盖层和第二平坦化层，以暴露焊盘区域中的图案化金属层。