利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

51 条记录 (耗时 0.019 秒)

    SELECTIVE METAL SURFACE TREATMENT PROCESS AND APPARATUS FOR CIRCUIT BOARD AND RESIST USED IN THE PROCESS
    2.
    发明申请
    SELECTIVE METAL SURFACE TREATMENT PROCESS AND APPARATUS FOR CIRCUIT BOARD AND RESIST USED IN THE PROCESS 审中-公开
    选择性金属表面处理工艺和电路板的使用方法

    公开(公告)号：US20070281388A1

    公开(公告)日：2007-12-06

    申请号：US11456213

    申请日：2006-07-10

    申请人： Cheng-Po Yu ,  Cheng-Hung Yu ,  Chi-Min Chang

    发明人： Cheng-Po Yu ,  Cheng-Hung Yu ,  Chi-Min Chang

    IPC分类号： H01L21/00 ,  H01L21/4763

    CPC分类号： H05K3/243 ,  H01L21/6715 ,  H05K3/0076 ,  H05K3/0079 ,  H05K3/28 ,  H05K2201/0391 ,  H05K2203/013 ,  H05K2203/058

    摘要： A selective metal surface treatment process of a circuit board, which has a solder mask and a multiple of selective metal treatment surface areas, wherein the solder mask covers the surface of the circuit board but exposes the selective metal surface treatment areas, is provided. The selective metal surface treatment process includes using a printhead to selectively print a resist on a selective metal surface treatment area, performing a surface treatment of the other selective metal surface treatment areas, and removing the resist. A selective metal surface treatment apparatus used for performing the selective metal surface treatment process of the circuit board is also provided. Through the present invention, unnecessary waste of the materials in the process is reduced and the processing time is shortened.

    摘要翻译： 提供具有焊接掩模和多个选择性金属处理表面积的电路板的选择性金属表面处理工艺，其中焊接掩模覆盖电路板的表面，但暴露选择性金属表面处理区域。 选择性金属表面处理方法包括使用打印头选择性地在选择性金属表面处理区域上印刷抗蚀剂，对其它选择性金属表面处理区域进行表面处理，并除去抗蚀剂。 还提供了用于执行电路板的选择性金属表面处理工艺的选择性金属表面处理装置。 通过本发明，可以减少处理过程中不必要的材料浪费，缩短处理时间。

    Circuit board and manufacturing method thereof
    3.
    发明授权
    Circuit board and manufacturing method thereof 有权
    电路板及其制造方法

    公开(公告)号：US08294041B2

    公开(公告)日：2012-10-23

    申请号：US12170082

    申请日：2008-07-09

    申请人： Cheng-Po Yu ,  Cheng-Hung Yu

    发明人： Cheng-Po Yu ,  Cheng-Hung Yu

    IPC分类号： H05K1/11

    CPC分类号： H05K1/0231 ,  H05K1/0219 ,  H05K1/162 ,  H05K3/107 ,  H05K2201/09036 ,  H05K2201/09809 ,  Y10T29/49117

    摘要： A circuit board including a first dielectric layer having a first surface and a second surface, a first circuit layer, a second dielectric layer, and a second circuit layer is provided. At least one trench is formed on the first surface, and the first circuit layer is formed on an inside wall of the trench. In addition, the second dielectric layer is disposed in the trench, and covers the first circuit layer. The second circuit layer is disposed in the trench, and the second dielectric layer is located between the first circuit layer and the second circuit layer. A manufacturing method of the circuit board is further provided.

    摘要翻译： 提供一种电路板，包括具有第一表面和第二表面的第一介电层，第一电路层，第二电介质层和第二电路层。 在第一表面上形成至少一个沟槽，并且第一电路层形成在沟槽的内壁上。 此外，第二电介质层设置在沟槽中并覆盖第一电路层。 第二电路层设置在沟槽中，第二电介质层位于第一电路层和第二电路层之间。 还提供了电路板的制造方法。

    CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
    5.
    发明申请
    CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF 有权
    电路板及其制造方法

    公开(公告)号：US20090250247A1

    公开(公告)日：2009-10-08

    申请号：US12170082

    申请日：2008-07-09

    申请人： Cheng-Po Yu ,  Cheng-Hung Yu

    发明人： Cheng-Po Yu ,  Cheng-Hung Yu

    IPC分类号： H05K1/02 ,  H01R43/00

    CPC分类号： H05K1/0231 ,  H05K1/0219 ,  H05K1/162 ,  H05K3/107 ,  H05K2201/09036 ,  H05K2201/09809 ,  Y10T29/49117

    摘要： A circuit board including a first dielectric layer having a first surface and a second surface, a first circuit layer, a second dielectric layer, and a second circuit layer is provided. At least one trench is formed on the first surface, and the first circuit layer is formed on an inside wall of the trench. In addition, the second dielectric layer is disposed in the trench, and covers the first circuit layer. The second circuit layer is disposed in the trench, and the second dielectric layer is located between the first circuit layer and the second circuit layer. A manufacturing method of the circuit board is further provided.

    摘要翻译： 提供一种电路板，包括具有第一表面和第二表面的第一介电层，第一电路层，第二电介质层和第二电路层。 在第一表面上形成至少一个沟槽，并且第一电路层形成在沟槽的内壁上。 此外，第二电介质层设置在沟槽中并覆盖第一电路层。 第二电路层设置在沟槽中，第二电介质层位于第一电路层和第二电路层之间。 还提供了电路板的制造方法。

    MANUFACTURING PROCESS AND APPARATUS FOR PRINTING IMPRINT ON DEFECTIVE BOARD
    6.
    发明申请
    MANUFACTURING PROCESS AND APPARATUS FOR PRINTING IMPRINT ON DEFECTIVE BOARD 审中-公开
    制造工艺和打印缺陷板上的印刷装置

    公开(公告)号：US20070263862A1

    公开(公告)日：2007-11-15

    申请号：US11465814

    申请日：2006-08-21

    申请人： Tzyy-Jang Tseng ,  Cheng-Po Yu ,  Chi-Min Chang ,  Cheng-Hung Yu

    发明人： Tzyy-Jang Tseng ,  Cheng-Po Yu ,  Chi-Min Chang ,  Cheng-Hung Yu

    IPC分类号： G09C3/08

    CPC分类号： H05K1/0269 ,  H05K3/0097 ,  H05K3/225 ,  H05K2201/09936 ,  H05K2203/013

    摘要： A manufacturing process and an apparatus for printing imprint on defective board are provided. An automatic printing device is used for replacing operator, so as to reduce manpower and to increase the correctness and veracity of defect mark printing. The manufacturing process includes the following steps: first, an image sensor captures an image of a defect mark and transmits the image to a processing unit for data processing. Next, the data is compared, and an inkjet head is notified of the correct printing position to print ink on the customer identification mark of the printed circuit board.

    摘要翻译： 提供了制造工艺和用于在缺陷板上印刷压印的装置。 使用自动打印装置来代替操作者，以减少人力和提高缺陷标记打印的正确性和真实性。 制造过程包括以下步骤：首先，图像传感器捕获缺陷标记的图像，并将图像发送到用于数据处理的处理单元。 接下来，比较数据，并且通知喷墨头正确的打印位置以在印刷电路板的客户识别标记上印刷墨水。

    Circuit structure and manufacturing method thereof
    8.
    发明授权
    Circuit structure and manufacturing method thereof 有权
    电路结构及其制造方法

    公开(公告)号：US08987608B2

    公开(公告)日：2015-03-24

    申请号：US13615722

    申请日：2012-09-14

    申请人： Shang-Feng Huang ,  Cheng-Po Yu ,  Jen-Chi Cheng

    发明人： Shang-Feng Huang ,  Cheng-Po Yu ,  Jen-Chi Cheng

    IPC分类号： H05K1/11 ,  H05K1/02 ,  H05K3/46

    CPC分类号： H05K1/0221 ,  H05K3/4644 ,  Y10T29/49155

    摘要： A circuit structure includes an inner circuit layer, a first and a second dielectric layers, a first and a second conductive material layers, and a second and a third conductive layers. The first dielectric layer covers a first conductive layer of the inner circuit layer and has a first surface and first circuit grooves. The first conductive material layer is disposed inside the first circuit grooves. The second conductive layer is disposed on the first surface and includes a signal trace and at least two reference traces. The second dielectric layer covers the first surface and the second conductive layer and has a second surface and second circuit grooves. Widths of the first and the second circuit grooves are smaller than that of the reference traces. The second conductive material layer is disposed inside the second circuit grooves. The third conductive layer is disposed on the second surface.

    摘要翻译： 电路结构包括内部电路层，第一和第二电介质层，第一和第二导电材料层以及第二和第三导电层。 第一电介质层覆盖内电路层的第一导电层，并具有第一表面和第一电路槽。 第一导电材料层设置在第一电路槽的内部。 第二导电层设置在第一表面上并且包括信号迹线和至少两个参考迹线。 第二电介质层覆盖第一表面和第二导电层，并具有第二表面和第二电路槽。 第一和第二电路槽的宽度小于参考轨迹的宽度。 第二导电材料层设置在第二电路槽的内部。 第三导电层设置在第二表面上。

    Embedded wiring board and method for manufacturing the same
    10.
    发明授权
    Embedded wiring board and method for manufacturing the same 有权
    嵌入式布线板及其制造方法

    公开(公告)号：US08373071B2

    公开(公告)日：2013-02-12

    申请号：US12696629

    申请日：2010-01-29

    申请人： Cheng-Po Yu ,  Chai-Liang Hsu

    发明人： Cheng-Po Yu ,  Chai-Liang Hsu

    IPC分类号： H05K1/00

    CPC分类号： H05K3/107 ,  H05K3/181 ,  H05K3/422 ,  H05K2201/0376

    摘要： A method for manufacturing an embedded wiring board is provided. An activating insulation layer is formed, in which the activating insulation layer includes a plurality of catalyst particles, and covers a first wiring layer. An intaglio pattern and at least one blind via partially exposing the first wiring layer are formed on the activating insulation layer, in which some of the catalyst particles are activated and exposed in the intaglio pattern and the blind via. The activating insulation layer is dipped in a first chemical plating solution, and a solid conductive pillar is formed in the blind via through electroless plating. The activating insulation layer is dipped in a second chemical plating solution after the solid conductive pillar is formed, and a second wiring layer is formed in the intaglio pattern through the electroless plating. Components of the first chemical plating solution and the second chemical plating solution are different.

    摘要翻译： 提供了一种用于制造嵌入式布线板的方法。 形成激活绝缘层，其中活化绝缘层包括多个催化剂颗粒，并覆盖第一布线层。 在活化绝缘层上形成凹版图案和部分露出第一布线层的至少一个盲孔，其中一些催化剂颗粒被活化并以凹版图案和盲孔曝光。 将激活绝缘层浸入第一化学镀溶液中，并通过化学镀在盲孔中形成固体导电柱。 在形成固体导电柱之后，将激活绝缘层浸入第二化学镀溶液中，并且通过无电解电镀在凹版图案中形成第二布线层。 第一化学镀液和第二化学镀液的成分不同。