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    Connector and manufacturing method thereof
    2.
    发明授权
    Connector and manufacturing method thereof 有权
    连接器及其制造方法

    公开(公告)号：US08294042B2

    公开(公告)日：2012-10-23

    申请号：US12844109

    申请日：2010-07-27

    申请人： Chang-Ming Lee ,  Wen-Fang Liu ,  Shih-Jung Huang ,  Ling-Kai Su

    发明人： Chang-Ming Lee ,  Wen-Fang Liu ,  Shih-Jung Huang ,  Ling-Kai Su

    IPC分类号： H01R9/00 ,  H05K7/00 ,  H05K1/11

    CPC分类号： H05K3/4092 ,  H05K3/4007 ,  H05K2201/0311 ,  Y10T29/49204

    摘要： A method of manufacturing a connector is provided. Firstly, a substrate having a first surface, a second surface opposite to the first surface and a through hole is provided. Next, a first conductive layer covering the inside wall of the through hole is formed on the substrate. Then, a filler is filled in the through hole to form a filler post. Next, a conductive elastic cantilever is formed over the first surface and electrically connected to the first conductive layer. Then, a gold layer is formed on the conductive elastic cantilever and over the first surface. A solder ball electrically connected to the first conductive layer is formed over the second surface.

    摘要翻译： 提供一种制造连接器的方法。 首先，提供具有第一表面，与第一表面相对的第二表面和通孔的基板。 接着，在基板上形成覆盖贯通孔的内壁的第一导电层。 然后，在通孔中填充填料以形成填料柱。 接下来，在第一表面上形成导电弹性悬臂，并电连接到第一导电层。 然后，在导电弹性悬臂上形成金层，并在第一表面上形成金层。 电连接到第一导电层的焊球形成在第二表面上。

    CIRCUIT BOARD
    3.
    发明申请
    CIRCUIT BOARD 审中-公开
    电路板

    公开(公告)号：US20120031651A1

    公开(公告)日：2012-02-09

    申请号：US12944275

    申请日：2010-11-11

    申请人： TZYY-JANG TSENG ,  Chang-Ming Lee ,  Wen-Fang Liu ,  Cheng-Po Yu

    发明人： TZYY-JANG TSENG ,  Chang-Ming Lee ,  Wen-Fang Liu ,  Cheng-Po Yu

    IPC分类号： H05K1/02 ,  H05K1/18

    CPC分类号： H05K1/0203 ,  H05K1/056 ,  H05K3/3436 ,  H05K2201/0187 ,  H05K2201/10106

    摘要： A circuit board including a circuit layer, a thermally conductive substrate, an insulation layer, and at least one thermally conductive material is provided. The thermally conductive substrate has a plane. The insulation layer is disposed between the circuit layer and the plane and partially covers the plane. The thermally conductive material covers the plane without covered by the insulation layer and is in contact with the thermally conductive substrate. The insulation layer exposes the thermally conductive material.

    摘要翻译： 提供了包括电路层，导热基板，绝缘层和至少一种导热材料的电路板。 导热基板具有平面。 绝缘层设置在电路层和平面之间，并部分覆盖平面。 导热材料覆盖该平面而不被绝缘层覆盖，并与导热基板接触。 绝缘层暴露导热材料。

    METHOD FOR FABRICATING ELECTRICAL INTERCONNECT STRUCTURE
    5.
    发明申请
    METHOD FOR FABRICATING ELECTRICAL INTERCONNECT STRUCTURE 有权
    电气互连结构的制作方法

    公开(公告)号：US20060068577A1

    公开(公告)日：2006-03-30

    申请号：US10905931

    申请日：2005-01-27

    申请人： Shao-Chien Lee ,  Tzyy Jang Tseng ,  Chang-Ming Lee

    发明人： Shao-Chien Lee ,  Tzyy Jang Tseng ,  Chang-Ming Lee

    IPC分类号： H01L21/44

    CPC分类号： H05K3/4038 ,  H05K3/423 ,  H05K3/4644 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2203/0369 ,  H05K2203/0733 ,  H05K2203/1476

    摘要： A method for fabricating an electrical interconnect structure is adapted for a circuit board manufacturing process. The circuit board comprises a conductive substrate, which comprises a first conductive layer and a bump conductive layer. The bump conductive layer is patterned to form at least one bump over the first conductive layer. Then, a dielectric layer is formed over the first conductive layer and the bump. A second conductive layer is formed over the dielectric layer. At least one blind hole is formed in the second conductive layer and the dielectric layer, passing through the second conductive layer and the dielectric layer to expose the top surface of the bump. A conductive material is filled in the blind hole, and the conductive material in the blind hole and the bump constitute a conductive post.

    摘要翻译： 一种用于制造电互连结构的方法适用于电路板制造工艺。 电路板包括导电衬底，其包括第一导电层和凸块导电层。 凸块导电层被图案化以在第一导电层上形成至少一个凸块。 然后，在第一导电层和凸块之上形成电介质层。 在电介质层上形成第二导电层。 在第二导电层和电介质层中形成至少一个盲孔，穿过第二导电层和电介质层以露出凸块的顶表面。 导电材料填充在盲孔中，盲孔中的导电材料和凸块构成导电柱。

    CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
    6.
    发明申请
    CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF 有权
    电路板及其制造方法

    公开(公告)号：US20130327564A1

    公开(公告)日：2013-12-12

    申请号：US13570251

    申请日：2012-08-09

    申请人： Cheng-Po Yu ,  Shang-Feng Huang ,  Chang-Ming Lee ,  Young-Sheng Bai

    发明人： Cheng-Po Yu ,  Shang-Feng Huang ,  Chang-Ming Lee ,  Young-Sheng Bai

    IPC分类号： H05K1/11 ,  H05K3/00

    CPC分类号： H05K3/381 ,  H05K3/105 ,  H05K3/108 ,  H05K2201/0215 ,  H05K2201/09563 ,  H05K2203/0307 ,  H05K2203/095 ,  H05K2203/1461

    摘要： A circuit board and a manufacturing method thereof are provided. According to the method, a dielectric layer is formed on a dielectric substrate, and the dielectric layer contains active particles. A surface treatment is performed on a surface of the dielectric first conductive layer is formed on the activated surface of the dielectric layer. A conductive via is formed in the dielectric substrate and the dielectric layer. A patterned mask layer is formed on the first conductive layer, in which the patterned mask layer exposes the conductive via and a part of the first conductive layer. A second conductive layer is formed on the first conductive layer and conductive via exposed by the patterned mask layer. The patterned mask layer and the first conductive layer below the patterned mask layer are removed.

    摘要翻译： 提供一种电路板及其制造方法。 根据该方法，在电介质基板上形成介电层，电介质层含有活性粒子。 在电介质层的活化表面上形成电介质第一导电层的表面进行表面处理。 在电介质基板和电介质层中形成导电通孔。 图案化的掩模层形成在第一导电层上，其中图案化掩模层暴露导电通孔和第一导电层的一部分。 在第一导电层上形成第二导电层，并且由图案化掩模层暴露出导电通路。 图案化掩模层和图案化掩模层下面的第一导电层被去除。

    Method for fabricating an interposer
    7.
    发明授权
    Method for fabricating an interposer 有权
    中介层的制造方法

    公开(公告)号：US08318411B2

    公开(公告)日：2012-11-27

    申请号：US12837462

    申请日：2010-07-15

    申请人： Chang-Ming Lee ,  Wen-Fang Liu ,  Shih-Jung Huang ,  Ling-Kai Su

    发明人： Chang-Ming Lee ,  Wen-Fang Liu ,  Shih-Jung Huang ,  Ling-Kai Su

    IPC分类号： G03F7/26

    CPC分类号： H01L23/49811 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Method for fabricating an interposer is provided. A substrate is provided having thereon at least a conductive via and at least a flange. The flange is bonded on the substrate and shades a portion of the via. A photoresist layer is formed on the interior surface of the via, on a contact surface of the flange and on an inner surface of the flange opposite to the contact surface. An opening is formed in the photoresist layer to expose a portion of the contact surface of the flange, while the photoresist layer still covers the interior surface of the via and the inner surface of the flange. A plating layer is formed on the exposed contact surface of the flange. The photoresist layer is then removed.

    摘要翻译： 提供了一种制造插入件的方法。 设置有至少具有导电通孔和至少凸缘的衬底。 法兰结合在基板上并遮蔽通孔的一部分。 在通孔的内表面上，在凸缘的接触表面和与接触表面相对的凸缘的内表面上形成光致抗蚀剂层。 在光致抗蚀剂层中形成开口以暴露凸缘的接触表面的一部分，而光致抗蚀剂层仍然覆盖通孔的内表面和凸缘的内表面。 在凸缘的暴露的接触表面上形成镀层。 然后除去光致抗蚀剂层。

    Manufacturing method of circuit structure
    8.
    发明授权
    Manufacturing method of circuit structure 有权
    电路结构的制造方法

    公开(公告)号：US08161638B2

    公开(公告)日：2012-04-24

    申请号：US12783806

    申请日：2010-05-20

    申请人： Tzyy-Jang Tseng ,  Chang-Ming Lee ,  Wen-Fang Liu ,  Cheng-Po Yu

    发明人： Tzyy-Jang Tseng ,  Chang-Ming Lee ,  Wen-Fang Liu ,  Cheng-Po Yu

    IPC分类号： H01K3/10

    CPC分类号： H05K3/465 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/184 ,  H05K3/421 ,  H05K3/4661 ,  H05K2201/0166 ,  H05K2201/0195 ,  H05K2203/1152 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1056

    摘要： A manufacturing method of circuit structure is described as follows. Firstly, a composite dielectric layer, a circuit board and an insulating layer disposed therebetween are provided. The composite dielectric layer includes a non-platable dielectric layer and a platable dielectric layer between the non-platable dielectric layer and the insulating layer wherein the non-platable dielectric layer includes a chemical non-platable material and the platable dielectric layer includes a chemical platable material. Then, the composite dielectric layer, the circuit board and the insulating layer are compressed. Subsequently, a through hole passing through the composite dielectric layer and the insulating layer is formed and a conductive via connecting a circuit layer of the circuit board is formed therein. Then, a trench pattern passing through the non-platable dielectric layer is formed on the composite dielectric layer. Subsequently, a chemical plating process is performed to form a conductive pattern in the trench pattern.

    摘要翻译： 电路结构的制造方法如下所述。 首先，提供复合电介质层，电路基板和设置在它们之间的绝缘层。 复合电介质层包括不可镀介电层和介于非平板电介质层和绝缘层之间的可镀介电层，其中非可镀介电层包括化学不可镀材料，并且可镀介电层包括化学镀层 材料。 然后，复合介电层，电路板和绝缘层被压缩。 随后，形成穿过复合介电层和绝缘层的通孔，并且在其中形成连接电路板的电路层的导电通孔。 然后，在复合电介质层上形成通过非电介质层的沟槽图案。 随后，执行化学镀处理以在沟槽图案中形成导电图案。

    MANUFACTURING METHOD OF CIRCUIT STRUCTURE
    9.
    发明申请
    MANUFACTURING METHOD OF CIRCUIT STRUCTURE 有权
    电路结构的制造方法

    公开(公告)号：US20110100543A1

    公开(公告)日：2011-05-05

    申请号：US12783806

    申请日：2010-05-20

    申请人： Tzyy-Jang Tseng ,  Chang-Ming Lee ,  Wen-Fang Liu ,  Cheng-Po Yu

    发明人： Tzyy-Jang Tseng ,  Chang-Ming Lee ,  Wen-Fang Liu ,  Cheng-Po Yu

    IPC分类号： B32B38/10 ,  B32B38/04

    CPC分类号： H05K3/465 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/184 ,  H05K3/421 ,  H05K3/4661 ,  H05K2201/0166 ,  H05K2201/0195 ,  H05K2203/1152 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1056

    摘要： A manufacturing method of circuit structure is described as follows. Firstly, a composite dielectric layer, a circuit board and an insulating layer disposed therebetween are provided. The composite dielectric layer includes a non-platable dielectric layer and a platable dielectric layer between the non-platable dielectric layer and the insulating layer wherein the non-platable dielectric layer includes a chemical non-platable material and the platable dielectric layer includes a chemical platable material. Then, the composite dielectric layer, the circuit board and the insulating layer are compressed. Subsequently, a through hole passing through the composite dielectric layer and the insulating layer is formed and a conductive via connecting a circuit layer of the circuit board is formed therein. Then, a trench pattern passing through the non-platable dielectric layer is formed on the composite dielectric layer. Subsequently, a chemical plating process is performed to form a conductive pattern in the trench pattern.

    摘要翻译： 电路结构的制造方法如下所述。 首先，提供复合电介质层，电路基板和设置在它们之间的绝缘层。 复合电介质层包括不可镀介电层和介于非平板电介质层和绝缘层之间的可镀介电层，其中非可镀介电层包括化学不可镀材料，并且可镀介电层包括化学镀层 材料。 然后，复合介电层，电路板和绝缘层被压缩。 随后，形成穿过复合介电层和绝缘层的通孔，并且在其中形成连接电路板的电路层的导电通孔。 然后，在复合电介质层上形成通过非电介质层的沟槽图案。 随后，执行化学镀处理以在沟槽图案中形成导电图案。