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公开(公告)号：US06798953B1
公开(公告)日：2004-09-28
申请号：US09479109
申请日：2000-01-07
申请人： Mitchell S. Cohen , Michael J. Cordes , Steven A. Cordes , William K. Hogan , Glen W. Johnson , Daniel M. Kuchta , Dianne L. Lacey , James L. Speidell , Jeannine M. Trewhella , Joseph P. Zinter
发明人： Mitchell S. Cohen , Michael J. Cordes , Steven A. Cordes , William K. Hogan , Glen W. Johnson , Daniel M. Kuchta , Dianne L. Lacey , James L. Speidell , Jeannine M. Trewhella , Joseph P. Zinter
IPC分类号： G02B630
CPC分类号： G02B6/4246 , G02B6/3652 , G02B6/423 , G02B6/4239
摘要： A structure that includes a substrate, typically a semiconductor chip such as a VCSEL or photodetector chip, and a guide for aligning a signal conveying device, typically an optical fiber, to a transducer such as an optoelectronic device on the semiconductor chip. The guide is formed, in a preferred embodiment, by lithographically exposing and developing a thick layer of photoresist. The structure is assembled by placing and securing the signal conveying device into a cavity-like region of the guide.
摘要翻译： 包括基板，通常为诸如VCSEL或光电检测器芯片的半导体芯片的结构，以及用于将信号传送装置（通常为光纤）对准到诸如半导体芯片上的光电子装置的换能器的引导件。 在优选实施例中，通过光刻曝光和显影厚的光致抗蚀剂层来形成引导件。 通过将信号传送装置放置并固定到引导件的腔状区域来组装结构。
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公开(公告)号：US20080293259A1
公开(公告)日：2008-11-27
申请号：US12187767
申请日：2008-08-07
申请人： Wanda Andreoni , Alessandro C. Callegari , Eduard A. Cartier , Alessandro Curioni , Christopher P. D'Emic , Evgeni Gousev , Michael A. Gribelyuk , Paul C. Jamison , Rajarao Jammy , Dianne L. Lacey , Fenton R. McFeely , Vijay Narayanan , Carlo A. Pignedoli , Joseph F. Shepard, JR. , Sufi Zafar
发明人： Wanda Andreoni , Alessandro C. Callegari , Eduard A. Cartier , Alessandro Curioni , Christopher P. D'Emic , Evgeni Gousev , Michael A. Gribelyuk , Paul C. Jamison , Rajarao Jammy , Dianne L. Lacey , Fenton R. McFeely , Vijay Narayanan , Carlo A. Pignedoli , Joseph F. Shepard, JR. , Sufi Zafar
IPC分类号： H01L21/263
CPC分类号： H01L21/28176 , H01L29/4908 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6656 , H01L29/66575 , H01L29/66772 , H01L29/7833 , H01L29/78684
摘要： The present invention provides a gate stack structure that has high mobilities and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.
摘要翻译： 本发明提供具有高移动性和低界面电荷的栅叠层结构，以及包括其的半导体器件，即金属氧化物半导体场效应晶体管（MOSFET）。 在半导体器件中，本发明的栅极堆叠结构位于衬底和覆盖栅极导体之间。 本发明还提供一种制造本发明的栅叠层结构的方法，其中采用了高温退火工艺（大约800℃）。 本发明中使用的高温退火提供了具有大约8×10 10电荷/ cm 2或更小的电荷泵浦的界面状态密度，约250cm 2 / s以上的峰值迁移率和基本上没有 约6.0×10 12反相电荷/ cm 2以上的迁移率降解。
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3.发明授权TiC as a thermally stable p-metal carbide on high k SiO2 gate stacks 失效TiC作为高k SiO 2栅极堆叠上的热稳定的p金属碳化物公开(公告)号：US07667277B2
公开(公告)日：2010-02-23
申请号：US11034597
申请日：2005-01-13
申请人： Alessandro C. Callegari , Michael A. Gribelyuk , Dianne L. Lacey , Fenton R. McFeely , Katherine L. Saenger , Sufi Zafar
发明人： Alessandro C. Callegari , Michael A. Gribelyuk , Dianne L. Lacey , Fenton R. McFeely , Katherine L. Saenger , Sufi Zafar
IPC分类号： H01L29/76
CPC分类号： H01L29/4966 , C23C14/0036 , C23C14/0635 , H01L21/28088 , H01L29/513 , H01L29/517 , H01L29/665
摘要： A compound metal comprising TiC which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer is provided as well as a method of fabricating the TiC compound metal. Furthermore, the TiC metal compound of the present invention is a very efficient oxygen diffusion barrier at 1000° C. allowing very aggressive equivalent oxide thickness (EOT) and inversion layer thickness scaling below 14 Å in a p-metal oxide semiconductor (pMOS) device.
摘要翻译： 提供了包含TiC的复合金属，其是在包括高k电介质和界面层的栅极堆叠上具有约4.75至约5.3，优选约5e的功函数的功函数的热电稳定的p型金属，以及 制造TiC复合金属的方法。 此外，本发明的TiC金属化合物在1000℃下是非常有效的氧扩散阻挡层，允许在p金属氧化物半导体（pMOS）器件中非常有侵蚀性的等效氧化物厚度（EOT）和反型层厚度缩小至低于Å 。
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4.发明申请TiC AS A THERMALLY STABLE p-METAL CARBIDE ON HIGH k SiO2 GATE STACKS 有权TiC作为高k SiO 2栅极堆叠上的耐热稳定的p金属碳化物公开(公告)号：US20100015790A1
公开(公告)日：2010-01-21
申请号：US12541575
申请日：2009-08-14
申请人： Alessandro C. Callegari , Michael A. Gribelyuk , Dianne L. Lacey , Fenton R. McFeely , Katherine L. Saenger , Sufi Zafar
发明人： Alessandro C. Callegari , Michael A. Gribelyuk , Dianne L. Lacey , Fenton R. McFeely , Katherine L. Saenger , Sufi Zafar
CPC分类号： H01L29/4966 , C23C14/0036 , C23C14/0635 , H01L21/28088 , H01L29/513 , H01L29/517 , H01L29/665
摘要： A compound metal comprising TiC which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer is provided as well as a method of fabricating the TiC compound metal. Furthermore, the TiC metal compound of the present invention is a very efficient oxygen diffusion barrier at 1000° C. allowing very aggressive equivalent oxide thickness (EOT) and inversion layer thickness scaling below 14 Å in a p-metal oxide semiconductor (pMOS) device.
摘要翻译： 提供了包含TiC的复合金属，其是在包括高k电介质和界面层的栅极堆叠上具有约4.75至约5.3，优选约5e的功函数的功函数的热电稳定的p型金属，以及 制造TiC复合金属的方法。 此外，本发明的TiC金属化合物在1000℃下是非常有效的氧扩散阻挡层，允许在p金属氧化物半导体（pMOS）器件中非常有侵蚀性的等效氧化物厚度（EOT）和反型层厚度缩小至低于Å 。
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公开(公告)号：US08153514B2
公开(公告)日：2012-04-10
申请号：US12187767
申请日：2008-08-07
申请人： Wanda Andreoni , Alessandro C. Callegari , Eduard A. Cartier , Alessandro Curioni , Christopher P. D'Emic , Evgeni Gousev , Michael A. Gribelyuk , Paul C. Jamison , Rajarao Jammy , Dianne L. Lacey , Fenton R. McFeely , Vijay Narayanan , Carlo A. Pignedoli , Joseph F. Shepard, Jr. , Sufi Zafar
发明人： Wanda Andreoni , Alessandro C. Callegari , Eduard A. Cartier , Alessandro Curioni , Christopher P. D'Emic , Evgeni Gousev , Michael A. Gribelyuk , Paul C. Jamison , Rajarao Jammy , Dianne L. Lacey , Fenton R. McFeely , Vijay Narayanan , Carlo A. Pignedoli , Joseph F. Shepard, Jr. , Sufi Zafar
IPC分类号： H01L21/3205
CPC分类号： H01L21/28176 , H01L29/4908 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6656 , H01L29/66575 , H01L29/66772 , H01L29/7833 , H01L29/78684
摘要： The present invention provides a gate stack structure that has high mobilities and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.
摘要翻译： 本发明提供具有高迁移率和低界面电荷的栅叠层结构，以及包括其的半导体器件即金属氧化物半导体场效应晶体管（MOSFET）。 在半导体器件中，本发明的栅极堆叠结构位于衬底和覆盖栅极导体之间。 本发明还提供一种制造本发明的栅叠层结构的方法，其中采用了高温退火工艺（大约800℃）。 本发明中使用的高温退火提供了一种栅极叠层结构，其具有约8×10 10电荷/ cm 2或更小的峰值迁移率，约250cm 2 / s或更大的峰迁移率的通过电荷泵浦测量的界面状态密度，以及 在大约6.0×10 12反转电荷/ cm 2或更大时基本上没有迁移率降解。
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公开(公告)号：US07521346B2
公开(公告)日：2009-04-21
申请号：US11875524
申请日：2007-10-19
申请人： Alessandro C. Callegari , Martin M. Frank , Rajarao Jammy , Dianne L. Lacey , Fenton R. McFeely , Sufi Zafar
发明人： Alessandro C. Callegari , Martin M. Frank , Rajarao Jammy , Dianne L. Lacey , Fenton R. McFeely , Sufi Zafar
IPC分类号： H01L21/4763
CPC分类号： H01L29/4966 , H01L21/28088 , H01L29/513 , H01L29/517 , H01L29/665 , H01L29/6659
摘要： A compound metal comprising HfSiN which is a n-type metal having a workfunction of about 4.0 to about 4.5, preferably about 4.3, eV which is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer. Furthermore, after annealing the stack of HfSiN/high k dielectric/interfacial layer at a high temperature (on the order of about 1000° C.), there is a reduction of the interfacial layer, thus the gate stack produces a very small equivalent oxide thickness (12 Å classical), which cannot be achieved using TaSiN.
摘要翻译： 包含HfSiN的复合金属，其是具有约4.0至约4.5，优选约4.3的功函数的n型金属，其在包含高k电介质和界面层的栅极堆叠上是热稳定的。 此外，在高温（约1000℃）左右的HfSiN /高k电介质/界面层的堆叠退火之后，界面层的减少，因此栅叠层产生非常小的等效氧化物 厚度（经典），不能用TaSiN实现。
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公开(公告)号：US06982230B2
公开(公告)日：2006-01-03
申请号：US10291334
申请日：2002-11-08
申请人： Cyril Cabral, Jr. , Alessandro C. Callegari , Michael A. Gribelyuk , Paul C. Jamison , Dianne L. Lacey , Fenton R. McFeely , Vijay Narayanan , Deborah A. Neumayer , Pushkar Ranade , Sufi Zafar
发明人： Cyril Cabral, Jr. , Alessandro C. Callegari , Michael A. Gribelyuk , Paul C. Jamison , Dianne L. Lacey , Fenton R. McFeely , Vijay Narayanan , Deborah A. Neumayer , Pushkar Ranade , Sufi Zafar
IPC分类号： H01L21/31
CPC分类号： H01L21/02181 , C23C16/405 , C23C16/56 , H01L21/02189 , H01L21/02205 , H01L21/02271 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/31604 , H01L21/823857 , H01L27/0805 , H01L29/495 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating hafnium oxide and/or zirconium oxide films is provided. The methods include providing a mixture of Hf and/or Zr alkoxide dissolved, emulsified or suspended in a liquid; vaporizing at least the alkoxide and depositing the vaporized component at a temperature of greater than 400° C. The resultant film is dense, microcrystalline and is capable of self-passivation when treated in a hydrogen plasma or forming gas anneal.
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8.发明授权TiC as a thermally stable p-metal carbide on high k SiO2 gate stacks 有权TiC作为高k SiO 2栅极堆叠上的热稳定的p金属碳化物公开(公告)号：US08288237B2
公开(公告)日：2012-10-16
申请号：US12541575
申请日：2009-08-14
申请人： Alessandro C. Callegari , Michael A. Gribelyuk , Dianne L. Lacey , Fenton R. Feeney , Katherine L. Saenger , Sufi Zafar
发明人： Alessandro C. Callegari , Michael A. Gribelyuk , Dianne L. Lacey , Fenton R. Feeney , Katherine L. Saenger , Sufi Zafar
IPC分类号： H01L21/336
CPC分类号： H01L29/4966 , C23C14/0036 , C23C14/0635 , H01L21/28088 , H01L29/513 , H01L29/517 , H01L29/665
摘要： A compound metal comprising TiC which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer is provided as well as a method of fabricating the TiC compound metal. Furthermore, the TiC metal compound of the present invention is a very efficient oxygen diffusion barrier at 1000° C. allowing very aggressive equivalent oxide thickness (EOT) and inversion layer thickness scaling below 14 Å in a p-metal oxide semiconductor (pMOS) device.
摘要翻译： 提供了包含TiC的复合金属，其是在包括高k电介质和界面层的栅极堆叠上具有约4.75至约5.3，优选约5e的功函数的功函数的热电稳定的p型金属，以及 制造TiC复合金属的方法。 此外，本发明的TiC金属化合物在1000℃下是非常有效的氧扩散阻挡层，允许在p金属氧化物半导体（pMOS）器件中非常有侵蚀性的等效氧化物厚度（EOT）和反型层厚度缩小至低于Å 。
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公开(公告)号：US07115959B2
公开(公告)日：2006-10-03
申请号：US10873733
申请日：2004-06-22
申请人： Wanda Andreoni , Alessandro C. Callegari , Eduard A. Cartier , Alessandro Curioni , Christopher P. D'Emic , Evengi Gousev , Michael A. Gribelyuk , Paul C. Jamison , Rajarao Jammy , Dianne L. Lacey , Fenton R. McFeely , Vijay Narayanan , Carlo A. Pignedoli , Joseph P. Shepard, Jr. , Sufi Zafar
发明人： Wanda Andreoni , Alessandro C. Callegari , Eduard A. Cartier , Alessandro Curioni , Christopher P. D'Emic , Evengi Gousev , Michael A. Gribelyuk , Paul C. Jamison , Rajarao Jammy , Dianne L. Lacey , Fenton R. McFeely , Vijay Narayanan , Carlo A. Pignedoli , Joseph P. Shepard, Jr. , Sufi Zafar
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/28176 , H01L29/4908 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6656 , H01L29/66575 , H01L29/66772 , H01L29/7833 , H01L29/78684
摘要： The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.
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10.发明授权Method for passivating a compound semiconductor surface and device having improved semiconductor-insulator interface 失效钝化化合物半导体表面的方法和具有改进的半导体 - 绝缘体界面的器件
公开(公告)号：US4859253A
公开(公告)日：1989-08-22
申请号：US221686
申请日：1988-07-20
IPC分类号： H01L21/318 , H01L29/78
CPC分类号： H01L21/318
摘要： A method for passivating the surface of a compound semiconductor comprises annealing the substrate to form an anion rich surface layer containing cationic and anionic oxides and stripping the oxides to leave only a very thin anionic layer on the surface. The substrate is then subjected to an H.sub.2 plasma cleaning to remove chemisorbed oxygen. An N.sub.2 plasma cleaning is then performed to form an anionic nitride layer that is free of any cationic nitride. A layer of insulating material, such as, a native or other oxide, or a nitride, is deposited. The resulting structure has a very low interface state density such that the Fermi level may be swept through the entire band gap.
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