公开(公告)号：US06992537B2

公开(公告)日：2006-01-31

申请号：US10468829

申请日：2002-12-27

申请人： Nobuhiko Yasui ,  Noboru Katta ,  Takahisa Sakai ,  Yuji Mizuguchi ,  Yutaka Takahira ,  Hirotsugu Kawada ,  Toshitomo Umei ,  Takashi Akita ,  Osamu Shibata

发明人： Nobuhiko Yasui ,  Noboru Katta ,  Takahisa Sakai ,  Yuji Mizuguchi ,  Yutaka Takahira ,  Hirotsugu Kawada ,  Toshitomo Umei ,  Takashi Akita ,  Osamu Shibata

IPC分类号： H03H7/01 ,  H03H7/38

CPC分类号： H03H7/427 ,  H03H7/06 ,  H03H7/24 ,  H04B3/30 ,  H04L25/085

摘要： A receiver includes a noise reduction circuit for eliminating noise from a differential signal transmitted through a differential transmission line, and a data recovery circuit for recovering data from a differential signal outputted from the noise reduction circuit. The noise reduction circuit includes common-mode chokes for reflecting common-mode noise superimposed on an input differential signal, and a common-mode noise reduction circuit for directing the common-mode noise reflected by the common-mode chokes to a low potential point of the common-mode noise reduction circuit.

摘要翻译： 接收机包括用于消除通过差分传输线传输的差分信号的噪声的噪声降低电路，以及用于从从降噪电路输出的差分信号中恢复数据的数据恢复电路。 噪声降低电路包括用于反映叠加在输入差分信号上的共模噪声的共模扼流圈和用于将由共模扼流圈反射的共模噪声引导到低电位点的共模噪声降低电路 共模降噪电路。

公开(公告)号：US20060050820A1

公开(公告)日：2006-03-09

申请号：US10539235

申请日：2004-02-10

申请人： Hirotsugu Kawada ,  Yoshiyuki Saito ,  Osamu Shibata ,  Hiroshi Suenaga ,  Takahisa Sakai ,  Toshitomo Umei ,  Takashi Akita ,  Yuji Mizuguchi ,  Noboru Katta

发明人： Hirotsugu Kawada ,  Yoshiyuki Saito ,  Osamu Shibata ,  Hiroshi Suenaga ,  Takahisa Sakai ,  Toshitomo Umei ,  Takashi Akita ,  Yuji Mizuguchi ,  Noboru Katta

IPC分类号： H04L7/00

CPC分类号： H04L7/00 ,  H04L7/0334

摘要： A signal receiver (11) receives an analog signal via a twisted pair cable (31). An A/D converter (12) converts the analog signal to a digital signal. A phase detection unit (14) detects the phase of the digital signal, and generates a reception timing signal. A transmission timing generation unit (15) controls, based on the reception timing signal, timing for a transmission processing unit (16) to output the digital signal such that the reception signal (point A) and a transmission signal (point D) are different in phase by a predetermined degree. The transmission processing unit (16) outputs, in accordance with the timing, a digital signal obtained by performing mapping on data inputted from a connection device (20). A D/A converter (17) converts the digital signal to an analog signal. A signal transmitter (18) transmits the analog signal via a twisted pair cable (32).

摘要翻译： 信号接收器（11）经由双绞线电缆（31）接收模拟信号。 A / D转换器（12）将模拟信号转换成数字信号。 相位检测单元（14）检测数字信号的相位，并产生接收定时信号。 发送定时生成单元（15）基于接收定时信号，控制发送处理单元（16）输出数字信号的定时，使得接收信号（点A）和发送信号（点D）不同 同时预定的程度。 发送处理单元（16）根据定时输出通过对从连接装置（20）输入的数据进行映射而获得的数字信号。 D / A转换器（17）将数字信号转换成模拟信号。 信号发送器（18）经由双绞线电缆（32）发送模拟信号。

公开(公告)号：US20070252659A1

公开(公告)日：2007-11-01

申请号：US11664129

申请日：2005-08-01

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Noboru Katta ,  Yuji Mizuguchi

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Noboru Katta ,  Yuji Mizuguchi

IPC分类号： H03H7/38

CPC分类号： H01F17/0013 ,  H01F2017/0093 ,  H03H7/09 ,  H03H7/427 ,  H03H2001/0085 ,  H04B3/30 ,  H04L12/40032 ,  H04L2012/40215 ,  H04L2012/4026

摘要： In a filter circuit (1), a common mode choke (2) and a normal mode choke (3) have extremely high and low impedances, respectively, for common mode signals received through two input terminals (1a and 1b). The chokes have the opposite impedance characteristics for differential signals. In particular, the difference in impedance is large. Furthermore, the normal mode choke (3) is installed as a previous stage of the common mode choke (2). Accordingly, common mode noises which enter the two input terminals (1a and 1b) penetrate the normal mode choke (3), but neither penetrate the common mode choke (2) nor are reflected from the common mode choke (2). In particular, common mode currents flow through the normal mode choke (3) but do not flow through the common mode choke (2).

摘要翻译： 在滤波器电路（1）中，对于通过两个输入端子（1a和1b）接收的共模信号，共模扼流圈（2）和正常模式扼流圈（3）分别具有极高和低阻抗。 扼流圈对差分信号具有相反的阻抗特性。 特别地，阻抗的差异很大。 此外，正常模式扼流圈（3）安装为共模扼流圈（2）的前一级。 因此，进入两个输入端子（1a和1b）的共模噪声穿透正常模式扼流圈（3），但都不穿透共模扼流圈（2），也不会从共模扼流圈（2）反射。 特别地，共模电流流过正常模式扼流圈（3），但不流过共模扼流圈（2）。

公开(公告)号：US20120020416A1

公开(公告)日：2012-01-26

申请号：US13260816

申请日：2010-03-30

申请人： Takuma Shimura ,  Takashi Akita ,  Osamu Shibata

发明人： Takuma Shimura ,  Takashi Akita ,  Osamu Shibata

IPC分类号： H04B3/00 ,  H05K1/02

CPC分类号： H01B7/0838 ,  H01B7/0861 ,  H01B11/1091 ,  H04B3/02 ,  H05K1/0219 ,  H05K1/0224 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/0393 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09354 ,  H05K2201/09718

摘要： A flexible cable is provided in which a transmission characteristic can be ensured in a high frequency band, and electromagnetic noises can be suppressed. A flexible cable 11 includes a sheet-like base member (dielectric substance) 1; an adhesive (dielectric substance) 2 which bonds the base member 1 to a cover member (dielectric substance) 3; a shield member 4 which covers the cover member 3 and is bonded or printed to the cover member 3 to suppress electromagnetic noises to be radiated; and a top coating member 5 which covers the shield member 4 to protect the shield member 4. The flexible cable 11 has a differential signal wire group 7 including differential signal wires 6 through which differential signals pass and guard ground wires 9a which prevent the interference from other differential signals; a low-speed signal wire 8 through which a low-speed signal passes; a ground wire 9 used as a ground; and a shield ground wire 10 which is adapted to allow the electric potential of the shield member 4 to be identical to the electric potential of the ground, all of which are provided in the adhesive 2. The differential signal wires 6 are not covered with the shield member 4.

摘要翻译： 提供一种灵活的电缆，其中可以在高频带中确保传输特性，并且可以抑制电磁噪声。 柔性电缆11包括片状基体（电介质）1; 将基材1与盖部件（电介质）3接合的粘合剂（电介质）2; 遮盖构件4，其覆盖盖构件3，并且被接合或印刷到盖构件3，以抑制要辐射的电磁噪声; 以及覆盖屏蔽构件4以保护屏蔽构件4的顶部涂覆构件5.柔性电缆11具有差分信号线组7，差分信号线组7包括差分信号通过的差分信号线6，并且防止接地线9a防止干扰 其他差分信号; 低速信号通过的低速信号线8; 用作地面的地线9; 以及屏蔽接地线10，其适于使屏蔽构件4的电位与地面的电位相同，所有这些都设置在粘合剂2中。差分信号线6不被覆盖 屏蔽员4。

公开(公告)号：US08669483B2

公开(公告)日：2014-03-11

申请号：US13260816

申请日：2010-03-30

申请人： Takuma Shimura ,  Takashi Akita ,  Osamu Shibata

发明人： Takuma Shimura ,  Takashi Akita ,  Osamu Shibata

IPC分类号： H05K1/02

CPC分类号： H01B7/0838 ,  H01B7/0861 ,  H01B11/1091 ,  H04B3/02 ,  H05K1/0219 ,  H05K1/0224 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/0393 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09354 ,  H05K2201/09718

摘要： A flexible cable is provided in which a transmission characteristic can be ensured in a high frequency band, and electromagnetic noises can be suppressed. A flexible cable 11 includes a sheet-like base member (dielectric substance) 1; an adhesive (dielectric substance) 2 which bonds the base member 1 to a cover member (dielectric substance) 3; a shield member 4 which covers the cover member 3 and is bonded or printed to the cover member 3 to suppress electromagnetic noises to be radiated; and a top coating member 5 which covers the shield member 4 to protect the shield member 4. The flexible cable 11 has a differential signal wire group 7 including differential signal wires 6 through which differential signals pass and guard ground wires 9a which prevent the interference from other differential signals; a low-speed signal wire 8 through which a low-speed signal passes; a ground wire 9 used as a ground; and a shield ground wire 10 which is adapted to allow the electric potential of the shield member 4 to be identical to the electric potential of the ground, all of which are provided in the adhesive 2. The differential signal wires 6 are not covered with the shield member 4.

摘要翻译： 提供一种灵活的电缆，其中可以在高频带中确保传输特性，并且可以抑制电磁噪声。 柔性电缆11包括片状基体（电介质）1; 将基材1与盖部件（电介质）3接合的粘合剂（电介质）2; 遮盖构件4，其覆盖盖构件3，并且被接合或印刷到盖构件3，以抑制要辐射的电磁噪声; 以及覆盖屏蔽构件4以保护屏蔽构件4的顶部涂覆构件5.柔性电缆11具有差分信号线组7，差分信号线组7包括差分信号通过的差分信号线6，并且防止接地线9a防止干扰 其他差分信号; 低速信号通过的低速信号线8; 用作地面的地线9; 以及屏蔽接地线10，其适于使屏蔽构件4的电位与地面的电位相同，所有这些都设置在粘合剂2中。差分信号线6不被覆盖 屏蔽员4。

公开(公告)号：US08705637B2

公开(公告)日：2014-04-22

申请号：US13805456

申请日：2012-02-13

申请人： Osamu Shibata ,  Hiroshi Suenaga

发明人： Osamu Shibata ,  Hiroshi Suenaga

IPC分类号： H04B3/00

CPC分类号： H04B15/00 ,  H04L25/0266 ,  H04L25/0276

摘要： A signal transmission device including: a differential signal transmission unit having two output terminals for outputting a differential signal to a paired signal lines including first and second signal lines; a single-ended signal transmission unit having two output terminals for outputting independent two-channel single-ended signals to the paired signal lines; and a filter unit having first and second common mode filters. One terminal of the differential signal transmission unit and one terminal of the single-ended signal transmission unit are connected to the first signal line via one inductor of the first common mode filter of the filter unit. The other one terminal of the differential signal transmission unit and the other one terminal of the single-ended signal transmission unit are connected to the second signal line via one inductor of the second common mode filter of the filter unit.

摘要翻译： 一种信号传输装置，包括：差分信号传输单元，具有两个输出端，用于将差分信号输出到包括第一和第二信号线的成对信号线; 一个单端信号传输单元，具有两个输出端，用于向成对的信号线输出独立的双通道单端信号; 以及具有第一和第二共模滤波器的滤波器单元。 差分信号传输单元的一个端子和单端信号传输单元的一个端子通过滤波器单元的第一共模滤波器的一个电感器连接到第一信号线。 差分信号传输单元的另一个端子和单端信号传输单元的另一个端子通过滤波器单元的第二共模滤波器的一个电感器连接到第二信号线。

公开(公告)号：US08699966B2

公开(公告)日：2014-04-15

申请号：US13410476

申请日：2012-03-02

申请人： Osamu Shibata ,  Takanori Uejima

发明人： Osamu Shibata ,  Takanori Uejima

IPC分类号： H04B1/44

CPC分类号： H04B1/0057

摘要： A high-frequency switch module includes a first switching element and a second switching element. A common terminal of the first switching element is connected to an antenna. A common input terminal of the second switching element is connected to a multi-band power amplifier. A second individual output terminal of the second switching element is connected to a fourth individual terminal of the first switching element via a first low-pass filter, and is connected to a third individual terminal of the first switching element via a series circuit including a second low-pass filter and a high-pass filter. A first individual output terminal of the second switching element is connected to a first individual terminal of the first switching element via a phase-shift circuit and a first SAW duplexer, and is connected to a second individual terminal of the first switching element via the phase-shift circuit and a second SAW duplexer.

摘要翻译： 高频开关模块包括第一开关元件和第二开关元件。 第一开关元件的公共端子连接到天线。 第二开关元件的公共输入端子连接到多频带功率放大器。 第二开关元件的第二单独输出端子经由第一低通滤波器连接到第一开关元件的第四单独端子，并且经由串联电路连接到第一开关元件的第三单独端子，该串联电路包括第二开关元件 低通滤波器和高通滤波器。 第二开关元件的第一单独输出端经由移相电路和第一SAW双工器连接到第一开关元件的第一单独端子，并且经由相位连接到第一开关元件的第二单独端子 换档电路和第二SAW双工器。

公开(公告)号：US07886085B2

公开(公告)日：2011-02-08

申请号：US12295051

申请日：2007-02-20

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Noriaki Takeda ,  Toru Iwata ,  Takaharu Yoshida ,  Yoshiyuki Saito

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Noriaki Takeda ,  Toru Iwata ,  Takaharu Yoshida ,  Yoshiyuki Saito

IPC分类号： G06F13/00 ,  G06F3/00

CPC分类号： H04L7/10 ,  G06F1/12 ,  H04L7/0008 ,  H04L7/033 ,  H04L7/044 ,  H04L7/046

摘要： An object of the present invention is to provide a technique to improve the data transmission efficiency which allows correct reception of the data at the same time. A removable memory device that transmits/receives data to and from a host terminal, which includes: a clock reception section that receives a transmission/reception clock, which is used for transmitting/receiving data between the host terminal and the removable memory device, from the host terminal; a phase synchronization pattern generation section that generates a phase synchronization pattern, which is for adjusting a phase of internal reception clock which the host terminal incorporates for receiving data from the removable memory device, based on the transmission/reception clock; and a transmission section that transmits the generated phase synchronization pattern to the host terminal, and in which the phase synchronization pattern includes a first level signal which lasts for at least two cycles, and a second level signal which follows the first level signal and lasts for one cycle, is provided.

摘要翻译： 本发明的目的是提供一种提高数据传输效率的技术，其允许同时正确地接收数据。 一种向主机终端发送/接收数据的可移动存储装置，包括：接收用于在主机终端和可移动存储装置之间发送/接收数据的发送/接收时钟的时钟接收部分， 主机终端; 相位同步模式生成部，其基于所述发送接收时钟生成相位同步模式，所述相位同步模式用于调整所述主机终端结合的用于从所述可移动存储装置接收数据的内部接收时钟的相位; 以及发送部，其将所生成的相位同步模式发送到所述主机终端，并且所述相位同步模式包括持续至少两个周期的第一电平信号，以及在所述第一电平信号之后持续的第二电平信号， 提供一个循环。

公开(公告)号：US20100289534A1

公开(公告)日：2010-11-18

申请号：US12847161

申请日：2010-07-30

申请人： Hiroshi SUENAGA ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Masayuki Toyama ,  Kyoko Hirata

发明人： Hiroshi SUENAGA ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Masayuki Toyama ,  Kyoko Hirata

IPC分类号： H03B1/00

CPC分类号： H04L25/028 ,  H04L25/0272

摘要： An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.

摘要翻译： 本发明的目的是实现在两个传输系统之间切换的接口电路中的输出级驱动器的面积的减小。 接口电路具有两个驱动电路和驱动控制电路，该电路可以在作为电压驱动系统和电流驱动系统的两个驱动系统之间切换。 两个驱动电路通过驱动控制电路连接到电源电位。 通过选择电路输入输入信号的两个输入信号和反相逻辑信号。 根据输入到驱动控制电路的控制信号，接口电路在电压驱动型单端传输系统和电流驱动型差动传输系统之间切换。

公开(公告)号：US07737553B2

公开(公告)日：2010-06-15

申请号：US11242955

申请日：2005-10-05

申请人： Osamu Shibata ,  Yoshiyuki Saito

发明人： Osamu Shibata ,  Yoshiyuki Saito

IPC分类号： H01L23/52

CPC分类号： H01L23/60 ,  H01L23/552 ,  H01L23/66 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/4911 ,  H01L2224/49113 ,  H01L2224/49174 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00

摘要： Fine-pitch first and second bonding pads are formed on a chip along its perimeter. The first bonding pads are formed at the peripheral parts on the chip, while the second bonding pads are formed inside the peripheral parts. An ESD protection circuit is connected to the first bonding pad, and an I/O circuit is connected to the second bonding pad. First and second bonding wires connect the first and second bonding pads to the same package pin, respectively. The second bonding wire is configured to be sufficiently longer than the first bonding wire, regardless of the pitch of the first bonding pads.

摘要翻译： 细间距第一和第二接合焊盘沿其周边形成在芯片上。 第一接合焊盘形成在芯片的周边部分，而第二接合焊盘形成在周边部分内部。 ESD保护电路连接到第一焊盘，并且I / O电路连接到第二接合焊盘。 第一和第二接合线分别将第一和第二接合焊盘连接到相同的封装引脚。 第二接合线被配置为比第一接合线充分长，而与第一接合焊盘的间距无关。