公开(公告)号：US20180012802A1

公开(公告)日：2018-01-11

申请号：US15622250

申请日：2017-06-14

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： SHOGO OKITA ,  MITSURU HIROSHIMA ,  ATSUSHI HARIKAI ,  NORIYUKI MATSUBARA ,  AKIHIRO ITOU

IPC: H01L21/78 ,  H01L21/308 ,  H01L21/3065

CPC classification number: H01L21/78 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/31138

Abstract: A semiconductor chip manufacturing method includes preparing a semiconductor wafer including a front surface on which a bump is exposed, a rear surface located at a side opposite to the front surface, a plurality of element regions in each of which the bump is formed, and a dividing region defining each of the element regions, forming a mask which covers the bump and has an opening exposing the dividing region on the surface of the semiconductor wafer by spraying liquid which contains raw material of the mask along the bump by a spray coating method, and singulating the semiconductor wafer by exposing the surface of the semiconductor wafer to first plasma and etching the dividing region, which is exposed to the opening, until the rear surface is reached in a state where the bump is covered by the mask.

公开(公告)号：US20150225862A1

公开(公告)日：2015-08-13

申请号：US14604882

申请日：2015-01-26

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： YUJI ZENITANI ,  TAKASHI NISHIHARA ,  TETSUYA ASANO ,  AKIHIRO ITOU ,  SAIFULLAH BADAR

IPC: C25B9/08

CPC classification number: C25B9/08 ,  C25B3/00 ,  C25B11/0478 ,  C25B13/04

Abstract: An exemplary organic hydride conversion device for generating a hydrogen gas through organic hydride conversion according to the present disclosure comprises an anode containing a dehydrogenation catalyst, a cathode containing hydrogenation catalyst, and a proton conductor disposed between the anode and the cathode. The proton conductor has a perovskite crystal structure expressed by the compositional formula AaB1-xB′xO3-x. The A element is an alkaline-earth metal and is contained in a range of 0.4

Abstract translation: 根据本公开通过有机氢化物转化产生氢气的示例性有机氢化物转化装置包括含有脱氢催化剂的阳极，包含氢化催化剂的阴极和设置在阳极和阴极之间的质子导体。 质子导体具有由组成式AaB1-xB'xO3-x表示的钙钛矿晶体结构。 A元素是碱土金属，其含量在0.4

公开(公告)号：US20170345781A1

公开(公告)日：2017-11-30

申请号：US15594696

申请日：2017-05-15

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： ATSUSHI HARIKAI ,  SHOGO OKITA ,  AKIHIRO ITOU ,  KATSUMI TAKANO ,  MITSURU HIROSHIMA

IPC: H01L23/00 ,  H01L23/498 ,  H01L21/687 ,  H01L21/67 ,  H01L21/48 ,  H05K13/04 ,  B44C1/22

CPC classification number: H01L24/11 ,  B44C1/227 ,  H01L21/4853 ,  H01L21/67069 ,  H01L21/68742 ,  H01L23/49811 ,  H01L24/13 ,  H01L2224/11 ,  H05K13/0465

Abstract: An element chip manufacturing method includes a preparation process of preparing a substrate which includes a first surface having an exposed bump and a second surface opposite to the first surface and includes a plurality of element regions defined by dividing regions, a bump embedding process of embedding at least a head top part of the bump into the adhesive layer, a mask forming process of forming a mask in the second surface. The method for manufacturing the element chip includes a holding process of arranging the first surface to oppose a holding tape supported on a frame and holding the substrate on the holding tape, a placement process of placing the substrate on a stage provided inside of a plasma processing apparatus through the holding tape, after the mask forming process and the holding process.

公开(公告)号：US20180342424A1

公开(公告)日：2018-11-29

申请号：US15952342

申请日：2018-04-13

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： SHOGO OKITA ,  NORIYUKI MATSUBARA ,  ATSUSHI HARIKAI ,  AKIHIRO ITOU

IPC: H01L21/78 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/311 ,  H01L21/027 ,  G03F7/20 ,  G03F7/09 ,  G03F7/32 ,  G03F7/039 ,  G03F7/16

CPC classification number: H01L21/78 ,  G03F7/039 ,  G03F7/091 ,  G03F7/16 ,  G03F7/168 ,  G03F7/2002 ,  G03F7/2022 ,  G03F7/32 ,  H01J37/32724 ,  H01J2237/334 ,  H01L21/0274 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/31138

Abstract: A semiconductor chip manufacturing method includes forming a mask on a surface of a semiconductor wafer, forming an opening on the mask, exposing a dividing region of the semiconductor wafer, a rear surface of the semiconductor wafer is held by a dicing tape via an adhesive layer, singulating the semiconductor wafer into a plurality of semiconductor chips by etching the semiconductor wafer exposed to the opening with a first plasma until the semiconductor wafer reaches a rear surface, removing the mask so that the plurality of element chips from which the mask is removed are held by the holding sheet via the adhesive layer.At the time of removing the mask, the mask is removed from an alkaline developer having a dissolution rate of the mask larger than a dissolution rate of the adhesive layer.

公开(公告)号：US20180158713A1

公开(公告)日：2018-06-07

申请号：US15822568

申请日：2017-11-27

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： SHOGO OKITA ,  ATSUSHI HARIKAI ,  NORIYUKI MATSUBARA ,  AKIHIRO ITOU

IPC: H01L21/683 ,  H01L21/311 ,  H01L21/78 ,  H01L21/304 ,  H01L23/00

CPC classification number: H01L21/6836 ,  H01J37/00 ,  H01L21/304 ,  H01L21/31138 ,  H01L21/67069 ,  H01L21/67109 ,  H01L21/78 ,  H01L24/13 ,  H01L24/95 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2224/95001

Abstract: Provided is a method of manufacturing a semiconductor chip, the method comprising: preparing a plurality of semiconductor chips, each of which has a surface to which a BG tape is stuck, and a rear surface to which a DAF is stuck, and which are held spaced from each other by the BG tape and the DAF, exposing the DAF between semiconductor chips that are adjacent to each other when viewed from the surface side, by stripping the BG tape from the surface of each of the plurality of semiconductor chips, etching the DAF that is exposed between the semiconductor chips that are adjacent to each other, by irradiating the plurality of semiconductor chips held on the DAF, with plasma.

公开(公告)号：US20170263502A1

公开(公告)日：2017-09-14

申请号：US15428477

申请日：2017-02-09

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： SHOGO OKITA ,  ATSUSHI HARIKAI ,  AKIHIRO ITOU ,  NORIYUKI MATSUBARA ,  BUNZI MIZUNO

IPC: H01L21/78 ,  H01L21/3065 ,  H01L21/683 ,  H01L21/311 ,  H01L21/67

CPC classification number: H01L21/78 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/67069 ,  H01L21/67109 ,  H01L21/6831 ,  H01L21/6833 ,  H01L21/6836 ,  H01L21/68742 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/68381

Abstract: The method for manufacturing an element chip includes a mounting step and a plasma dicing step. In the mounting step, a semiconductor substrate with flexibility, which has a first main surface and a second main surface located at an opposite side of the first main surface, which has a plurality element regions and a dividing region for defining the element regions, and on which a mask for covering the first main surface in the element region and for exposing the first main surface in the dividing region is formed, is mounted on a stage. In the plasma dicing step, the semiconductor substrate is diced into a plurality of element chips including the element; region by exposing the first main surface side of the semiconductor substrate to plasma on the stage and etching from the first main surface side to the second main surface while forming a groove on the dividing region.

公开(公告)号：US20170345715A1

公开(公告)日：2017-11-30

申请号：US15594690

申请日：2017-05-15

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： ATSUSHI HARIKAI ,  SHOGO OKITA ,  AKIHIRO ITOU ,  KATSUMI TAKANO ,  MITSURU HIROSHIMA

IPC: H01L21/78 ,  H01L21/683 ,  H01L21/3065 ,  H01L23/00

CPC classification number: H01L21/78 ,  H01L21/3065 ,  H01L21/6836 ,  H01L24/11 ,  H01L24/14 ,  H01L2221/68327 ,  H01L2224/13022

Abstract: An element chip manufacturing method includes a preparation process of preparing a substrate which includes a first surface provided with a bump and a second surface and includes a plurality of element regions defined by dividing regions, a bump embedding process of adhering a protection tape having an adhesive layer to the first surface and embedding. The element chip manufacturing method includes a thinning process of grinding the second surface in a state where the protection tape is adhered to the first surface and thinning the substrate, after the bump embedding process, a mask forming process of forming a mask in the second surface and exposes the dividing regions, after the thinning process, a holding process of arranging the first surface to oppose a holding tape supported on a frame and holding the substrate on the holding tape.

公开(公告)号：US20170271194A1

公开(公告)日：2017-09-21

申请号：US15427590

申请日：2017-02-08

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： SHOGO OKITA ,  ATSUSHI HARIKAI ,  AKIHIRO ITOU

IPC: H01L21/687 ,  H01L21/67 ,  H01J37/32 ,  H01L21/3065

CPC classification number: H01L21/68785 ,  H01J37/32082 ,  H01J37/32715 ,  H01J37/32724 ,  H01J37/32935 ,  H01J37/3299 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/67069 ,  H01L21/67248 ,  H01L21/67259 ,  H01L21/67288 ,  H01L21/6831 ,  H01L21/68742

Abstract: A plasma processing method includes a mounting process of mounting a holding sheet holding a substrate in a stage provided in a plasma processing apparatus, and a fixing process of fixing the holding sheet to the stage. The plasma processing method further includes a determining process of determining whether or not a contact state of the holding sheet with the stage is good or bad after the fixing process, and a plasma etching process of etching the substrate by exposing a surface of the substrate to plasma on the stage, in a case in which the contact state is determined to be good in the determining process.

公开(公告)号：US20170263461A1

公开(公告)日：2017-09-14

申请号：US15427198

申请日：2017-02-08

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： NORIYUKI MATSUBARA ,  ATSUSHI HARIKAI ,  AKIHIRO ITOU

IPC: H01L21/3065 ,  H01L21/78 ,  H01L21/268 ,  H01L21/308 ,  H01L21/311

CPC classification number: H01L21/3065 ,  H01L21/268 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/31133 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/6831 ,  H01L21/68742 ,  H01L21/68785 ,  H01L21/78

Abstract: A plasma processing method includes an attaching process of attaching a resin film to a first main surface of a substrate which is provided with the first main surface and a second main surface on an opposite side of the first main surface and a patterning process of forming a mask, which includes an opening exposing a region to be processed of the substrate, by patterning the resin film. The plasma processing method includes a first plasma process of generating first plasma of first gas in a depressurized atmosphere including the first gas, exposing the mask to the first plasma, and reducing a void between the mask and the first main surface. The plasma processing method includes a second plasma process of generating second plasma from second gas in atmosphere including the second gas, exposing the region to be processed exposed from the opening to the second plasma, and etching the region to be processed.

公开(公告)号：US20150225859A1

公开(公告)日：2015-08-13

申请号：US14606972

申请日：2015-01-27

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： YUJI ZENITANI ,  TAKASHI NISHIHARA ,  TETSUYA ASANO ,  AKIHIRO ITOU ,  HIROKI TAKEUCHI

IPC: C25B1/02 ,  C25B9/08

CPC classification number: C25B1/02 ,  C01B3/505 ,  C25B9/08 ,  C25B13/04

Abstract: An exemplary dehydrogenation device for generating a hydrogen gas through dehydrogenation according to the present disclosure comprises an anode containing a dehydrogenation catalyst, a cathode containing catalyst capable of reducing protons, and a proton conductor disposed between the anode and the cathode. The proton conductor has a perovskite crystal structure expressed by the compositional formula AaB1-xB′xO3-δ. The A element is an alkaline-earth metal and is contained in a range of 0.4

Abstract translation: 根据本发明的用于通过脱氢产生氢气的示例性脱氢装置包括含有脱氢催化剂的阳极，能够还原质子的含阴极的催化剂，以及设置在阳极和阴极之间的质子导体。 质子导体具有由组成式AaB1-xB'xO3-δ表示的钙钛矿晶体结构。 A元素是碱土金属，其含量在0.4