公开(公告)号：US09093546B2

公开(公告)日：2015-07-28

申请号：US14066740

申请日：2013-10-30

Applicant: Renesas Electronics Corporation

Inventor： Hiroshi Uozaki ,  Yasuhiro Takeda ,  Keiichi Maekawa ,  Takumi Hasegawa ,  Kota Funayama ,  Yoshiki Maruyama ,  Kazutoshi Shiba ,  Shuichi Kudo

IPC: H01L29/788 ,  H01L27/11 ,  H01L21/28 ,  H01L27/105 ,  H01L27/115 ,  H01L29/423 ,  H01L29/792

CPC classification number: H01L29/788 ,  H01L21/28282 ,  H01L27/105 ,  H01L27/1104 ,  H01L27/11573 ,  H01L29/401 ,  H01L29/42344 ,  H01L29/792

Abstract: An object is to provide a semiconductor device having improved reliability by preventing, in forming a nonvolatile memory and MOSFETS on the same substrate, an increase in the size of grains in a gate electrode. The object can be achieved by forming the control gate electrode of the nonvolatile memory and the gate electrodes of the other MOSFETs from films of the same layer, respectively, and configuring each of the control gate electrode and the gate electrodes from a stack of two polysilicon film layers.

Abstract translation: 本发明的目的是通过在同一基板上形成非易失性存储器和MOSFETS来防止栅极电极中的晶粒尺寸的增加来提供具有改善的可靠性的半导体器件。 可以通过分别从相同层的膜形成非易失性存储器的控制栅电极和其它MOSFET的栅电极并且从两个多晶硅的堆叠中配置每个控制栅电极和栅电极来实现该目的 电影层。

公开(公告)号：US09564540B2

公开(公告)日：2017-02-07

申请号：US14803037

申请日：2015-07-18

Applicant: Renesas Electronics Corporation

Inventor： Hiroshi Uozaki ,  Yasuhiro Takeda ,  Keiichi Maekawa ,  Takumi Hasegawa ,  Kota Funayama ,  Yoshiki Maruyama ,  Kazutoshi Shiba ,  Shuichi Kudo

IPC: H01L21/3205 ,  H01L29/788 ,  H01L27/11 ,  H01L29/40 ,  H01L21/28 ,  H01L27/105 ,  H01L27/115 ,  H01L29/423 ,  H01L29/792

CPC classification number: H01L29/788 ,  H01L21/28282 ,  H01L27/105 ,  H01L27/1104 ,  H01L27/11573 ,  H01L29/401 ,  H01L29/42344 ,  H01L29/792

Abstract: An object is to provide a semiconductor device having improved reliability by preventing, in forming a nonvolatile memory and MOSFETS on the same substrate, an increase in the size of grains in a gate electrode. The object can be achieved by forming the control gate electrode of the nonvolatile memory and the gate electrodes of the other MOSFETs from films of the same layer, respectively, and configuring each of the control gate electrode and the gate electrodes from a stack of two polysilicon film layers.

Abstract translation: 本发明的目的是通过在同一基板上形成非易失性存储器和MOSFETS来防止栅极电极中的晶粒尺寸的增加来提供具有改善的可靠性的半导体器件。 可以通过分别从相同层的膜形成非易失性存储器的控制栅电极和其它MOSFET的栅电极并且从两个多晶硅的堆叠中配置每个控制栅电极和栅电极来实现该目的 电影层。

公开(公告)号：US11289363B2

公开(公告)日：2022-03-29

申请号：US16872766

申请日：2020-05-12

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shigeo Tokumitsu ,  Yoshiki Maruyama ,  Satoshi Iida

IPC: H01L21/74 ,  H01L23/48 ,  H01L23/528 ,  H01L21/768 ,  H01L29/66 ,  H01L21/306

Abstract: A method of manufacturing a semiconductor device includes: providing a substrate, forming a first opening, forming a first insulating layer, forming a second opening, embedding a conductive layer, forming a protective layer, and performing CMP. The substrate includes a semiconductor substrate and a semiconducting layer. The conductive layer is embedded in the second opening so that a gap along a thickness direction of the semiconducting layer is formed. The protective layer is formed in the second opening on at least a portion of a surfaces of the conductive layer. In the CMP step, a portion of the conductive layers formed outside the second opening is removed.

公开(公告)号：US20150333139A1

公开(公告)日：2015-11-19

申请号：US14803037

申请日：2015-07-18

Applicant: Renesas Electronics Corporation

Inventor： Hiroshi Uozaki ,  Yasuhiro Takeda ,  Keiichi Maekawa ,  Takumi Hasegawa ,  Kota Funayama ,  Yoshiki Maruyama ,  Kazutoshi Shiba ,  Shuichi Kudo

IPC: H01L29/423 ,  H01L29/40

CPC classification number: H01L29/788 ,  H01L21/28282 ,  H01L27/105 ,  H01L27/1104 ,  H01L27/11573 ,  H01L29/401 ,  H01L29/42344 ,  H01L29/792

Abstract: An object is to provide a semiconductor device having improved reliability by preventing, in forming a nonvolatile memory and MOSFETS on the same substrate, an increase in the size of grains in a gate electrode. The object can be achieved by forming the control gate electrode of the nonvolatile memory and the gate electrodes of the other MOSFETs from films of the same layer, respectively, and configuring each of the control gate electrode and the gate electrodes from a stack of two polysilicon film layers.

Abstract translation: 本发明的目的是通过在同一基板上形成非易失性存储器和MOSFETS来防止栅极电极中的晶粒尺寸的增加来提供具有改善的可靠性的半导体器件。 可以通过分别从相同层的膜形成非易失性存储器的控制栅电极和其它MOSFET的栅电极并且从两个多晶硅的堆叠中配置每个控制栅电极和栅电极来实现该目的 电影层。

公开(公告)号：US20140138758A1

公开(公告)日：2014-05-22

申请号：US14066740

申请日：2013-10-30

Applicant: Renesas Electronics Corporation

Inventor： Hiroshi Uozaki ,  Yasuhiro Takeda ,  Keiichi Maekawa ,  Takumi Hasegawa ,  Kota Funayama ,  Yoshiki Maruyama ,  Kazutoshi Shiba ,  Shuichi Kudo

IPC: H01L29/423 ,  H01L29/788 ,  H01L27/11 ,  H01L21/28

CPC classification number: H01L29/788 ,  H01L21/28282 ,  H01L27/105 ,  H01L27/1104 ,  H01L27/11573 ,  H01L29/401 ,  H01L29/42344 ,  H01L29/792

Abstract: An object is to provide a semiconductor device having improved reliability by preventing, in forming a nonvolatile memory and MOSFETS on the same substrate, an increase in the size of grains in a gate electrode. The object can be achieved by forming the control gate electrode of the nonvolatile memory and the gate electrodes of the other MOSFETs from films of the same layer, respectively, and configuring each of the control gate electrode and the gate electrodes from a stack of two polysilicon film layers.

Abstract translation: 本发明的目的是通过在同一基板上形成非易失性存储器和MOSFETS来防止栅极电极中的晶粒尺寸的增加来提供具有改善的可靠性的半导体器件。 可以通过分别从相同层的膜形成非易失性存储器的控制栅电极和其它MOSFET的栅电极并且从两个多晶硅的堆叠中配置每个控制栅电极和栅电极来实现该目的 电影层。

公开(公告)号：US09514946B2

公开(公告)日：2016-12-06

申请号：US14712903

申请日：2015-05-14

Applicant: Renesas Electronics Corporation

Inventor： Masao Inoue ,  Yoshiki Maruyama ,  Tomoya Saito ,  Atsushi Yoshitomi

IPC: H01L21/02 ,  H01L21/28 ,  H01L29/51 ,  H01L29/423 ,  H01L29/66 ,  H01L29/792

CPC classification number: H01L21/28282 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L29/4234 ,  H01L29/42364 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66833 ,  H01L29/792

Abstract: An improvement is achieved in the performance of a semiconductor device including a memory element. Over a semiconductor substrate, a gate electrode for the memory element is formed via an insulating film as a gate insulating film for the memory element. The insulating film includes first, second, third, fourth, and fifth insulating films in order of being apart from the substrate. The second insulating film has a charge storing function. The band gap of each of the first and third insulating films is larger than a band gap of the second insulating film. The band gap of the fourth insulating film is smaller than the band gap of the third insulating film. The band gap of the fifth insulating film is smaller than the band gap of the fourth insulating film.

Abstract translation: 在包括存储元件的半导体器件的性能方面实现了改进。 在半导体衬底上，用于存储元件的栅电极经由作为存储元件的栅极绝缘膜的绝缘膜形成。 绝缘膜按照与基板分开的顺序包括第一，第二，第三，第四和第五绝缘膜。 第二绝缘膜具有电荷存储功能。 第一和第三绝缘膜中的每一个的带隙大于第二绝缘膜的带隙。 第四绝缘膜的带隙小于第三绝缘膜的带隙。 第五绝缘膜的带隙小于第四绝缘膜的带隙。

公开(公告)号：US09356110B2

公开(公告)日：2016-05-31

申请号：US14173074

申请日：2014-02-05

Applicant: Renesas Electronics Corporation

Inventor： Masao Inoue ,  Yoshiki Maruyama ,  Akio Nishida ,  Yorinobu Kunimune ,  Kota Funayama

IPC: H01L21/28 ,  H01L29/40 ,  H01L29/49 ,  H01L29/423 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/4925 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/28035 ,  H01L21/28176 ,  H01L21/28273 ,  H01L29/42324 ,  H01L29/4916 ,  H01L29/66825

Abstract: To control a grain growth on laminated polysilicon films, a method of manufacturing a semiconductor device is provided. The method includes: forming a first polysilicon film (21) on a substrate (10); forming an interlayer oxide layer (22) on a surface of the first polysilicon film (21); forming a second polysilicon film (23) in contact with the interlayer oxide layer (22) above the first polysilicon film (21); and performing annealing at a temperature higher than a film formation temperature of the first and second polysilicon films in a gas atmosphere containing nitrogen, after formation of the second polysilicon film (23).

Abstract translation: 为了控制层叠多晶硅膜上的晶粒生长，提供了制造半导体器件的方法。 该方法包括：在衬底（10）上形成第一多晶硅膜（21）; 在所述第一多晶硅膜（21）的表面上形成层间氧化物层（22）; 形成与第一多晶硅膜（21）上方的层间氧化物层（22）接触的第二多晶硅膜（23）。 在形成第二多晶硅膜（23）之后，在含氮气体气氛中，在高于第一和第二多晶硅膜的成膜温度的温度下进行退火。

公开(公告)号：US20150349143A1

公开(公告)日：2015-12-03

申请号：US14712903

申请日：2015-05-14

Applicant: Renesas Electronics Corporation

Inventor： Masao Inoue ,  Yoshiki Maruyama ,  Tomoya Saito ,  Atsushi Yoshitomi

IPC: H01L29/792 ,  H01L21/02 ,  H01L21/28 ,  H01L29/51 ,  H01L29/423

CPC classification number: H01L21/28282 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L29/4234 ,  H01L29/42364 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66833 ,  H01L29/792

Abstract: An improvement is achieved in the performance of a semiconductor device including a memory element. Over a semiconductor substrate, a gate electrode for the memory element is formed via an insulating film as a gate insulating film for the memory element. The insulating film includes first, second, third, fourth, and fifth insulating films in order of being apart from the substrate. The second insulating film has a charge storing function. The band gap of each of the first and third insulating films is larger than a band gap of the second insulating film. The band gap of the fourth insulating film is smaller than the band gap of the third insulating film. The band gap of the fifth insulating film is smaller than the band gap of the fourth insulating film.

Abstract translation: 在包括存储元件的半导体器件的性能方面实现了改进。 在半导体衬底上，用于存储元件的栅电极经由作为存储元件的栅极绝缘膜的绝缘膜形成。 绝缘膜按照与基板分开的顺序包括第一，第二，第三，第四和第五绝缘膜。 第二绝缘膜具有电荷存储功能。 第一和第三绝缘膜中的每一个的带隙大于第二绝缘膜的带隙。 第四绝缘膜的带隙小于第三绝缘膜的带隙。 第五绝缘膜的带隙小于第四绝缘膜的带隙。