公开(公告)号：US09093546B2

公开(公告)日：2015-07-28

申请号：US14066740

申请日：2013-10-30

Applicant: Renesas Electronics Corporation

Inventor： Hiroshi Uozaki ,  Yasuhiro Takeda ,  Keiichi Maekawa ,  Takumi Hasegawa ,  Kota Funayama ,  Yoshiki Maruyama ,  Kazutoshi Shiba ,  Shuichi Kudo

IPC: H01L29/788 ,  H01L27/11 ,  H01L21/28 ,  H01L27/105 ,  H01L27/115 ,  H01L29/423 ,  H01L29/792

CPC classification number: H01L29/788 ,  H01L21/28282 ,  H01L27/105 ,  H01L27/1104 ,  H01L27/11573 ,  H01L29/401 ,  H01L29/42344 ,  H01L29/792

Abstract: An object is to provide a semiconductor device having improved reliability by preventing, in forming a nonvolatile memory and MOSFETS on the same substrate, an increase in the size of grains in a gate electrode. The object can be achieved by forming the control gate electrode of the nonvolatile memory and the gate electrodes of the other MOSFETs from films of the same layer, respectively, and configuring each of the control gate electrode and the gate electrodes from a stack of two polysilicon film layers.

Abstract translation: 本发明的目的是通过在同一基板上形成非易失性存储器和MOSFETS来防止栅极电极中的晶粒尺寸的增加来提供具有改善的可靠性的半导体器件。 可以通过分别从相同层的膜形成非易失性存储器的控制栅电极和其它MOSFET的栅电极并且从两个多晶硅的堆叠中配置每个控制栅电极和栅电极来实现该目的 电影层。

公开(公告)号：US09564540B2

公开(公告)日：2017-02-07

申请号：US14803037

申请日：2015-07-18

Applicant: Renesas Electronics Corporation

Inventor： Hiroshi Uozaki ,  Yasuhiro Takeda ,  Keiichi Maekawa ,  Takumi Hasegawa ,  Kota Funayama ,  Yoshiki Maruyama ,  Kazutoshi Shiba ,  Shuichi Kudo

IPC: H01L21/3205 ,  H01L29/788 ,  H01L27/11 ,  H01L29/40 ,  H01L21/28 ,  H01L27/105 ,  H01L27/115 ,  H01L29/423 ,  H01L29/792

CPC classification number: H01L29/788 ,  H01L21/28282 ,  H01L27/105 ,  H01L27/1104 ,  H01L27/11573 ,  H01L29/401 ,  H01L29/42344 ,  H01L29/792

Abstract: An object is to provide a semiconductor device having improved reliability by preventing, in forming a nonvolatile memory and MOSFETS on the same substrate, an increase in the size of grains in a gate electrode. The object can be achieved by forming the control gate electrode of the nonvolatile memory and the gate electrodes of the other MOSFETs from films of the same layer, respectively, and configuring each of the control gate electrode and the gate electrodes from a stack of two polysilicon film layers.

Abstract translation: 本发明的目的是通过在同一基板上形成非易失性存储器和MOSFETS来防止栅极电极中的晶粒尺寸的增加来提供具有改善的可靠性的半导体器件。 可以通过分别从相同层的膜形成非易失性存储器的控制栅电极和其它MOSFET的栅电极并且从两个多晶硅的堆叠中配置每个控制栅电极和栅电极来实现该目的 电影层。

公开(公告)号：US09240330B2

公开(公告)日：2016-01-19

申请号：US13795731

申请日：2013-03-12

Applicant: Renesas Electronics Corporation

Inventor： Yasuhiro Takeda ,  Takao Kumihashi ,  Hiroshi Yanagita ,  Takashi Takeuchi ,  Yasushi Matsuda

IPC: H01L21/48 ,  H01L21/768 ,  H01L23/48 ,  H01L21/66 ,  H01L25/065 ,  H01L23/00 ,  H01L21/683

CPC classification number: H01L23/481 ,  H01L21/486 ,  H01L21/6836 ,  H01L21/76852 ,  H01L21/76898 ,  H01L22/14 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05655 ,  H01L2224/06181 ,  H01L2224/11462 ,  H01L2224/13022 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/81192 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2224/05552

Abstract: The TSV technology has been popular as one of stacking technologies of a plurality of semiconductor chips. It has however been revealed by the present inventors that when TSV is formed using a so-called first via process, via middle process, front-via via last process, or the like, there is a possibility of defects such as gate breakdown occurring due to electrostatic breakdown in the subsequent process. In order to overcome the above problem, the present invention provides a method of manufacturing a semiconductor integrated circuit device, in which a through via electrode is formed by forming a hole in a semiconductor substrate, forming an insulating member in the hole, and burying a conductive member in the resulting hole while covering a portion of the hole except for the bottom portion with the insulating member.

Abstract translation: TSV技术作为多个半导体芯片的堆叠技术之一已经普及。 然而，本发明人已经公开，当使用所谓的第一通孔工艺，经由中间工艺，前通孔经由最后工艺等形成TSV时，存在诸如门击穿发生的缺陷的可能性 在随后的过程中进行静电击穿。 为了克服上述问题，本发明提供了一种制造半导体集成电路器件的方法，其中通孔形成在半导体衬底中形成孔，在孔中形成绝缘构件，并埋入 导电构件，同时用绝缘构件覆盖除了底部的孔的一部分。

公开(公告)号：US20150333139A1

公开(公告)日：2015-11-19

申请号：US14803037

申请日：2015-07-18

Applicant: Renesas Electronics Corporation

Inventor： Hiroshi Uozaki ,  Yasuhiro Takeda ,  Keiichi Maekawa ,  Takumi Hasegawa ,  Kota Funayama ,  Yoshiki Maruyama ,  Kazutoshi Shiba ,  Shuichi Kudo

IPC: H01L29/423 ,  H01L29/40

CPC classification number: H01L29/788 ,  H01L21/28282 ,  H01L27/105 ,  H01L27/1104 ,  H01L27/11573 ,  H01L29/401 ,  H01L29/42344 ,  H01L29/792

Abstract: An object is to provide a semiconductor device having improved reliability by preventing, in forming a nonvolatile memory and MOSFETS on the same substrate, an increase in the size of grains in a gate electrode. The object can be achieved by forming the control gate electrode of the nonvolatile memory and the gate electrodes of the other MOSFETs from films of the same layer, respectively, and configuring each of the control gate electrode and the gate electrodes from a stack of two polysilicon film layers.

Abstract translation: 本发明的目的是通过在同一基板上形成非易失性存储器和MOSFETS来防止栅极电极中的晶粒尺寸的增加来提供具有改善的可靠性的半导体器件。 可以通过分别从相同层的膜形成非易失性存储器的控制栅电极和其它MOSFET的栅电极并且从两个多晶硅的堆叠中配置每个控制栅电极和栅电极来实现该目的 电影层。

公开(公告)号：US20140138758A1

公开(公告)日：2014-05-22

申请号：US14066740

申请日：2013-10-30

Applicant: Renesas Electronics Corporation

Inventor： Hiroshi Uozaki ,  Yasuhiro Takeda ,  Keiichi Maekawa ,  Takumi Hasegawa ,  Kota Funayama ,  Yoshiki Maruyama ,  Kazutoshi Shiba ,  Shuichi Kudo

IPC: H01L29/423 ,  H01L29/788 ,  H01L27/11 ,  H01L21/28

CPC classification number: H01L29/788 ,  H01L21/28282 ,  H01L27/105 ,  H01L27/1104 ,  H01L27/11573 ,  H01L29/401 ,  H01L29/42344 ,  H01L29/792

Abstract: An object is to provide a semiconductor device having improved reliability by preventing, in forming a nonvolatile memory and MOSFETS on the same substrate, an increase in the size of grains in a gate electrode. The object can be achieved by forming the control gate electrode of the nonvolatile memory and the gate electrodes of the other MOSFETs from films of the same layer, respectively, and configuring each of the control gate electrode and the gate electrodes from a stack of two polysilicon film layers.

Abstract translation: 本发明的目的是通过在同一基板上形成非易失性存储器和MOSFETS来防止栅极电极中的晶粒尺寸的增加来提供具有改善的可靠性的半导体器件。 可以通过分别从相同层的膜形成非易失性存储器的控制栅电极和其它MOSFET的栅电极并且从两个多晶硅的堆叠中配置每个控制栅电极和栅电极来实现该目的 电影层。