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    SEMICONDUCTOR APPARATUS
    3.
    发明申请
    SEMICONDUCTOR APPARATUS 有权

    公开(公告)号：US20210098572A1

    公开(公告)日：2021-04-01

    申请号：US16922109

    申请日：2020-07-07

    Applicant: ROHM CO., LTD.

    Inventor： Keishi WATANABE

    IPC: H01L29/06 ,  H01L27/08 ,  H01L23/00 ,  H01L29/866

    Abstract: The present invention provides a diode chip, including: a semiconductor chip, including a p-type first semiconductor layer and an n-type second semiconductor layer formed on the first semiconductor layer; a first pad separation trench, formed on the semiconductor chip in a manner of penetrating the second semiconductor layer till reaching the first semiconductor layer, and forming a first internal parasitic capacitance between the first semiconductor layer and the second semiconductor layer by separating a portion of the semiconductor chip from other regions; an inter-insulation layer, covering the second semiconductor layer; and a first electrode layer, being opposite to the region separated by the first pad separation trench with the inter-insulation layer interposed in between, and forming, between the first electrode layer and the semiconductor chip, a first external parasitic capacitance connected in series to the first internal parasitic capacitance.

    DIODE CHIP
    4.
    发明申请
    DIODE CHIP 有权

    公开(公告)号：US20210098449A1

    公开(公告)日：2021-04-01

    申请号：US17018486

    申请日：2020-09-11

    Applicant: ROHM CO., LTD.

    Inventor： Keishi WATANABE ,  Junya YAMAGAMI

    IPC: H01L27/08

    Abstract: The present disclosure provides a diode chip capable of attaining excellent electrical characteristics.
    The present disclosure provides a diode chip (1), including: a semiconductor chip (10) having a first main surface (11); a first pin junction portion (31) formed on a surface of the first main surface (11) with a first polarity direction; a first diode pair (37) (rectifier pair) including a first pn junction portion (35) separated from the first pin junction portion (31) and formed in the semiconductor chip (10) with the first polarity direction and a first reversed pin junction portion (38) connected to the first pn junction portion (35) in reversed direction and formed on the first main surface (11) with a second polarity direction; and a first junction separation trench (46) formed on the first main surface (11) in a manner of separating the first pin junction portion (31) and the first diode pair (37).

    CHIP PARTS
    5.
    发明申请
    CHIP PARTS 有权
    芯片部件

    公开(公告)号：US20150332842A1

    公开(公告)日：2015-11-19

    申请号：US14713684

    申请日：2015-05-15

    Applicant: ROHM CO., LTD.

    Inventor： Takuma SHIMOICHI ,  Yasuhiro KONDO ,  Keishi WATANABE ,  Takamichi TORII ,  Katsuya MATSUURA

    IPC: H01F27/29 ,  H01F27/28 ,  H01G4/30 ,  H01G4/228 ,  H01C1/01 ,  H01C1/14

    CPC classification number: H01C1/01 ,  H01C1/02 ,  H01C1/14 ,  H01C1/142 ,  H01C7/006 ,  H01C13/02 ,  H01C17/267 ,  H01F17/0006 ,  H01F27/2804 ,  H01F27/292 ,  H01F2017/0026 ,  H01G4/228 ,  H01G4/30 ,  H01G4/33 ,  H01L23/5228 ,  H01L23/647 ,  H01L28/20 ,  H05K1/0293 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167

    Abstract: A chip part is provided that includes a substrate 2 in which an element region 5 and an electrode region 16 are set, an insulating film (a first insulating film 9 and a second insulating film 3) which is formed on the substrate 2 and which selectively includes an internal concave/convex structure 18 in the electrode region 16 on a surface, a first connection electrode 3 and a second connection electrode 4 which include, at a bottom portion, an anchor portion 24 entering the concave portion 17 of the internal concave/convex structure 18 and which include an external concave/convex structure 6, 7 on a surface on the opposite side and a circuit element which is disposed in the element region 5 and which is electrically connected to the first connection electrode 3 and the second connection electrode 4.

    Abstract translation: 提供了芯片部件，其包括其中设置有元件区域5和电极区域16的基板2，形成在基板2上的绝缘膜（第一绝缘膜9和第二绝缘膜3），并且选择性地 包括在表面上的电极区域16中的内部凹凸结构18，第一连接电极3和第二连接电极4，第一连接电极3和第二连接电极4在底部包括进入内凹/ 凸形结构18，其在相反侧的表面上包括外部凹凸结构6,7，以及设置在元件区域5中并与第一连接电极3和第二连接电极电连接的电路元件 4。

    CHIP PARTS
    7.
    发明申请
    CHIP PARTS 审中-公开

    公开(公告)号：US20180005732A1

    公开(公告)日：2018-01-04

    申请号：US15703954

    申请日：2017-09-13

    Applicant: ROHM CO., LTD.

    Inventor： Takuma SHIMOICHI ,  Yasuhiro KONDO ,  Keishi WATANABE ,  Takamichi TORII ,  Katsuya MATSUURA

    IPC: H01C1/01 ,  H01G4/228 ,  H01F17/00 ,  H01C1/14 ,  H01F27/28 ,  H01G4/30 ,  H01F27/29

    Abstract: A chip part is provided that includes a substrate in which an element region and an electrode region are set, an insulating film (a first insulating film and a second insulating film) which is formed on the substrate and which selectively includes an internal concave/convex structure in the electrode region on a surface, a first connection electrode and a second connection electrode which include, at a bottom portion, an anchor portion entering the concave portion of the internal concave/convex structure and which include an external concave/convex structure on a surface on the opposite side and a circuit element which is disposed in the element region and which is electrically connected to the first connection electrode and the second connection electrode.

    CHIP CAPACITOR
    10.
    发明申请
    CHIP CAPACITOR 审中-公开

    公开(公告)号：US20170309404A1

    公开(公告)日：2017-10-26

    申请号：US15492109

    申请日：2017-04-20

    Applicant: ROHM CO., LTD.

    Inventor： Keishi WATANABE ,  Yasuhiro KONDO

    IPC: H01G4/30 ,  H01G4/228 ,  H01G4/012

    CPC classification number: H01G4/30 ,  H01G2/06 ,  H01G4/012 ,  H01G4/232 ,  H01G4/33

    Abstract: A chip capacitor includes a substrate having a main surface, a first conductive film including a first connecting region and a first capacitor forming region and formed on the main surface of the substrate, a dielectric film covering the first capacitor forming region of the first conductive film, a second conductive film including a second connecting region facing to the first capacitor forming region of the first conductive film across the dielectric film, and a second capacitor forming region facing to the first capacitor forming region of the first conductive film across the dielectric film, a first external electrode electrically connected to the first connecting region of the first conductive film, and a second external electrode electrically connected to the second connecting region of the second conductive film.

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