Abstract:
A chip part includes a substrate, an element formed on the substrate, and an electrode formed on the substrate. A recess and/or projection expressing information related to the element is formed at a peripheral edge portion of the substrate.
Abstract:
The chip part of the present invention includes a substrate, an electrode on the substrate and having a front surface in which a plurality of recessed portions are formed toward the thickness direction thereof, and an element region having a circuit element that is electrically connected to the electrode.
Abstract:
A Schottky barrier diode includes a semiconductor layer having a major surface, a diode region of a first conductivity type formed in a surface layer portion of the semiconductor layer, a first conductivity type impurity region formed in the surface layer portion of the semiconductor layer and electrically connected to the diode region, a first electrode layer formed on the major surface of the semiconductor layer and forming a Schottky junction with the diode region, a second electrode layer formed on the major surface of the semiconductor layer and forming an ohmic junction with the first conductivity type impurity region, and a contact electrode layer formed on a peripheral region of the major surface of the semiconductor layer surrounding the first electrode layer so as to be electrically connected to the diode region via the semiconductor layer and being electrically connected to the second electrode layer.
Abstract:
A chip part according to the present invention includes a substrate having a penetrating hole, a pair of electrodes formed on a front surface of the substrate and including one electrode overlapping the penetrating hole in a plan view and another electrode facing the one electrode, and an element formed on the front surface side of the substrate and electrically connected to the pair of electrodes.
Abstract:
A chip capacitor according to the present invention includes a substrate, a pair of external electrodes formed on the substrate, a capacitor element connected between the pair of external electrodes, and a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element. Also, a circuit assembly according to the present invention includes the chip capacitor according to the present invention and a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.
Abstract:
A discrete capacitor of the present invention includes a substrate having a front surface portion, an impurity diffusion layer formed on the front surface portion of the substrate, an oxide film formed on the substrate and having a first opening to selectively expose the impurity diffusion layer, a dielectric film formed on the impurity region having been exposed from the oxide film, and a first electrode opposed to the impurity diffusion layer with the dielectric film therebetween, wherein the impurity concentration on the front surface portion of the impurity diffusion layer is 5×1019 cm−3 or more.
Abstract translation:本发明的分立电容器包括:具有表面部分的基板,形成在基板的前表面部分上的杂质扩散层;形成在基板上的氧化膜,并具有用于选择性地暴露杂质扩散层的第一开口; 形成在从该氧化膜露出的杂质区域上的电介质膜和与该杂质扩散层相对的该杂质扩散层的第一电极,其中该杂质扩散层前表面部分的杂质浓度为5×1019 cm -3以上。
Abstract:
A bidirectional Zener diode of the present invention includes a semiconductor substrate of a first conductivity type, a first electrode and a second electrode which are defined on the semiconductor substrate, and a plurality of diffusion regions of a second conductivity type, which are defined at intervals from one another on a surface portion of the semiconductor substrate, to define p-n junctions with the semiconductor substrate, and the plurality of diffusion regions include diode regions which are electrically connected to the first electrode and the second electrode, and pseudo-diode regions which are electrically isolated from the first electrode and the second electrode.
Abstract:
The present invention is directed to a chip diode with a Zener voltage Vz of 4.0 V to 5.5 V, including a semiconductor substrate having a resistivity of 3 mΩ·cm to 5 mΩ·cm and a diffusion layer formed on a surface of the semiconductor substrate and defining a diode junction region with the semiconductor substrate therebetween, in which the diffusion layer has a depth of 0.01 μm to 0.2 μm from the surface of the semiconductor substrate.
Abstract:
A chip resistor includes a substrate, and a plurality of resistor elements each having a resistive film provided on the substrate and an interconnection film provided on the resistive film in contact with the resistive film. An electrode is provided on the substrate. Fuses disconnectably connect the resistor elements to the electrode. The resistive film is made of at least one material selected from the group of NiCr, NiCrAl, NiCrSi, NiCrSiAl, TaN, TaSiO2, TiN, TiNO and TiSiON.
Abstract:
A chip capacitor according to the present invention includes a substrate, a pair of external electrodes formed on the substrate, a capacitor element connected between the pair of external electrodes, and a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element. Also, a circuit assembly according to the present invention includes the chip capacitor according to the present invention and a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.