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    CHIP CAPACITOR
    1.
    发明申请
    CHIP CAPACITOR 审中-公开

    公开(公告)号：US20170309404A1

    公开(公告)日：2017-10-26

    申请号：US15492109

    申请日：2017-04-20

    Applicant: ROHM CO., LTD.

    Inventor： Keishi WATANABE ,  Yasuhiro KONDO

    IPC: H01G4/30 ,  H01G4/228 ,  H01G4/012

    CPC classification number: H01G4/30 ,  H01G2/06 ,  H01G4/012 ,  H01G4/232 ,  H01G4/33

    Abstract: A chip capacitor includes a substrate having a main surface, a first conductive film including a first connecting region and a first capacitor forming region and formed on the main surface of the substrate, a dielectric film covering the first capacitor forming region of the first conductive film, a second conductive film including a second connecting region facing to the first capacitor forming region of the first conductive film across the dielectric film, and a second capacitor forming region facing to the first capacitor forming region of the first conductive film across the dielectric film, a first external electrode electrically connected to the first connecting region of the first conductive film, and a second external electrode electrically connected to the second connecting region of the second conductive film.

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220140141A1

    公开(公告)日：2022-05-05

    申请号：US17428555

    申请日：2020-02-07

    Applicant: ROHM CO., LTD.

    Inventor： Kentaro NASU ,  Yasuhiro KONDO ,  Takaaki YOSHIOKA

    IPC: H01L29/78 ,  H01L29/16 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66

    Abstract: A semiconductor device includes a semiconductor layer that has a main surface, a trench gate structure that includes a trench formed in the main surface and having a first sidewall at one side, a second sidewall at the other side and a bottom wall in a cross-sectional view, an insulation layer formed on an inner wall of the trench, and a gate electrode embedded in the trench with the insulation layer between the trench and the gate electrode and having an upper end portion positioned at a bottom-wall side with respect to the main surface, a plurality of first-conductivity-type drift regions that are respectively formed in a region at the first sidewall side of the trench and in a region at the second sidewall side of the trench such as to face each other with the trench interposed therebetween in a surface layer portion of the main surface and that are positioned in a region at the main surface side with respect to the bottom wall, and a plurality of first-conductivity-type source/drain regions that are formed in surface layer portions of the plurality of drift regions, respectively.

    CHIP RESISTOR AND ELECTRONIC EQUIPMENT HAVING RESISTANCE CIRCUIT NETWORK
    4.
    发明申请
    CHIP RESISTOR AND ELECTRONIC EQUIPMENT HAVING RESISTANCE CIRCUIT NETWORK 有权
    芯片电阻和具有电阻电路网络的电子设备

    公开(公告)号：US20160087027A1

    公开(公告)日：2016-03-24

    申请号：US14956939

    申请日：2015-12-02

    Applicant: ROHM CO., LTD.

    Inventor： Hiroshi TAMAGAWA ,  Yasuhiro KONDO ,  Yasuhiro FUWA ,  Hiroyuki OKADA ,  Eiji NUKAGA ,  Katsuya MATSUURA

    IPC: H01L49/02 ,  H01L21/3065

    CPC classification number: H01L28/20 ,  H01C1/14 ,  H01C13/02 ,  H01C17/006 ,  H01C17/242 ,  H01L21/3065 ,  H01L21/3083 ,  H01L27/0676 ,  H01L27/0802 ,  H05K3/3431 ,  H05K2201/10674

    Abstract: A compact and refined chip resistor, with which a plurality of types of required resistance values can be accommodated readily with the same design structure, was desired. The chip resistor is arranged to have a resistor network on a substrate. The resistor network includes a plurality of resistor bodies arrayed in a matrix and having an equal resistance value. A plurality of types of resistance units are respectively arranged by one or a plurality of the resistor bodies being connected electrically. The plurality of types of resistance units are connected in a predetermined mode using connection conductor films and fuse films. By selectively fusing a fuse film, a resistance unit can be electrically incorporated into the resistor network or electrically separated from the resistor network to make the resistance value of the resistor network the required resistance value.

    Abstract translation: 希望能够以相同的设计结构容易地容纳多种类型的所需电阻值的紧凑且精细的芯片电阻器。 芯片电阻被布置成在基板上具有电阻网络。 电阻网络包括排列成矩阵并具有相等电阻值的多个电阻体。 多个电阻单元分别由电气连接的一个或多个电阻体排列。 多种类型的电阻单元使用连接导体膜和熔丝膜以预定模式连接。 通过选择性地熔断保险膜，可以将电阻单元电连接到电阻网络中或与电阻网络电隔离，使电阻网络的电阻值成为所需的电阻值。

    CHIP PARTS
    5.
    发明申请
    CHIP PARTS 审中-公开

    公开(公告)号：US20180005732A1

    公开(公告)日：2018-01-04

    申请号：US15703954

    申请日：2017-09-13

    Applicant: ROHM CO., LTD.

    Inventor： Takuma SHIMOICHI ,  Yasuhiro KONDO ,  Keishi WATANABE ,  Takamichi TORII ,  Katsuya MATSUURA

    IPC: H01C1/01 ,  H01G4/228 ,  H01F17/00 ,  H01C1/14 ,  H01F27/28 ,  H01G4/30 ,  H01F27/29

    Abstract: A chip part is provided that includes a substrate in which an element region and an electrode region are set, an insulating film (a first insulating film and a second insulating film) which is formed on the substrate and which selectively includes an internal concave/convex structure in the electrode region on a surface, a first connection electrode and a second connection electrode which include, at a bottom portion, an anchor portion entering the concave portion of the internal concave/convex structure and which include an external concave/convex structure on a surface on the opposite side and a circuit element which is disposed in the element region and which is electrically connected to the first connection electrode and the second connection electrode.

    CHIP RESISTOR
    6.
    发明申请
    CHIP RESISTOR 审中-公开

    公开(公告)号：US20170301436A1

    公开(公告)日：2017-10-19

    申请号：US15485640

    申请日：2017-04-12

    Applicant: ROHM CO., LTD.

    Inventor： Hiroyuki OKADA ,  Yasuhiro KONDO

    IPC: H01C1/16 ,  H01C1/01 ,  H01C1/14 ,  H01C17/00

    CPC classification number: H01C1/16 ,  H01C1/01 ,  H01C1/14 ,  H01C7/003 ,  H01C13/02 ,  H01C17/006

    Abstract: A chip resistor including, a substrate having a main surface, a first resistance circuit formed at the main surface of the substrate, a second resistance circuit formed at the main surface of the substrate apart from the first resistance circuit, a common internal electrode formed at the main surface of the substrate and electrically connected to the first resistance circuit and the second resistance circuit, a first internal electrode formed at the main surface of the substrate and electrically connected to the first resistance circuit, a second internal electrode formed at the main surface of the substrate and electrically connected to the second resistance circuit, and a dummy resistance circuit formed in a region between the first resistance circuit and the second resistance circuit at the main surface of the substrate so as to be in an electrically floating state.

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