-
公开(公告)号：US07872350B2
公开(公告)日：2011-01-18
申请号：US11733679
申请日：2007-04-10
申请人： Ralf Otremba , Josef Hoeglauer , Stefan Landau , Erwin Huber
发明人： Ralf Otremba , Josef Hoeglauer , Stefan Landau , Erwin Huber
IPC分类号： H01L23/02
CPC分类号： H01L21/6835 , H01L21/4832 , H01L21/568 , H01L23/49575 , H01L24/48 , H01L24/49 , H01L24/81 , H01L24/85 , H01L25/16 , H01L2224/16 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/48465 , H01L2224/4903 , H01L2224/49051 , H01L2224/49171 , H01L2224/49175 , H01L2224/81801 , H01L2224/85001 , H01L2924/00014 , H01L2924/01005 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12032 , H01L2924/12036 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/18301 , H01L2924/19041 , H01L2924/19042 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A multi-chip module includes at least one integrated circuit chip that is electrically connected to first external terminals of the multi-chip module and at least one power semiconductor chip that is electrically connected to second external terminals of the multi-chip module. All first external terminals of the multi-chip module are arranged in a contiguous region of an terminal area of the multi-chip module.
摘要翻译： 多芯片模块包括电连接到多芯片模块的第一外部端子的至少一个集成电路芯片和电连接到多芯片模块的第二外部端子的至少一个功率半导体芯片。 多芯片模块的所有第一外部端子被布置在多芯片模块的端子区域的连续区域中。
-
公开(公告)号：US20080251912A1
公开(公告)日：2008-10-16
申请号：US11733679
申请日：2007-04-10
申请人： Ralf Otremba , Josef Hoeglauer , Stefan Landau , Erwin Huber
发明人： Ralf Otremba , Josef Hoeglauer , Stefan Landau , Erwin Huber
CPC分类号： H01L21/6835 , H01L21/4832 , H01L21/568 , H01L23/49575 , H01L24/48 , H01L24/49 , H01L24/81 , H01L24/85 , H01L25/16 , H01L2224/16 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/48465 , H01L2224/4903 , H01L2224/49051 , H01L2224/49171 , H01L2224/49175 , H01L2224/81801 , H01L2224/85001 , H01L2924/00014 , H01L2924/01005 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12032 , H01L2924/12036 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/18301 , H01L2924/19041 , H01L2924/19042 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A multi-chip module includes at least one integrated circuit chip that is electrically connected to first external terminals of the multi-chip module and at least one power semiconductor chip that is electrically connected to second external terminals of the multi-chip module. All first external terminals of the multi-chip module are arranged in a contiguous region of an terminal area of the multi-chip module.
摘要翻译： 多芯片模块包括电连接到多芯片模块的第一外部端子的至少一个集成电路芯片和电连接到多芯片模块的第二外部端子的至少一个功率半导体芯片。 多芯片模块的所有第一外部端子被布置在多芯片模块的终端区域的连续区域中。
-
公开(公告)号：US20070045745A1
公开(公告)日：2007-03-01
申请号：US11468112
申请日：2006-08-29
申请人： Henrik Ewe , Josef Hoeglauer , Erwin Huber , Ralf Otremba
发明人： Henrik Ewe , Josef Hoeglauer , Erwin Huber , Ralf Otremba
IPC分类号： H01L23/62
CPC分类号： H01L25/16 , H01L23/4334 , H01L23/5389 , H01L24/24 , H01L24/48 , H01L24/82 , H01L25/074 , H01L2224/05571 , H01L2224/05573 , H01L2224/16145 , H01L2224/16235 , H01L2224/24051 , H01L2224/24226 , H01L2224/24998 , H01L2224/32145 , H01L2224/32245 , H01L2224/48091 , H01L2224/48465 , H01L2224/73265 , H01L2224/82007 , H01L2924/00014 , H01L2924/01033 , H01L2924/01082 , H01L2924/07802 , H01L2924/1306 , H01L2924/181 , H01L2924/18301 , H01L2924/00 , H01L2224/05599 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A power semiconductor device (1) has a semiconductor chip stack (4) and lines (5) within a housing (6). The lines electrically connect large-area contact regions (7) of power semiconductor device components (8) within the housing (6) to one another. In this case, at least one of the lines (5) has a large-area planar conductive layer (9). This planar conductive area (9) electrically connects the large-area contact regions (7) to one another.
摘要翻译： 功率半导体器件（1）在壳体（6）内具有半导体芯片堆叠（4）和线（5）。 线路将壳体（6）内的功率半导体器件部件（8）的大面积接触区域（7）彼此电连接。 在这种情况下，线（5）中的至少一个具有大面积的平面导电层（9）。 该平面导电区域（9）将大面积接触区域（7）彼此电连接。
-
公开(公告)号：US07851908B2
公开(公告)日：2010-12-14
申请号：US11768972
申请日：2007-06-27
申请人： Ralf Otremba , Xaver Schloegel , Josef Hoeglauer , Erwin Huber
发明人： Ralf Otremba , Xaver Schloegel , Josef Hoeglauer , Erwin Huber
CPC分类号： H01L24/41 , H01L24/24 , H01L24/31 , H01L24/37 , H01L24/40 , H01L24/82 , H01L24/83 , H01L24/84 , H01L24/94 , H01L25/072 , H01L25/18 , H01L2224/2402 , H01L2224/24051 , H01L2224/371 , H01L2224/37147 , H01L2224/37155 , H01L2224/3716 , H01L2224/3754 , H01L2224/40245 , H01L2224/4899 , H01L2224/73253 , H01L2224/76155 , H01L2224/82039 , H01L2224/82047 , H01L2224/82102 , H01L2224/83801 , H01L2224/83825 , H01L2224/8385 , H01L2224/84801 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01047 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/0781 , H01L2924/12032 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A semiconductor device is disclosed. One embodiment provides a module including a first carrier having a first mounting surface and a second mounting surface, a first semiconductor chip mounted onto the first mounting surface of the first carrier and having a first surface facing away from the first carrier, a first connection element connected to the first surface of the first semiconductor chip, a second semiconductor chip having a first surface facing away from the first carrier, a second connection element connected to the first surface of the second semiconductor chip, and a mold material covering the first connection element and the second connection element only partially.
摘要翻译： 公开了一种半导体器件。 一个实施例提供一种模块，其包括具有第一安装表面和第二安装表面的第一载体，安装在第一载体的第一安装表面上并具有背离第一载体的第一表面的第一半导体芯片，第一连接元件 连接到第一半导体芯片的第一表面的第二半导体芯片，具有背离第一载体的第一表面的第二半导体芯片，连接到第二半导体芯片的第一表面的第二连接元件和覆盖第一连接元件的模具材料 而第二连接元件仅部分地。
-
公开(公告)号：US07821128B2
公开(公告)日：2010-10-26
申请号：US11468112
申请日：2006-08-29
申请人： Henrik Ewe , Josef Hoeglauer , Erwin Huber , Ralf Otremba
发明人： Henrik Ewe , Josef Hoeglauer , Erwin Huber , Ralf Otremba
IPC分类号： H01L23/34
CPC分类号： H01L25/16 , H01L23/4334 , H01L23/5389 , H01L24/24 , H01L24/48 , H01L24/82 , H01L25/074 , H01L2224/05571 , H01L2224/05573 , H01L2224/16145 , H01L2224/16235 , H01L2224/24051 , H01L2224/24226 , H01L2224/24998 , H01L2224/32145 , H01L2224/32245 , H01L2224/48091 , H01L2224/48465 , H01L2224/73265 , H01L2224/82007 , H01L2924/00014 , H01L2924/01033 , H01L2924/01082 , H01L2924/07802 , H01L2924/1306 , H01L2924/181 , H01L2924/18301 , H01L2924/00 , H01L2224/05599 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A power semiconductor device has a semiconductor chip stack and lines within a housing. The lines electrically connect large-area contact regions of power semiconductor device components within the housing to one another. In this case, at least one of the lines has a large-area planar conductive layer. This planar conductive area electrically connects the large-area contact regions to one another.
摘要翻译： 功率半导体器件具有半导体芯片堆叠和在壳体内的线。 线路将壳体内的功率半导体器件部件的大面积接触区域彼此电连接。 在这种情况下，至少一条线具有大面积的平面导电层。 该平面导电区域将大面积接触区域彼此电连接。
-
公开(公告)号：US20090001562A1
公开(公告)日：2009-01-01
申请号：US11768972
申请日：2007-06-27
申请人： Ralf Otremba , Xaver Schloegel , Josef Hoeglauer , Erwin Huber
发明人： Ralf Otremba , Xaver Schloegel , Josef Hoeglauer , Erwin Huber
CPC分类号： H01L24/41 , H01L24/24 , H01L24/31 , H01L24/37 , H01L24/40 , H01L24/82 , H01L24/83 , H01L24/84 , H01L24/94 , H01L25/072 , H01L25/18 , H01L2224/2402 , H01L2224/24051 , H01L2224/371 , H01L2224/37147 , H01L2224/37155 , H01L2224/3716 , H01L2224/3754 , H01L2224/40245 , H01L2224/4899 , H01L2224/73253 , H01L2224/76155 , H01L2224/82039 , H01L2224/82047 , H01L2224/82102 , H01L2224/83801 , H01L2224/83825 , H01L2224/8385 , H01L2224/84801 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01047 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/0781 , H01L2924/12032 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A semiconductor device is disclosed. One embodiment provides a module including a first carrier having a first mounting surface and a second mounting surface, a first semiconductor chip mounted onto the first mounting surface of the first carrier and having a first surface facing away from the first carrier, a first connection element connected to the first surface of the first semiconductor chip, a second semiconductor chip having a first surface facing away from the first carrier, a second connection element connected to the first surface of the second semiconductor chip, and a mold material covering the first connection element and the second connection element only partially.
摘要翻译： 公开了一种半导体器件。 一个实施例提供一种模块，其包括具有第一安装表面和第二安装表面的第一载体，安装在第一载体的第一安装表面上并具有背离第一载体的第一表面的第一半导体芯片，第一连接元件 连接到第一半导体芯片的第一表面的第二半导体芯片，具有背离第一载体的第一表面的第二半导体芯片，连接到第二半导体芯片的第一表面的第二连接元件和覆盖第一连接元件的模具材料 而第二连接元件仅部分地。
-
公开(公告)号：US08253241B2
公开(公告)日：2012-08-28
申请号：US12123784
申请日：2008-05-20
CPC分类号： H01L23/49833 , H01L23/142 , H01L23/34 , H01L24/34 , H01L24/37 , H01L24/38 , H01L24/40 , H01L24/41 , H01L24/84 , H01L25/072 , H01L2224/371 , H01L2224/40137 , H01L2224/40225 , H01L2224/84801 , H01L2924/00014 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： An electronic module. One embodiment includes a carrier. A first transistor is attached to the carrier. A second transistor is attached to the carrier. A first connection element includes a first planar region. The first connection element electrically connects the first transistor to the carrier. A second connection element includes a second planar region. The second connection element electrically connects the second transistor to the carrier. In one embodiment, a distance between the first planar region and the second planar region is smaller than 100 μm.
摘要翻译： 电子模块。 一个实施例包括载体。 第一晶体管连接到载体上。 第二晶体管连接到载体上。 第一连接元件包括第一平面区域。 第一连接元件将第一晶体管与载体电连接。 第二连接元件包括第二平面区域。 第二连接元件将第二晶体管与载体电连接。 在一个实施例中，第一平面区域和第二平面区域之间的距离小于100μm。
-
公开(公告)号：US20120306069A1
公开(公告)日：2012-12-06
申请号：US13584988
申请日：2012-08-14
IPC分类号： H01L23/48
CPC分类号： H01L23/49833 , H01L23/142 , H01L23/34 , H01L24/34 , H01L24/37 , H01L24/38 , H01L24/40 , H01L24/41 , H01L24/84 , H01L25/072 , H01L2224/371 , H01L2224/40137 , H01L2224/40225 , H01L2224/84801 , H01L2924/00014 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： An electronic module. One embodiment includes a carrier. A first transistor is attached to the carrier. A second transistor is attached to the carrier. A first connection element includes a first planar region. The first connection element electrically connects the first transistor to the carrier. A second connection element includes a second planar region. The second connection element electrically connects the second transistor to the carrier. In one embodiment, a distance between the first planar region and the second planar region is smaller than 100 μm.
摘要翻译： 电子模块。 一个实施例包括载体。 第一晶体管连接到载体上。 第二晶体管连接到载体上。 第一连接元件包括第一平面区域。 第一连接元件将第一晶体管与载体电连接。 第二连接元件包括第二平面区域。 第二连接元件将第二晶体管与载体电连接。 在一个实施例中，第一平面区域和第二平面区域之间的距离小于100μm。
-
公开(公告)号：US20090289354A1
公开(公告)日：2009-11-26
申请号：US12123784
申请日：2008-05-20
IPC分类号： H01L23/34
CPC分类号： H01L23/49833 , H01L23/142 , H01L23/34 , H01L24/34 , H01L24/37 , H01L24/38 , H01L24/40 , H01L24/41 , H01L24/84 , H01L25/072 , H01L2224/371 , H01L2224/40137 , H01L2224/40225 , H01L2224/84801 , H01L2924/00014 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： An electronic module. One embodiment includes a carrier. A first transistor is attached to the carrier. A second transistor is attached to the carrier. A first connection element includes a first planar region. The first connection element electrically connects the first transistor to the carrier. A second connection element includes a second planar region. The second connection element electrically connects the second transistor to the carrier. In one embodiment, a distance between the first planar region and the second planar region is smaller than 100 μm.
摘要翻译： 电子模块。 一个实施例包括载体。 第一晶体管连接到载体上。 第二晶体管连接到载体上。 第一连接元件包括第一平面区域。 第一连接元件将第一晶体管与载体电连接。 第二连接元件包括第二平面区域。 第二连接元件将第二晶体管与载体电连接。 在一个实施例中，第一平面区域和第二平面区域之间的距离小于100μm。
-
公开(公告)号：US08836113B2
公开(公告)日：2014-09-16
申请号：US13584988
申请日：2012-08-14
IPC分类号： H01L21/70 , H01L23/495 , H01L23/48 , H01L23/52 , H01L23/34 , H01L29/40 , H01L23/14 , H01L23/498 , H01L23/00 , H01L25/07
CPC分类号： H01L23/49833 , H01L23/142 , H01L23/34 , H01L24/34 , H01L24/37 , H01L24/38 , H01L24/40 , H01L24/41 , H01L24/84 , H01L25/072 , H01L2224/371 , H01L2224/40137 , H01L2224/40225 , H01L2224/84801 , H01L2924/00014 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： An electronic module. One embodiment includes a carrier. A first transistor is attached to the carrier. A second transistor is attached to the carrier. A first connection element includes a first planar region. The first connection element electrically connects the first transistor to the carrier. A second connection element includes a second planar region. The second connection element electrically connects the second transistor to the carrier. In one embodiment, a distance between the first planar region and the second planar region is smaller than 100 μm.
摘要翻译： 电子模块。 一个实施例包括载体。 第一晶体管连接到载体上。 第二晶体管连接到载体上。 第一连接元件包括第一平面区域。 第一连接元件将第一晶体管与载体电连接。 第二连接元件包括第二平面区域。 第二连接元件将第二晶体管与载体电连接。 在一个实施例中，第一平面区域和第二平面区域之间的距离小于100μm。
-
-
-
-
-
-
-
-
-
搜索结果
21 条记录 (耗时 0.024 秒)
