公开(公告)号：US20170092821A1

公开(公告)日：2017-03-30

申请号：US15377731

申请日：2016-12-13

Applicant: Seoul Viosys Co., Ltd.

Inventor： Jong Hyeon Chae ,  Jong Min Jang ,  Won Young Roh ,  Dae Woong Suh ,  Min Woo Kang ,  Joon Sub Lee ,  Hyun A. Kim ,  Kyoung Wan Kim ,  Chang Yeon Kim

IPC: H01L33/50 ,  H01L33/62

CPC classification number: H01L33/508 ,  H01L33/20 ,  H01L33/32 ,  H01L33/385 ,  H01L33/405 ,  H01L33/44 ,  H01L33/46 ,  H01L33/502 ,  H01L33/62 ,  H01L2224/16 ,  H01L2933/0016

Abstract: An LED is provided to include: a first conductive type semiconductor layer; an active layer positioned over the first conductive type semiconductor layer; a second conductive type semiconductor layer positioned over the active layer; and a defect blocking layer comprising a masking region to cover at least a part of the top surface of the second conductive semiconductor masking region to cover at least a part of the top surface of the second conductive semiconductor layer and an opening region to partially expose the top surface of the second conductive type semiconductor layer, wherein the active layer and the second conductive type semiconductor layer are disposed to expose a part of the first conductive type semiconductor layer, and wherein the defect blocking layer comprises a first region and a second region surrounding the first region, and a ratio of the area of the opening region to the area of the masking region in the first region is different from a ratio of the area of the opening region to the area of the masking region in the second region.

公开(公告)号：US20150108525A1

公开(公告)日：2015-04-23

申请号：US14585125

申请日：2014-12-29

Applicant: Seoul Viosys Co., Ltd.

Inventor： Jong Hyeon Chae ,  Jong Min Jang ,  Won Young Roh ,  Dae Woong Suh ,  Min Woo Kang ,  Joon Sub Lee ,  Hyun A. Kim

IPC: H01L33/62 ,  H01L33/48 ,  H01L33/00 ,  H01L33/60

CPC classification number: H01L33/405 ,  H01L33/005 ,  H01L33/007 ,  H01L33/06 ,  H01L33/12 ,  H01L33/20 ,  H01L33/32 ,  H01L33/38 ,  H01L33/382 ,  H01L33/40 ,  H01L33/44 ,  H01L33/46 ,  H01L33/486 ,  H01L33/60 ,  H01L33/62 ,  H01L2933/0016 ,  H01L2933/0025 ,  H01L2933/0058 ,  H01L2933/0066

Abstract: Provided are a light emitting diode (LED) in which a conductive barrier layer surrounding a reflective metal layer is defined by a protective insulating layer, and a method of manufacturing the same. A reflection pattern including a reflective metal layer and a conductive barrier layer is formed on an emission structure in which a first semiconductor layer, an active layer, and a second semiconductor layer are formed. The conductive barrier layer prevents diffusion of a reflective metal layer and extends to a protective insulating layer recessed under a photoresist pattern having an overhang structure during a forming process. Accordingly, a phenomenon where the conductive barrier layer is in contact with sidewalls of the photoresist pattern having an over-hang structure and the reflective metal layer forms points is prevented. Thus, LED modules having various shapes may be manufactured.

Abstract translation: 提供了一种发光二极管（LED）及其制造方法，其中围绕反射金属层的导电阻挡层由保护绝缘层限定。 在其中形成第一半导体层，有源层和第二半导体层的发射结构上形成包括反射金属层和导电阻挡层的反射图案。 导电阻挡层防止反射金属层的扩散，并延伸到在形成过程期间凹陷在具有突出结构的光致抗蚀剂图案下的保护绝缘层。 因此，防止导电阻挡层与具有过悬挂结构和反射金属层形成点的光致抗蚀剂图案的侧壁接触的现象。 因此，可以制造具有各种形状的LED模块。

公开(公告)号：US10672952B2

公开(公告)日：2020-06-02

申请号：US16511921

申请日：2019-07-15

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Jong Hyeon Chae ,  Jong Min Jang ,  Won Young Roh ,  Dae Woong Suh ,  Min Woo Kang ,  Joon Sub Lee ,  Hyun A. Kim

IPC: H01L33/40 ,  H01L33/44 ,  H01L33/46 ,  H01L33/00 ,  H01L33/48 ,  H01L33/60 ,  H01L33/62 ,  H01L33/12 ,  H01L33/06 ,  H01L33/32 ,  H01L33/20 ,  H01L33/38

Abstract: Provided are a light emitting diode (LED) in which a conductive barrier layer surrounding a reflective metal layer is defined by a protective insulating layer, and a method of manufacturing the same. A reflection pattern including a reflective metal layer and a conductive barrier layer is formed on an emission structure in which a first semiconductor layer, an active layer, and a second semiconductor layer are formed. The conductive barrier layer prevents diffusion of a reflective metal layer and extends to a protective insulating layer recessed under a photoresist pattern having an overhang structure during a forming process. Accordingly, a phenomenon where the conductive barrier layer is in contact with sidewalls of the photoresist pattern having an over-hang structure and the reflective metal layer forms points is prevented. Thus, LED modules having various shapes may be manufactured.

公开(公告)号：US09412922B2

公开(公告)日：2016-08-09

申请号：US14426723

申请日：2013-08-06

Applicant: Seoul Viosys Co., Ltd.

Inventor： Jong Min Jang ,  Jong Hyeon Chae ,  Joon Sup Lee ,  Daewoong Suh ,  Hyun A. Kim ,  Won Young Roh ,  Min Woo Kang

IPC: H01L33/62 ,  H01L33/38 ,  H01L27/15 ,  H01L33/40 ,  H01L33/44

CPC classification number: H01L33/62 ,  H01L27/153 ,  H01L27/156 ,  H01L33/38 ,  H01L33/382 ,  H01L33/40 ,  H01L33/405 ,  H01L33/44 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2924/00

Abstract: A wafer level light-emitting diode (LED) array includes: a growth substrate; a plurality of LEDs arranged over the substrate, each including a first semiconductor layer, an activation layer, and a second semiconductor layer; a plurality of upper electrodes formed from a common material and electrically connected to the first semiconductor layers of the corresponding LEDs; and first and second pads arranged over the upper electrodes. The LEDs are connected in series by the upper electrodes, the first pad is electrically connected to an input LED from among the LEDs connected in series, and the second pad is electrically connected to an output LED from among the LEDs connected in series. Accordingly, a flip chip-type LED array can be provided which can be driven with a high voltage.

Abstract translation: 晶圆级发光二极管（LED）阵列包括：生长衬底; 布置在所述基板上的多个LED，每个LED包括第一半导体层，激活层和第二半导体层; 多个上电极，由公共材料形成并与相应LED的第一半导体层电连接; 以及布置在上电极上的第一和第二焊盘。 LED通过上电极串联连接，第一焊盘与串联连接的LED中的输入LED电连接，第二焊盘与串联连接的LED中的输出LED电连接。 因此，可以提供可以以高电压驱动的倒装芯片型LED阵列。

公开(公告)号：US09318529B2

公开(公告)日：2016-04-19

申请号：US14722011

申请日：2015-05-26

Applicant: Seoul Viosys Co., Ltd.

Inventor： Jong Min Jang ,  Jong Hyeon Chae ,  Joon Sup Lee ,  Daewoong Suh ,  Hyun A. Kim ,  Won Young Roh ,  Min Woo Kang

IPC: H01L27/15 ,  H01L33/62 ,  H01L33/40 ,  H01L33/60

CPC classification number: H01L27/153 ,  H01L27/156 ,  H01L33/20 ,  H01L33/405 ,  H01L33/44 ,  H01L33/60 ,  H01L33/62

Abstract: A light emitting diode array is provide to include: a substrate; light emitting diodes positioned over the substrate, each including a first semiconductor layer, an active layer, and a second semiconductor layer, wherein each light emitting diode is disposed to form a first via hole structure exposing a portion of the corresponding first semiconductor layer; lower electrodes disposed over the second semiconductor layer; a first interlayer insulating layer disposed over the lower electrodes and configured to expose the portion of the first semiconductor layer of corresponding light emitting diodes; upper electrodes electrically connected to the first semiconductor layer through the first via hole structure, wherein the first via hole structure is disposed in parallel with one side of the corresponding second semiconductor layer and the first interlayer insulating layer is disposed to form a second via hole structure exposing a portion of the lower electrodes.

Abstract translation: 发光二极管阵列提供包括：基板; 位于衬底上的发光二极管，每个包括第一半导体层，有源层和第二半导体层，其中每个发光二极管被设置成形成暴露相应的第一半导体层的一部分的第一通孔结构; 设置在所述第二半导体层上的下电极; 第一层间绝缘层，设置在所述下电极上并且被配置为暴露所述对应的发光二极管的所述第一半导体层的所述部分; 上电极通过第一通孔结构与第一半导体层电连接，其中第一通孔结构与对应的第二半导体层的一侧平行设置，并且第一层间绝缘层设置成形成第二通孔结构 暴露下部电极的一部分。

公开(公告)号：US11282892B2

公开(公告)日：2022-03-22

申请号：US16594239

申请日：2019-10-07

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Jong Kyu Kim ,  So Ra Lee ,  Yeo Jin Yoon ,  Jae Kwon Kim ,  Joon Sup Lee ,  Min Woo Kang ,  Se Hee Oh ,  Hyun A. Kim ,  Hyoung Jin Lim

IPC: H01L27/15 ,  H01L33/08 ,  H01L33/38 ,  H01L33/58 ,  H01L33/60 ,  H01L33/64 ,  H01L33/36 ,  H01L33/62

Abstract: A light-emitting element includes a light-emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first conductive semiconductor layer and the second conductive semiconductor layer; a first contact electrode and a second contact electrode located on the light-emitting structure, and respectively making ohmic contact with the first conductive semiconductor layer and the second conductive semiconductor layer; an insulation layer for covering a part of the first contact electrode and the second contact electrode so as to insulate the first contact electrode and the second contact electrode; a first electrode pad and a second electrode pad electrically connected to each of the first contact electrode and the second contact electrode; and a radiation pad formed on the insulation layer, and radiating heat generated from the light-emitting structure.

公开(公告)号：US10516083B2

公开(公告)日：2019-12-24

申请号：US16266717

申请日：2019-02-04

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Jong Hyeon Chae ,  Jong Min Jang ,  Won Young Roh ,  Dae Woong Suh ,  Min Woo Kang ,  Joon Sub Lee ,  Hyun A. Kim ,  Kyoung Wan Kim ,  Chang Yeon Kim

IPC: H01L33/50 ,  H01L33/40 ,  H01L33/20 ,  H01L33/38 ,  H01L33/44 ,  H01L33/62 ,  H01L33/46 ,  H01L23/00 ,  H01L33/32

Abstract: An LED is provided to include: a first conductive type semiconductor layer; an active layer positioned over the first conductive type semiconductor layer; a second conductive type semiconductor layer positioned over the active layer; and a defect blocking layer comprising a masking region to cover at least a part of the top surface of the second conductive semiconductor layer and an opening region to partially expose the top surface of the second conductive type semiconductor layer, wherein the active layer and the second conductive type semiconductor layer are disposed to expose a part of the first conductive type semiconductor layer, and wherein the defect blocking layer comprises a first region and a second region surrounding the first region, and a ratio of the area of the opening region to the area of the masking region in the first region is different from a ratio of the area of the opening region to the area of the masking region in the second region.

公开(公告)号：US10388690B2

公开(公告)日：2019-08-20

申请号：US15081134

申请日：2016-03-25

Applicant: Seoul Viosys Co., Ltd.

Inventor： Jong Min Jang ,  Jong Hyeon Chae ,  Joon Sup Lee ,  Daewoong Suh ,  Hyun A. Kim ,  Won Young Roh ,  Min Woo Kang

IPC: H01L33/08 ,  H01L33/38 ,  H01L33/62 ,  H01L27/15 ,  H01L33/20 ,  H01L33/44

Abstract: A light emitting diode array is provide to include: a substrate; light emitting diodes positioned over the substrate, each including a first semiconductor layer, an active layer, and a second semiconductor layer, wherein each light emitting diode is disposed to form a first via hole structure exposing a portion of the corresponding first semiconductor layer; lower electrodes disposed over the second semiconductor layer; a first interlayer insulating layer disposed over the lower electrodes and configured to expose the portion of the first semiconductor layer of corresponding light emitting diodes; upper electrodes electrically connected to the first semiconductor layer through the first via hole structure, wherein the first via hole structure is disposed in parallel with one side of the corresponding second semiconductor layer and the first interlayer insulating layer is disposed to form a second via hole structure exposing a portion of the lower electrodes.

公开(公告)号：US20150280086A1

公开(公告)日：2015-10-01

申请号：US14426723

申请日：2013-08-06

Applicant: SEOUL VIOSYS CO., LTD.

Inventor： Jong Min Jang ,  Jong Hyeon Chae ,  Joon Sup Lee ,  Daewoong Suh ,  Hyun A. Kim ,  Won Young Roh ,  Min Woo Kang

IPC: H01L33/62 ,  H01L33/38 ,  H01L33/40 ,  H01L27/15

CPC classification number: H01L33/62 ,  H01L27/153 ,  H01L27/156 ,  H01L33/38 ,  H01L33/382 ,  H01L33/40 ,  H01L33/405 ,  H01L33/44 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2924/00

Abstract: A wafer level light-emitting diode (LED) array includes: a growth substrate; a plurality of LEDs arranged over the substrate, each including a first semiconductor layer, an activation layer, and a second semiconductor layer; a plurality of upper electrodes formed from a common material and electrically connected to the first semiconductor layers of the corresponding LEDs; and first and second pads arranged over the upper electrodes. The LEDs are connected in series by the upper electrodes, the first pad is electrically connected to an input LED from among the LEDs connected in series, and the second pad is electrically connected to an output LED from among the LEDs connected in series. Accordingly, a flip chip-type LED array can be provided which can be driven with a high voltage.

Abstract translation: 晶圆级发光二极管（LED）阵列包括：生长衬底; 布置在所述基板上的多个LED，每个LED包括第一半导体层，激活层和第二半导体层; 多个上电极，由公共材料形成并与相应LED的第一半导体层电连接; 以及布置在上电极上的第一和第二焊盘。 LED通过上电极串联连接，第一焊盘与串联连接的LED中的输入LED电连接，第二焊盘与串联连接的LED中的输出LED电连接。 因此，可以提供可以以高电压驱动的倒装芯片型LED阵列。

公开(公告)号：US20150255504A1

公开(公告)日：2015-09-10

申请号：US14722011

申请日：2015-05-26

Applicant: Seoul Viosys Co., Ltd.

Inventor： Jong Min Jang ,  Jong Hyeon Chae ,  Joon Sup Lee ,  Daewoong Suh ,  Hyun A. Kim ,  Won Young Roh ,  Min Woo Kang

IPC: H01L27/15 ,  H01L33/62

CPC classification number: H01L27/153 ,  H01L27/156 ,  H01L33/20 ,  H01L33/405 ,  H01L33/44 ,  H01L33/60 ,  H01L33/62

Abstract: A light emitting diode array is provide to include: a substrate; light emitting diodes positioned over the substrate, each including a first semiconductor layer, an active layer, and a second semiconductor layer, wherein each light emitting diode is disposed to form a first via hole structure exposing a portion of the corresponding first semiconductor layer; lower electrodes disposed over the second semiconductor layer; a first interlayer insulating layer disposed over the lower electrodes and configured to expose the portion of the first semiconductor layer of corresponding light emitting diodes; upper electrodes electrically connected to the first semiconductor layer through the first via hole structure, wherein the first via hole structure is disposed in parallel with one side of the corresponding second semiconductor layer and the first interlayer insulating layer is disposed to form a second via hole structure exposing a portion of the lower electrodes.

Abstract translation: 发光二极管阵列提供包括：基板; 位于衬底上的发光二极管，每个包括第一半导体层，有源层和第二半导体层，其中每个发光二极管被设置成形成暴露相应的第一半导体层的一部分的第一通孔结构; 设置在所述第二半导体层上的下电极; 第一层间绝缘层，设置在所述下电极上并且被配置为暴露所述对应的发光二极管的所述第一半导体层的所述部分; 上电极通过第一通孔结构与第一半导体层电连接，其中第一通孔结构与对应的第二半导体层的一侧平行设置，并且第一层间绝缘层设置成形成第二通孔结构 暴露下部电极的一部分。