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公开(公告)号：US20180144952A1
公开(公告)日：2018-05-24
申请号：US15876046
申请日：2018-01-19
Applicant: STMicroelectronics, Inc.
Inventor： Jefferson Talledo , Godfrey Dimayuga
IPC: H01L21/48 , H01L23/498
CPC classification number: H01L21/4857 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2924/0002 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
Abstract: One or more embodiments are directed to semiconductor packages with one or more cantilever pads and methods of making same. In one embodiment a recess is located in a substrate of the package facing the cantilever pad. The cantilever pad includes a conductive pad on which a conductive ball is formed. The cantilever pad is configured to absorb stresses acting on the package.
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公开(公告)号：US09768126B2
公开(公告)日：2017-09-19
申请号：US14721831
申请日：2015-05-26
Applicant: STMicroelectronics, Inc.
Inventor： Jefferson Talledo , Godfrey Dimayuga
CPC classification number: H01L23/562 , H01L21/4857 , H01L21/486 , H01L23/13 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/17 , H01L24/81 , H01L25/105 , H01L2224/16055 , H01L2224/16057 , H01L2224/16227 , H01L2224/81191 , H01L2225/1023 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331 , H01L2924/35 , H01L2924/3511
Abstract: One or more embodiments are directed to semiconductor packages, including stacked packages, with one or more cantilever pads. In one embodiment a recess is located in a substrate of the package facing the cantilever pad. The cantilever pad includes a conductive pad on which a conductive ball is formed. The cantilever pad is configured to absorb stresses acting on the package.
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公开(公告)号：US09627224B2
公开(公告)日：2017-04-18
申请号：US14672664
申请日：2015-03-30
Applicant: STMICROELECTRONICS, INC.
Inventor： Godfrey Dimayuga , Jefferson Talledo
CPC classification number: H01L21/486 , H01L21/4857 , H01L23/13 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/04042 , H01L2224/2919 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48228 , H01L2224/73265 , H01L2924/14 , H01L2924/1434 , H01L2924/15153 , H01L2924/15311 , H01L2924/15313 , H01L2224/48227 , H01L2924/00012 , H01L2924/00014
Abstract: A semiconductor device may include a multi-layer interconnect board having in stacked relation a lower conductive layer, a dielectric layer, and an upper conductive layer. The dielectric layer may have a recess formed with a bottom and sloping sidewall extending upwardly from the bottom. The upper conductive layer may include upper conductive traces extending across the sloping sidewall, and the lower conductive layer may include lower conductive traces. The semiconductor device may include vias extending between the lower and upper conductive layers, an IC carried by the multi-layer interconnect board in the recess, bond wires coupling upper conductive traces to the IC, and encapsulation material adjacent the IC and adjacent portions of the multi-layer interconnect board.
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Patent Agency Ranking
公开(公告)号：US09899236B2
公开(公告)日：2018-02-20
申请号：US14582581
申请日：2014-12-24
Applicant: STMicroelectronics, Inc.
Inventor： Jefferson Talledo , Godfrey Dimayuga
IPC: G01R31/20 , H01L21/48 , H01L23/498
CPC classification number: H01L21/4857 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2924/0002 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
Abstract: One or more embodiments are directed to semiconductor packages with one or more cantilever pads. In one embodiment a recess is located in a substrate of the package facing the cantilever pad. The cantilever pad includes a conductive pad on which a conductive ball is formed. The cantilever pad is configured to absorb stresses acting on the package.
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公开(公告)号：US20160190072A1
公开(公告)日：2016-06-30
申请号：US14721831
申请日：2015-05-26
Applicant: STMicroelectronics, Inc.
Inventor： Jefferson Talledo , Godfrey Dimayuga
IPC: H01L23/00 , H01L25/00 , H01L21/56 , H01L25/065
CPC classification number: H01L23/562 , H01L21/4857 , H01L21/486 , H01L23/13 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/17 , H01L24/81 , H01L25/105 , H01L2224/16055 , H01L2224/16057 , H01L2224/16227 , H01L2224/81191 , H01L2225/1023 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331 , H01L2924/35 , H01L2924/3511
Abstract: One or more embodiments are directed to semiconductor packages, including stacked packages, with one or more cantilever pads. In one embodiment a recess is located in a substrate of the package facing the cantilever pad. The cantilever pad includes a conductive pad on which a conductive ball is formed. The cantilever pad is configured to absorb stresses acting on the package.
Abstract translation: 一个或多个实施例涉及具有一个或多个悬臂垫的半导体封装，包括堆叠封装。 在一个实施例中，凹部位于面向悬臂垫的封装的衬底中。 悬臂焊盘包括形成有导电球的导电焊盘。 悬臂垫被配置成吸收作用在包装上的应力。
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公开(公告)号：US11270894B2
公开(公告)日：2022-03-08
申请号：US15876046
申请日：2018-01-19
Applicant: STMicroelectronics, Inc.
Inventor： Jefferson Talledo , Godfrey Dimayuga
Abstract: One or more embodiments are directed to methods of forming one or more cantilever pads for semiconductor packages. In one embodiment a recess is formed in a substrate of the package facing the cantilever pad. The cantilever pad includes a conductive pad on which a conductive ball is formed. The cantilever pad is configured to absorb stresses acting on the package.
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公开(公告)号：US09824979B2
公开(公告)日：2017-11-21
申请号：US14982018
申请日：2015-12-29
Applicant: STMICROELECTRONICS, INC.
Inventor： Godfrey Dimayuga , Frederick Arellano , Michael Tabiera
IPC: H01L23/552 , H01L21/56 , H01L23/31 , H01L23/00
CPC classification number: H01L23/552 , H01L21/561 , H01L21/563 , H01L23/3114 , H01L23/3128 , H01L24/43 , H01L24/48 , H01L24/49 , H01L24/85 , H01L24/97 , H01L2224/32225 , H01L2224/48227 , H01L2224/48249 , H01L2224/73265 , H01L2224/92247 , H01L2224/97 , H01L2924/00014 , H01L2924/15311 , H01L2924/00 , H01L2224/83 , H01L2224/85 , H01L2224/45099 , H01L2224/32245 , H01L2224/48247
Abstract: An electronic package includes a substrate having opposing first and second surfaces. Conductive areas are on a first surface of the substrate and include at least one edge conductive area. A plurality of conductive bumps are on the second surface of the substrate and coupled to respective ones of the conductive areas. An integrated circuit (IC) is carried by the substrate. Bond wires are coupled between the IC and respective ones of the conductive areas. An encapsulating material is over the IC and adjacent portions of the substrate. A conductive layer is on the encapsulating material, and at least one conductive body is coupled between the at least one edge conductive area and the conductive layer.
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公开(公告)号：US20160190031A1
公开(公告)日：2016-06-30
申请号：US14582581
申请日：2014-12-24
Applicant: STMicroelectronics, Inc.
Inventor： Jefferson Talledo , Godfrey Dimayuga
IPC: H01L23/36
CPC classification number: H01L21/4857 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2924/0002 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
Abstract: One or more embodiments are directed to semiconductor packages with one or more cantilever pads. In one embodiment a recess is located in a substrate of the package facing the cantilever pad. The cantilever pad includes a conductive pad on which a conductive ball is formed. The cantilever pad is configured to absorb stresses acting on the package.
Abstract translation: 一个或多个实施例涉及具有一个或多个悬臂垫的半导体封装。 在一个实施例中，凹部位于面向悬臂垫的封装的衬底中。 悬臂焊盘包括形成有导电球的导电焊盘。 悬臂垫被配置成吸收作用在包装上的应力。
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