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公开(公告)号：US10714640B2
公开(公告)日：2020-07-14
申请号：US16073039
申请日：2017-01-24
IPC分类号： H01L31/0328 , H01L21/00 , H01L31/0352 , H01L31/0304 , H01L31/103 , H01L21/02 , H01L31/101 , H01L31/18 , B82Y20/00
摘要： A semiconductor stacked body includes: a first semiconductor layer containing a group III-V compound semiconductor and being a layer whose conductivity type is a first conductivity type; a quantum-well light-receiving layer containing a group III-V compound semiconductor; a second semiconductor layer containing a group III-V compound semiconductor; and a third semiconductor layer containing a group III-V compound semiconductor and being a layer whose conductivity type is a second conductivity type. The first semiconductor layer, the quantum-well light-receiving layer, the second semiconductor layer, and the third semiconductor layer are stacked in this order. The concentration of an impurity that generates a carrier of the second conductivity type is 1×1014 cm−3 or more and 1×1017 cm−3 or less in the second semiconductor layer.
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公开(公告)号：US10326034B2
公开(公告)日：2019-06-18
申请号：US16073006
申请日：2017-01-24
IPC分类号： H01L31/0328 , H01L31/0304 , H01L31/101 , H01L31/0352 , H01L31/105 , H01L27/146 , H01L31/109 , H01L31/18
摘要： A semiconductor layer includes a first semiconductor layer containing a III-V group compound semiconductor and having a first conductivity type, a quantum-well structure containing a III-V group compound semiconductor, a second semiconductor layer containing a III-V group compound semiconductor, a third semiconductor layer containing a III-V group compound semiconductor, and a fourth semiconductor layer containing a III-V group compound semiconductor and having a second conductivity type different from the first conductivity type. The first semiconductor layer, the quantum-well structure, the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer are stacked in this order. The concentration of an impurity that generates carriers of the second conductivity type is lower in the third semiconductor layer than in the fourth semiconductor layer. The concentration of an impurity that generates majority carriers in the second semiconductor layer is lower in the third semiconductor layer than in the second semiconductor layer.
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3.发明申请METHOD OF MEASURING BREAKDOWN VOLTAGE OF SEMICONDUCTOR ELEMENT AND METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT 有权测量半导体元件的突变电压的方法和制造半导体元件的方法公开(公告)号：US20160064292A1
公开(公告)日：2016-03-03
申请号：US14843058
申请日：2015-09-02
发明人： Mitsuhiko Sakai , Susumu Yoshimoto
CPC分类号： H01L22/14 , G01R31/2623 , H01L21/78
摘要： A method of measuring a breakdown voltage of a semiconductor element includes the steps below. A wafer provided with a plurality of semiconductor elements each having an electrode is prepared. The wafer is divided into a plurality of chips provided with at least one semiconductor element. After the step of division into the plurality of chips, a breakdown voltage of the semiconductor element is measured while a probe is in contact with the electrode of the semiconductor element in an insulating liquid.
摘要翻译： 测量半导体元件的击穿电压的方法包括以下步骤。 准备具有各自具有电极的多个半导体元件的晶片。 晶片被分成多个设置有至少一个半导体元件的芯片。 在划分成多个芯片的步骤之后，在绝缘液体中探针与半导体元件的电极接触的同时测量半导体元件的击穿电压。
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公开(公告)号：US10594110B2
公开(公告)日：2020-03-17
申请号：US16189794
申请日：2018-11-13
发明人： Kei Fujii , Toshiyuki Tanahashi , Takashi Ishizuka , Susumu Yoshimoto , Takamichi Sumitomo , Koji Nishizuka , Suguru Arikata
摘要： A vertical cavity surface emitting laser includes: a supporting base having a principal surface including III-V compound semiconductor containing gallium and arsenic as constituent elements; and a post disposed on the principal surface. The post has a lower spacer region including a III-V compound semiconductor containing gallium and arsenic as group-III elements, and an active layer having a quantum well structure disposed on the lower spacer region. The quantum well structure has a concentration of carbon in a range of 2×1016 cm−3 or more to 5×1016 cm−3 or less. The quantum well structure includes a well layer and a barrier layer. The well layer includes a III-V compound semiconductor containing indium as a group-III element, and the barrier layer includes a III-V compound semiconductor containing indium and aluminum as group-III elements. The lower spacer region is disposed between the supporting base and the active layer.
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公开(公告)号：US09607905B2
公开(公告)日：2017-03-28
申请号：US14843058
申请日：2015-09-02
发明人： Mitsuhiko Sakai , Susumu Yoshimoto
CPC分类号： H01L22/14 , G01R31/2623 , H01L21/78
摘要： A method of measuring a breakdown voltage of a semiconductor element includes the steps below. A wafer provided with a plurality of semiconductor elements each having an electrode is prepared. The wafer is divided into a plurality of chips provided with at least one semiconductor element. After the step of division into the plurality of chips, a breakdown voltage of the semiconductor element is measured while a probe is in contact with the electrode of the semiconductor element in an insulating liquid.
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6.发明申请SOLDER-CONTAINING SEMICONDUCTOR DEVICE, MOUNTED SOLDER-CONTAINING SEMICONDUCTOR DEVICE, PRODUCING METHOD AND MOUNTING METHOD OF SOLDER-CONTAINING SEMICONDUCTOR DEVICE 审中-公开含金属半导体器件，安装的含电子半导体器件，包含电子器件的半导体器件的制造方法和安装方法公开(公告)号：US20150200265A1
公开(公告)日：2015-07-16
申请号：US14420129
申请日：2014-04-15
发明人： Tetsuya Kumano , Susumu Yoshimoto
IPC分类号： H01L29/47 , H01L21/285 , H01L23/00
CPC分类号： H01L29/475 , H01L21/28581 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/89 , H01L24/92 , H01L29/778 , H01L29/812 , H01L29/872 , H01L2224/03002 , H01L2224/0345 , H01L2224/04026 , H01L2224/04042 , H01L2224/05073 , H01L2224/05075 , H01L2224/05082 , H01L2224/05083 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05644 , H01L2224/06051 , H01L2224/06181 , H01L2224/27002 , H01L2224/29017 , H01L2224/29101 , H01L2224/29111 , H01L2224/32014 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48105 , H01L2224/48225 , H01L2224/48227 , H01L2224/48644 , H01L2224/73265 , H01L2224/80801 , H01L2224/83005 , H01L2224/83191 , H01L2224/83815 , H01L2224/92247 , H01L2924/01029 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01083 , H01L2924/01322 , H01L2924/014 , H01L2924/05042 , H01L2924/05442 , H01L2924/1032 , H01L2924/10323 , H01L2924/10325 , H01L2924/1033 , H01L2924/10334 , H01L2924/10341 , H01L2924/10344 , H01L2924/10346 , H01L2924/10355 , H01L2924/10356 , H01L2924/10357 , H01L2924/10358 , H01L2924/12032 , H01L2924/13064 , H01L2924/20106 , H01L2924/00014 , H01L2924/00 , H01L2224/05124
摘要： A solder-containing semiconductor device includes a semiconductor device. The semiconductor device includes a substrate, at least one group III nitride semiconductor layer disposed on the substrate, a Schottky electrode disposed on the group III nitride semiconductor layer, and a pad electrode disposed on the Schottky electrode. The pad electrode has a multi-layer structure including at least a Pt layer. The solder-containing semiconductor device further includes a solder having a melting point of 200 to 230° C. and being disposed on the pad electrode of the semiconductor device. Thereby, the solder-containing semiconductor device including the Schottky electrode, the pad electrode disposed on the Schottky electrode and the solder disposed on the pad electrode can be mounted to offer a mounted solder-containing semiconductor device without degrading the semiconductor device properties.
摘要翻译： 含焊料的半导体器件包括半导体器件。 半导体器件包括衬底，设置在衬底上的至少一个III族氮化物半导体层，设置在III族氮化物半导体层上的肖特基电极和设置在肖特基电极上的焊盘电极。 焊盘电极具有至少包含Pt层的多层结构。 含焊料的半导体器件还包括熔点为200〜230℃的焊料，并设置在半导体器件的焊盘电极上。 由此，可以安装包括肖特基电极，设置在肖特基电极上的焊盘电极和设置在焊盘电极上的焊料的含焊料的半导体器件，以提供安装的含焊料的半导体器件，而不会降低半导体器件的性能。
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7.发明申请公开(公告)号：US20190148914A1
公开(公告)日：2019-05-16
申请号：US16189794
申请日：2018-11-13
发明人： Kei Fujii , Toshiyuki Tanahashi , Takashi Ishizuka , Susumu Yoshimoto , Takamichi Sumitomo , Koji Nishizuka , Suguru Arikata
摘要： A vertical cavity surface emitting laser includes: a supporting base having a principal surface including III-V compound semiconductor containing gallium and arsenic as constituent elements; and a post disposed on the principal surface. The post has a lower spacer region including a III-V compound semiconductor containing gallium and arsenic as group-III elements, and an active layer having a quantum well structure disposed on the lower spacer region. The quantum well structure has a concentration of carbon in a range of 2×1016 cm−3 or more to 5×1016 cm−3 or less. The quantum well structure includes a well layer and a barrier layer. The well layer includes a III-V compound semiconductor containing indium as a group-III element, and the barrier layer includes a III-V compound semiconductor containing indium and aluminum as group-III elements. The lower spacer region is disposed between the supporting base and the active layer.
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公开(公告)号：US20160372609A1
公开(公告)日：2016-12-22
申请号：US15185917
申请日：2016-06-17
发明人： Makoto Kiyama , Masaya Okada , Susumu Yoshimoto , Masaki Ueno
IPC分类号： H01L29/872 , H01L29/16 , H01L29/40 , H01L29/167 , H01L29/08 , H01L29/66 , H01L29/207 , H01L29/45 , H01L29/20 , H01L29/06
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/1608 , H01L29/2003 , H01L29/36 , H01L29/402 , H01L29/6606 , H01L29/66212
摘要： A Schottky barrier diode includes a semiconductor layer, a Schottky electrode on a first main surface of the semiconductor layer, the Schottky electrode being in Schottky contact with the semiconductor layer, and an ohmic electrode on a second main surface of the semiconductor layer opposite the first main surface, the ohmic electrode being in ohmic contact with the semiconductor layer. The semiconductor layer contains gallium nitride or silicon carbide. The semiconductor layer includes a drift layer. The drift layer has a thickness of 2 μm or less.
摘要翻译： 肖特基势垒二极管包括半导体层，在半导体层的第一主表面上的肖特基电极，与半导体层肖特基接触的肖特基电极以及与第一半导体层相对的半导体层的第二主表面上的欧姆电极 主表面，欧姆电极与半导体层欧姆接触。 半导体层包含氮化镓或碳化硅。 半导体层包括漂移层。 漂移层的厚度为2μm以下。
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