公开(公告)号：US20160266295A1

公开(公告)日：2016-09-15

申请号：US14846471

申请日：2015-09-04

Applicant: Samsung Display Co., Ltd.

Inventor： Sung-Won CHO ,  Jung-Ha SON ,  Su-Bin BAE ,  Yun-Jong YEO ,  Joo-Hyung LEE

IPC: G02B5/30 ,  G02F1/1335

CPC classification number: G02B5/3058 ,  B81C1/00388 ,  B81C1/00404 ,  B81C2201/0149 ,  C09K13/00 ,  C23F4/00 ,  G02F2001/133548 ,  G03F7/0041 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3088 ,  H01L21/31056 ,  H01L21/31111 ,  H01L21/31116

Abstract: A method of manufacturing a polarizer includes forming a first layer on a base substrate, forming a first partition wall layer on the first layer, forming a second partition wall layer on the first partition wall, forming a plurality of first partition wall patterns and a plurality of second partition walls disposed on the first partition wall patterns by etching the first partition wall and the second partition wall at the same time, forming a block copolymer layer on the first layer on which the plurality of first partition wall patterns are formed, forming a plurality of fine patterns from the block copolymer layer, and patterning the first layer using the fine patterns and the second partition wall patterns as a mask.

Abstract translation: 偏振片的制造方法包括在基底基板上形成第一层，在第一层上形成第一分隔壁层，在第一分隔壁上形成第二分隔壁层，形成多个第一隔壁图案和多个第一分隔壁图案 通过同时蚀刻第一分隔壁和第二分隔壁而在第一分隔壁图案上设置的第二分隔壁，在形成有多个第一分隔壁图案的第一层上形成嵌段共聚物层，形成 从嵌段共聚物层形成多个精细图案，并使用精细图案和第二分隔壁图案作为掩模对第一层图案化。

公开(公告)号：US20160116795A1

公开(公告)日：2016-04-28

申请号：US14644757

申请日：2015-03-11

Applicant: Samsung Display Co., Ltd.

Inventor： Jung-Ha SON ,  Joo-Hyung LEE ,  Yun-Jong YEO

IPC: G02F1/1335 ,  H01L27/12 ,  G02F1/1362 ,  G02F1/1341 ,  G02F1/1343 ,  G02F1/1368

CPC classification number: G02F1/133514 ,  G02F1/1341 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136222 ,  G02F2203/10 ,  H01L27/124 ,  H01L27/1259

Abstract: A display panel includes a first substrate comprising a plurality of pixel areas, a second substrate facing the first substrate, a liquid crystal layer interposed between the first substrate and the second substrate, a thin film transistor comprising a gate electrode disposed on the first substrate, a semiconductor pattern overlapping with the gate electrode, a source electrode and a drain electrode overlapping with the semiconductor pattern and spaced apart from each other, a plasmonic color filter to which a common voltage is configured to be applied, and comprising a same material as the gate electrode, disposed on a same layer as the gate electrode, and comprising a plurality of holes through which light is configured to be transmitted and a pixel electrode to which a gray scale voltage is configured to be applied, and overlapping with the plasmonic color filter, and electrically connected to the drain electrode.

Abstract translation: 显示面板包括：包括多个像素区域的第一基板;面对第一基板的第二基板;插入在第一基板和第二基板之间的液晶层;薄膜晶体管，包括设置在第一基板上的栅极; 与栅电极重叠的半导体图案，与半导体图案重叠并且彼此间隔开的源电极和漏电极，配置有施加公共电压的等离子体激元滤色器，并且包括与 栅极电极，设置在与栅极电极相同的层上，并且包括多个孔，通过该孔构成透射光;以及像素电极，灰阶电压被配置为施加到其上，并与等离子体激元滤色器重叠 并且电连接到漏电极。

公开(公告)号：US20150357356A1

公开(公告)日：2015-12-10

申请号：US14621303

申请日：2015-02-12

Applicant: Samsung Display Co., Ltd.

Inventor： Jae-Neung KIM ,  Yu-Gwang JEONG ,  Su-Bin BAE ,  Yun-Jong YEO

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1288 ,  H01L27/1214 ,  H01L27/1225 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78669 ,  H01L29/7869

Abstract: A thin film transistor array substrate and a method of manufacturing the thin film transistor array substrate are provided. The thin film transistor array substrate includes: a substrate; a gate electrode disposed on the substrate; a gate insulating layer disposed on the gate electrode; a semiconductor pattern disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor pattern and spaced apart from each other; and a hard mask pattern disposed on the source electrode and the drain electrode.

Abstract translation: 提供薄膜晶体管阵列基板和制造薄膜晶体管阵列基板的方法。 薄膜晶体管阵列基板包括：基板; 设置在所述基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅绝缘层上的半导体图案; 源电极和漏电极，设置在半导体图案上并彼此间隔开; 以及设置在源电极和漏电极上的硬掩模图案。

公开(公告)号：US20150108489A1

公开(公告)日：2015-04-23

申请号：US14579542

申请日：2014-12-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Joo-Han KIM ,  Ki-Yong SONG ,  Dong-Ju YANG ,  Hee-Joon KIM ,  Yeo-Geon YOON ,  Sung-Hen CHO ,  Chang-Hoon KIM ,  Jae-Hong KIM ,  Yu-Gwang JEONG ,  Ki-Yeup LEE ,  Sang-Gab KIM ,  Yun-Jong YEO ,  Shin-Il CHOI ,  Ji-Young PARK

IPC: H01L23/00 ,  H01L27/12

CPC classification number: H01L24/05 ,  G02F1/136227 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L2224/04042 ,  H01L2924/14 ,  H01L2924/1426 ,  H01L2924/00

Abstract: A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut.

Abstract translation: 公开了布线的接触部分及其制造方法。 根据实施例的布线的接触部分包括：基板; 设置在所述基板上的导电层; 设置在所述导电层上并具有接触孔的层间绝缘层; 设置在所述导电层上并填充所述接触孔的金属层; 以及透明电极，设置在所述层间绝缘层上并连接到所述金属层，其中所述层间绝缘层包括下绝缘层和设置在所述下绝缘层上的上绝缘层，所述下绝缘层在所述接触孔处被底切， 并且金属层填充在下绝缘层被切下的部分。

公开(公告)号：US20170097707A1

公开(公告)日：2017-04-06

申请号：US15136451

申请日：2016-04-22

Applicant: Samsung Display Co., Ltd.

Inventor： Ji-Hun KIM ,  Hyun-Min CHO ,  Yun-Jong YEO

IPC: G06F3/047

CPC classification number: G06F3/047 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04111 ,  G06F2203/04112

Abstract: A touch screen panel including a touch electrode disposed on a base substrate, the touch electrode including a plurality of mesh patterns formed by crossing of metal wirings. The mesh patterns include a main electrode pattern and a buffer pattern overlapping the main electrode pattern, the buffer pattern having a thickness greater than 20% of a thickness of the main electrode pattern and less than 30% of a thickness of the main electrode pattern.

公开(公告)号：US20160299423A1

公开(公告)日：2016-10-13

申请号：US14886673

申请日：2015-10-19

Applicant: Samsung Display Co., Ltd.

Inventor： Yun-Jong YEO ,  Jung-Ha SON ,  Joo-Hyung LEE ,  Dae-Young LEE

IPC: G03F7/00

CPC classification number: G03F7/0002

Abstract: An imprint lithography method includes disposing a mask layer on a base substrate in first and in second areas, reducing a thickness of the mask layer in the first area, disposing a first planarization layer on the mask layer in the first and second areas, forming a first imprint pattern on the first planarization layer, forming a first planarization layer pattern by etching the first planarization layer using the first imprint pattern, forming a first mask pattern in the first area by etching the mask layer using the first planarization layer pattern, diposing a second planarization layer on the first mask pattern and the mask layer in the first and second areas, forming a second imprint pattern on the second planarization layer, forming a second planarization layer pattern by etching the planarization layer using the second imprint pattern, and forming a second mask pattern in the second area.

Abstract translation: 压印光刻方法包括在第一和第二区域中的基底基板上设置掩模层，减小第一区域中的掩模层的厚度，在第一和第二区域的掩模层上设置第一平坦化层，形成 在第一平坦化层上形成第一印记图案，通过使用第一印模图案蚀刻第一平坦化层形成第一平坦化图案，通过使用第一平坦化图案蚀刻掩模层，在第一区域中形成第一掩模图案， 在第一掩模图案上的第二平坦化层和第一和第二区域中的掩模层，在第二平坦化层上形成第二印刷图案，通过使用第二印记图案蚀刻平坦化层形成第二平坦化图案，并形成 第二区域中的第二掩模图案。