公开(公告)号：US20170219647A1

公开(公告)日：2017-08-03

申请号：US15295244

申请日：2016-10-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won-Joo YUN ,  Sukyong KANG ,  Hye-Seung YU ,  Hyunui LEE

IPC: G01R31/28 ,  G01R31/02 ,  H01L25/065 ,  G01R31/26 ,  H03K17/687 ,  H01L21/66

CPC classification number: G01R31/2853 ,  G01R31/025 ,  G01R31/26 ,  G01R31/2884 ,  G11C5/025 ,  G11C29/006 ,  G11C29/025 ,  G11C29/50008 ,  H01L22/14 ,  H01L22/34 ,  H01L25/0657 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06596 ,  H01L2924/15311 ,  H03K17/6872

Abstract: Disclosed are a method and a device for detecting a short circuit between adjacent micro-bumps. The method includes setting outputs of a pull-up driver and a pull-down driver of a data output circuit connected with a micro-bump to be suitable for a test type and determining whether a short circuit is generated.

公开(公告)号：US20170162238A1

公开(公告)日：2017-06-08

申请号：US15295571

申请日：2016-10-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunui LEE ,  Won-joo YUN ,  Hye-seung YU ,  In-dal SONG

IPC: G11C7/12 ,  G06F3/06 ,  G11C29/12 ,  G11C7/22 ,  G11C8/14 ,  G11C8/08

CPC classification number: G11C7/12 ,  G06F3/0608 ,  G06F3/0652 ,  G06F3/0656 ,  G06F3/0673 ,  G06F13/4086 ,  G11C7/02 ,  G11C7/1057 ,  G11C7/1084 ,  G11C7/22 ,  G11C8/08 ,  G11C8/14 ,  G11C29/021 ,  G11C29/022 ,  G11C29/028 ,  G11C29/12 ,  G11C29/12005 ,  G11C29/1201 ,  G11C29/56012 ,  G11C2029/5602 ,  G11C2207/105

Abstract: Provided is a memory device configured to perform a calibration operation without having a ZQ pin. The memory device includes a calibration circuit configured to generate a pull-up calibration code and a pull-down calibration code which termination of a data input/output pad for impedance matching in the data input/output pad is controlled. The calibration circuit performs a first calibration operation for trimming first and second reference resistors based on an external resistor to be connected to a pad, and a second calibration operation for generating the pull-up calibration code and the pull-down calibration code based on the trimmed second reference resistor.

公开(公告)号：US20170331493A1

公开(公告)日：2017-11-16

申请号：US15488789

申请日：2017-04-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hye-Seung YU ,  Sukyong KANG ,  Wonjoo YUN ,  Hyunui LEE ,  Jae-Hun JUNG

IPC: H03M13/09 ,  G06F11/10 ,  G11C29/52 ,  H03M13/00

CPC classification number: H03M13/098 ,  G06F11/1048 ,  G06F11/1068 ,  G11C29/52 ,  H03M13/611

Abstract: A memory device including a parity check circuit and a mask circuit may be provided. The parity check circuit may perform parity check on data sampled according to a data strobe signal, which does not include a post-amble. The mask circuit may generate a parity error signal based on results of the parity check, and output the parity error signal during a time period determined according to a burst length of the data.

公开(公告)号：US20190165808A1

公开(公告)日：2019-05-30

申请号：US16262127

申请日：2019-01-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hye-Seung YU ,  Sukyong KANG ,  Wonjoo YUN ,  Hyunui LEE ,  Jae-Hun JUNG

IPC: H03M13/09 ,  H03M13/00 ,  G11C29/52 ,  G06F11/10

Abstract: A memory device including a parity check circuit and a mask circuit may be provided. The parity check circuit may perform parity check on data sampled according to a data strobe signal, which does not include a post-amble. The mask circuit may generate a parity error signal based on results of the parity check, and output the parity error signal during a time period determined according to a burst length of the data.