公开(公告)号：US20160358893A1

公开(公告)日：2016-12-08

申请号：US15241452

申请日：2016-08-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heung-Kyu KWON ,  Min-Ok NA ,  Sung-Woo PARK ,  Ji-Hyun PARK ,  Su-Min PARK

IPC: H01L25/065 ,  H01L23/48 ,  H01L25/00 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16112 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01064 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.

Abstract translation: 一种装置包括具有第一焊盘的第一衬底和具有第二焊盘的第二衬底。 第一模塑料置于第一基材和第二基材之间。 第一半导体芯片设置在第一基板上并与第一模制部分接触。 第一连接器接触第一焊盘，第二连接器接触第二焊盘。 第二连接器设置在第一连接器上。 第二连接器的体积大于第一连接器的体积。 露出第一半导体芯片的表面。 第一模塑料与第二连接器相接触，第二连接器的至少一部分由第一模塑料包围。

公开(公告)号：US20180331071A1

公开(公告)日：2018-11-15

申请号：US15971600

申请日：2018-05-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heung-Kyu KWON ,  Min-Ok NA ,  Sung-Woo PARK ,  Ji-Hyun PARK ,  Su-Min PARK

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L23/31 ,  H01L25/18 ,  H01L25/10 ,  H01L23/552

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16112 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01064 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.

公开(公告)号：US20130256847A1

公开(公告)日：2013-10-03

申请号：US13778467

申请日：2013-02-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Su-Min PARK ,  Jong-Ho LEE

IPC: H01L23/58 ,  H01L21/50

CPC classification number: H01L21/4817 ,  H01L21/50 ,  H01L23/552 ,  H01L23/585 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/166 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: Provided are a semiconductor device including an EMI shield, a method of manufacturing the same, a semiconductor module including the semiconductor device, and an electronic system including the semiconductor device. The semiconductor device includes a lower semiconductor package, an upper semiconductor package, a package bump, and an EMI shield. The lower semiconductor package includes a lower substrate, a lower semiconductor chip mounted on the lower substrate, and a ground wire separated from the lower semiconductor chip. The upper semiconductor package includes an upper substrate stacked on the lower semiconductor package, and an upper semiconductor chip stacked on the upper substrate. The package bump electrically connects the upper semiconductor package and the lower semiconductor package. The EMI shield covers the upper and lower semiconductor packages and is electrically connected to the ground wire.

公开(公告)号：US20150037937A1

公开(公告)日：2015-02-05

申请号：US14486372

申请日：2014-09-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Su-Min PARK ,  Jong-Ho LEE

IPC: H01L21/48 ,  H01L23/00

CPC classification number: H01L21/4817 ,  H01L21/50 ,  H01L23/552 ,  H01L23/585 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/166 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: Provided are a semiconductor device including an EMI shield, a method of manufacturing the same, a semiconductor module including the semiconductor device, and an electronic system including the semiconductor device. The semiconductor device includes a lower semiconductor package, an upper semiconductor package, a package bump, and an EMI shield. The lower semiconductor package includes a lower substrate, a lower semiconductor chip mounted on the lower substrate, and a ground wire separated from the lower semiconductor chip. The upper semiconductor package includes an upper substrate stacked on the lower semiconductor package, and an upper semiconductor chip stacked on the upper substrate. The package bump electrically connects the upper semiconductor package and the lower semiconductor package. The EMI shield covers the upper and lower semiconductor packages and is electrically connected to the ground wire.

Abstract translation: 提供了包括EMI屏蔽的半导体器件，其制造方法，包括该半导体器件的半导体模块以及包括该半导体器件的电子系统。 半导体器件包括下半导体封装，上半导体封装，封装凸块和EMI屏蔽。 下半导体封装包括下基板，安装在下基板上的下半导体芯片以及与下半导体芯片分离的接地线。 上半导体封装包括堆叠在下半导体封装上的上基板和堆叠在上基板上的上半导体芯片。 封装凸块电连接上半导体封装和下半导体封装。 EMI屏蔽覆盖上半导体封装和下半导体封装，并且电连接到地线。