利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

35 条记录 (耗时 0.027 秒)

    Recessed gate electrode and method of forming the same and semiconductor device having the recessed gate electrode and method of manufacturing the same
    4.
    发明授权
    Recessed gate electrode and method of forming the same and semiconductor device having the recessed gate electrode and method of manufacturing the same 有权
    嵌入式栅电极及其形成方法以及具有凹陷栅电极的半导体器件及其制造方法

    公开(公告)号：US07563677B2

    公开(公告)日：2009-07-21

    申请号：US11531239

    申请日：2006-09-12

    申请人： Dae-Han Yoo ,  Kong-Soo Lee ,  Chang-Hoon Lee ,  Yong-Woo Hyung ,  Hyeon-Deok Lee ,  Hyo-Jung Kim ,  Jung-Hwan Oh ,  Young-Sub You

    发明人： Dae-Han Yoo ,  Kong-Soo Lee ,  Chang-Hoon Lee ,  Yong-Woo Hyung ,  Hyeon-Deok Lee ,  Hyo-Jung Kim ,  Jung-Hwan Oh ,  Young-Sub You

    IPC分类号： H01L21/336

    CPC分类号： H01L27/10894 ,  H01L27/10876 ,  H01L29/4236 ,  H01L29/66621

    摘要： A recessed gate electrode structure includes a first recess and a second recess in communication with the first recess both formed in a substrate. The second recess is larger than the first recess. A gate dielectric layer is formed on a top surface of the substrate and on an inner surface of the first and second recesses. A first polysilicon layer fills the first recess and is doped with impurities at a first impurity density. A second polysilicon layer fills the second recess and is doped with the impurities at a second impurity density. A void is defined within the second polysilicon layer. A third polysilicon layer is formed on the gate dielectric and first polysilicon layers and is doped with the impurities at a third impurity density. Due to impurities in the second polysilicon layer, migration of the void within the second recess may be substantially prevented.

    摘要翻译： 凹陷栅极电极结构包括第一凹部和与形成在基板中的第一凹部连通的第二凹部。 第二凹部比第一凹部大。 栅极电介质层形成在基板的顶表面上和第一凹槽和第二凹槽的内表面上。 第一多晶硅层填充第一凹槽并以第一杂质密度掺杂杂质。 第二多晶硅层填充第二凹槽，并以第二杂质密度掺杂杂质。 在第二多晶硅层内限定空隙。 在栅极电介质和第一多晶硅层上形成第三多晶硅层，并以第三杂质密度掺杂杂质。 由于第二多晶硅层中的杂质，可以基本上防止第二凹陷内的空隙的迁移。

    RECESSED GATE ELECTRODE AND METHOD OF FORMING THE SAME AND SEMICONDUCTOR DEVICE HAVING THE RECESSED GATE ELECTRODE AND METHOD OF MANUFACTURING THE SAME
    5.
    发明申请
    RECESSED GATE ELECTRODE AND METHOD OF FORMING THE SAME AND SEMICONDUCTOR DEVICE HAVING THE RECESSED GATE ELECTRODE AND METHOD OF MANUFACTURING THE SAME 有权
    残留门电极及其制造方法和具有阻挡栅极电极的半导体器件及其制造方法

    公开(公告)号：US20070059889A1

    公开(公告)日：2007-03-15

    申请号：US11531239

    申请日：2006-09-12

    申请人： Dae-Han Yoo ,  Kong-Soo Lee ,  Chang-Hoon Lee ,  Yong-Woo Hyung ,  Hyeon-Deok Lee ,  Hyo-Jung KIM ,  Jung-Hwan OH ,  Young-Sub You

    发明人： Dae-Han Yoo ,  Kong-Soo Lee ,  Chang-Hoon Lee ,  Yong-Woo Hyung ,  Hyeon-Deok Lee ,  Hyo-Jung KIM ,  Jung-Hwan OH ,  Young-Sub You

    IPC分类号： H01L21/336

    CPC分类号： H01L27/10894 ,  H01L27/10876 ,  H01L29/4236 ,  H01L29/66621

    摘要： A recessed gate electrode structure includes a first recess and a second recess in communication with the first recess both formed in a substrate. The second recess is larger than the first recess. A gate dielectric layer is formed on a top surface of the substrate and on an inner surface of the first and second recesses. A first polysilicon layer fills the first recess and is doped with impurities at a first impurity density. A second polysilicon layer fills the second recess and is doped with the impurities at a second impurity density. A void is defined within the second polysilicon layer. A third polysilicon layer is formed on the gate dielectric and first polysilicon layers and is doped with the impurities at a third impurity density. Due to the presence of impurities in the second polysilicon layer, migration of the void within the second recess may be substantially prevented.

    摘要翻译： 凹陷栅极电极结构包括第一凹部和与形成在基板中的第一凹部连通的第二凹部。 第二凹部比第一凹部大。 栅极电介质层形成在基板的顶表面上和第一凹槽和第二凹槽的内表面上。 第一多晶硅层填充第一凹槽并以第一杂质密度掺杂杂质。 第二多晶硅层填充第二凹槽，并以第二杂质密度掺杂杂质。 在第二多晶硅层内限定空隙。 在栅极电介质和第一多晶硅层上形成第三多晶硅层，并以第三杂质密度掺杂杂质。 由于在第二多晶硅层中存在杂质，可以基本上防止第二凹陷内的空隙的迁移。

    CMOS IMAGE SENSORS AND METHODS OF FABRICATING SAME
    7.
    发明申请
    CMOS IMAGE SENSORS AND METHODS OF FABRICATING SAME 审中-公开
    CMOS图像传感器及其制造方法

    公开(公告)号：US20080296644A1

    公开(公告)日：2008-12-04

    申请号：US12187103

    申请日：2008-08-06

    申请人： Young-Sub You ,  Jung-Hwan Oh ,  Yong-Woo Hyung ,  Hun-Hyoung Lim

    发明人： Young-Sub You ,  Jung-Hwan Oh ,  Yong-Woo Hyung ,  Hun-Hyoung Lim

    IPC分类号： H01L27/146 ,  H01L21/28

    CPC分类号： H01L27/14623 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/14687 ,  H01L27/14689

    摘要： A CMOS image sensor includes an image transfer transistor therein. This image transfer transistor includes a semiconductor channel region of first conductivity type and an electrically conductive gate on the semiconductor channel region. A gate insulating region is also provided. The gate insulating region extends between the semiconductor channel region and the electrically conductive gate. The gate insulating region includes a nitridated insulating layer extending to an interface with the electrically conductive gate and a substantially nitrogen-free insulating layer extending to an interface with the semiconductor channel region. The nitridated insulating layer may be a silicon oxynitride (SiON) layer.

    摘要翻译： CMOS图像传感器包括其中的图像转移晶体管。 该图像传输晶体管包括半导体沟道区上的第一导电类型的半导体沟道区和导电栅。 还提供了栅极绝缘区域。 栅极绝缘区域在半导体沟道区域和导电栅极之间延伸。 栅极绝缘区域包括延伸到与导电栅极的界面的氮化绝缘层和延伸到与半导体沟道区域的界面的基本上无氮的绝缘层。 氮化绝缘层可以是氮氧化硅（SiON）层。