Method of forming metal nitride film by chemical vapor deposition and method of forming metal contact of semiconductor device using the same
    1.
    发明授权
    Method of forming metal nitride film by chemical vapor deposition and method of forming metal contact of semiconductor device using the same 有权
    通过化学气相沉积形成金属氮化物膜的方法和使用其形成半导体器件的金属接触的方法

    公开(公告)号:US06197683B1

    公开(公告)日:2001-03-06

    申请号:US09156724

    申请日:1998-09-18

    IPC分类号: H01L2144

    摘要: A method of forming a metal nitride film using chemical vapor deposition (CVD), and a method of forming a metal contact of a semiconductor device using the same, are provided. The method of forming a metal nitride film using chemical vapor deposition (CVD) in which a metal source and a nitrogen source are used as a precursor, includes the steps of inserting a semiconductor substrate into a deposition chamber, flowing the metal source into the deposition chamber, removing the metal source remaining in the deposition chamber by cutting off the inflow of the metal source and flowing a purge gas into the deposition chamber, cutting off the purge gas and flowing the nitrogen source into the deposition chamber to react with the metal source adsorbed on the semiconductor substrate, and removing the nitrogen source remaining in the deposition chamber by cutting off the inflow of the nitrogen source and flowing the purge gas into the deposition chamber. Accordingly, the metal nitride film has low resistivity and a low content of Cl even with excellent step coverage, and it can be formed at a temperature of 500° C. or lower. Also, a deposition speed, approximately 20 Å/cycle, is suitable for mass production.

    摘要翻译: 提供了使用化学气相沉积(CVD)形成金属氮化物膜的方法,以及使用其形成使用其的半导体器件的金属接触的方法。 使用其中使用金属源和氮源作为前体的化学气相沉积(CVD)形成金属氮化物膜的方法包括以下步骤:将半导体衬底插入淀积室中,使金属源流入沉积物 通过切断金属源的流入并将净化气体流入沉积室,去除沉积室中残留的金属源,切断净化气体并使氮源流入沉积室以与金属源反应 吸附在半导体衬底上,并且通过切断氮源的流入并将净化气体流入沉积室来除去留在沉积室中的氮源。 因此,即使具有优异的阶梯覆盖,金属氮化物膜也具有低电阻率和低的Cl含量,并且可以在500℃或更低的温度下形成。 此外,沉积速度约为每秒的一个循环,适合批量生产。

    Method for forming metal layer using atomic layer deposition
    2.
    发明授权
    Method for forming metal layer using atomic layer deposition 有权
    使用原子层沉积法形成金属层的方法

    公开(公告)号:US06174809B1

    公开(公告)日:2001-01-16

    申请号:US09212090

    申请日:1998-12-15

    IPC分类号: H01L2144

    摘要: A method for forming a metal layer using an atomic layer deposition process. A sacrificial metal atomic layer is formed on a semiconductor substrate by reacting a precursor containing a metal with a reducing gas, and a metal atomic layer is formed of metal atoms separated from a metal halide gas on a semiconductor substrate by reacting the sacrificial metal atomic layer with a metal halide gas. Also, a silicon atomic layer may be additionally formed on the metal atomic layer using a silicon source gas, to thereby alternately stack metal atomic layers and silicon layers. Thus, a metal layer or a metal silicide layer having excellent step coverage can be formed on the semiconductor substrate.

    摘要翻译: 一种使用原子层沉积工艺形成金属层的方法。 通过使包含金属的前体与还原气体反应而在半导体衬底上形成牺牲金属原子层,并且金属原子层由半导体衬底上的金属卤化物气体分离的金属原子形成,通过使牺牲金属原子层 与金属卤化物气体。 此外,可以使用硅源气体在金属原子层上另外形成硅原子层,从而交替堆叠金属原子层和硅层。 因此,可以在半导体衬底上形成具有优异的阶梯覆盖的金属层或金属硅化物层。

    Method of delivering gas into reaction chamber and shower head used to deliver gas
    3.
    发明授权
    Method of delivering gas into reaction chamber and shower head used to deliver gas 有权
    将气体输送到用于输送气体的反应室和淋浴喷头中的方法

    公开(公告)号:US06478872B1

    公开(公告)日:2002-11-12

    申请号:US09467313

    申请日:1999-12-20

    IPC分类号: C30B2500

    摘要: A method of delivering two or more mutually-reactive reaction gases when a predetermined film is deposited on a substrate, and a shower head used in the gas delivery method, function to increase the film deposition rate while preventing formation of contaminating particles. In this method, one reaction gas is delivered toward the edge of the substrate, and the other reaction gases are delivered toward the central portion of the substrate, each of the reaction gases being delivered via an independent gas outlet to prevent the reaction gases from being mixed. In the shower head, separate passages are provided to prevent the first reaction gas from mixing with the other reaction gases by delivering the first reaction gas from outlets formed around the edge of the bottom surface of the shower head. The other reaction gases are delivered from outlets formed in the central portion of the bottom surface of the shower head. Accordingly, one of the mutually-reactive gases is delivered toward the central portion of the substrate, and the others are delivered toward the edge of the substrate.

    摘要翻译: 当将预定的膜沉积在基底上时输送两个或更多个相互反应的反应气体的方法和用于气体输送方法的淋浴头的作用是提高膜沉积速率同时防止污染颗粒的形成。 在该方法中,一个反应气体被输送到基板的边缘,并且其它反应气体被输送到基板的中心部分,每个反应气体经由独立的气体出口输送,以防止反应气体 混合 在喷淋头中,设置分开的通道,以防止第一反应气体与其它反应气体混合,通过从喷淋头底表面的边缘周围形成的出口输送第一反应气体。 其他反应气体从形成在淋浴喷头的底面的中心部分的出口输送。 因此,相互反应的气体中的一种被输送到基板的中心部分,而其它的被传送到基板的边缘。

    Method for forming metal layer of semiconductor device using metal halide gas
    4.
    发明授权
    Method for forming metal layer of semiconductor device using metal halide gas 有权
    使用金属卤化物气体形成半导体器件的金属层的方法

    公开(公告)号:US06458701B1

    公开(公告)日:2002-10-01

    申请号:US09686622

    申请日:2000-10-12

    IPC分类号: C23L1608

    摘要: A method for forming a metal layer located over a metal underlayer of a semiconductor device, using a metal halogen gas. The method involves supplying a predetermined reaction gas into a reaction chamber for a predetermined period of time prior to deposition of the metal layer. The reaction gas has a higher reactivity with an active halogen element of a metal halogen gas supplied to form the metal layer, compared to a metal element of the metal halogen gas. As the metal halogen gas is supplied into the reaction chamber, the reaction gas reacts with the halogen radicals of the metal halogen gas, so that the metal underlayer is protected from being contaminated by impurities containing the halogen radicals.

    摘要翻译: 一种使用金属卤素气体形成位于半导体器件的金属底层上的金属层的方法。 该方法包括在沉积金属层之前将预定的反应气体提供给反应室预定的时间。 与金属卤素气体的金属元素相比,反应气体与供给的金属卤素气体的活性卤素元素的反应性较高,形成金属层。 当将金属卤素气体供应到反应室中时,反应气体与金属卤素气体的卤素自由基反应,从而保护金属底层免受含有卤素基团的杂质的污染。

    Methods of forming devices including different gate insulating layers on PMOS/NMOS regions
    5.
    发明授权
    Methods of forming devices including different gate insulating layers on PMOS/NMOS regions 有权
    在PMOS / NMOS区域上形成包括不同栅极绝缘层的器件的方法

    公开(公告)号:US07910421B2

    公开(公告)日:2011-03-22

    申请号:US12130646

    申请日:2008-05-30

    IPC分类号: H01L29/66

    摘要: Provided is a method of manufacturing a semiconductor device, in which the thickness of a gate insulating layer of a CMOS device can be controlled. The method can include selectively injecting fluorine (F) into a first region on a substrate and avoiding injecting the fluorine (F) into a second region on the substrate. A first gate insulating layer is formed of oxynitride layers on the first and second regions to have first and second thicknesses, respectively, where the first thickness is less than the second thickness. A second gate insulating layer is formed on the first gate insulating layer and a gate electrode pattern is formed on the second gate insulating layer.

    摘要翻译: 提供一种制造半导体器件的方法,其中可以控制CMOS器件的栅极绝缘层的厚度。 该方法可以包括将氟(F)选择性地注入到衬底上的第一区域中,并且避免将氟(F)注入到衬底上的第二区域中。 第一栅极绝缘层由第一和第二区域上的氧氮化物层形成,以分别具有第一和第二厚度,其中第一厚度小于第二厚度。 在第一栅极绝缘层上形成第二栅极绝缘层,并且在第二栅极绝缘层上形成栅电极图案。

    METHODS OF FORMING DEVICES INCLUDING DIFFERENT GATE INSULATING LAYERS ON PMOS/NMOS REGIONS
    6.
    发明申请
    METHODS OF FORMING DEVICES INCLUDING DIFFERENT GATE INSULATING LAYERS ON PMOS/NMOS REGIONS 有权
    在PMOS / NMOS区域形成不同栅绝缘层的器件的方法

    公开(公告)号:US20080305620A1

    公开(公告)日:2008-12-11

    申请号:US12130646

    申请日:2008-05-30

    IPC分类号: H01L21/425

    摘要: Provided is a method of manufacturing a semiconductor device, in which the thickness of a gate insulating layer of a CMOS device can be controlled. The method can include selectively injecting fluorine (F) into a first region on a substrate and avoiding injecting the fluorine (F) into a second region on the substrate. A first gate insulating layer is formed of oxynitride layers on the first and second regions to have first and second thicknesses, respectively, where the first thickness is less than the second thickness. A second gate insulating layer is formed on the first gate insulating layer and a gate electrode pattern is formed on the second gate insulating layer.

    摘要翻译: 提供一种制造半导体器件的方法,其中可以控制CMOS器件的栅极绝缘层的厚度。 该方法可以包括将氟(F)选择性地注入到衬底上的第一区域中,并且避免将氟(F)注入到衬底上的第二区域中。 第一栅极绝缘层由第一和第二区域上的氧氮化物层形成,以分别具有第一和第二厚度,其中第一厚度小于第二厚度。 在第一栅极绝缘层上形成第二栅极绝缘层,并且在第二栅极绝缘层上形成栅电极图案。

    Semiconductor Devices Having Transistors with Different Gate Structures and Related Methods
    7.
    发明申请
    Semiconductor Devices Having Transistors with Different Gate Structures and Related Methods 审中-公开
    具有不同栅极结构的晶体管的半导体器件及相关方法

    公开(公告)号:US20080116530A1

    公开(公告)日:2008-05-22

    申请号:US11855413

    申请日:2007-09-14

    IPC分类号: H01L29/94 H01L21/8238

    摘要: A semiconductor device may include a semiconductor substrate and first and second transistors. The first transistor may have a first gate structure on the semiconductor substrate, and the first gate structure may include a first gate insulating layer between a first gate electrode and the semiconductor substrate. The first gate insulating layer may include first and second dielectric materials with the second dielectric material having a greater dielectric constant than the first dielectric material. Moreover, the first gate electrode may be in contact with the second dielectric material. The second transistor may have a second gate structure on the semiconductor substrate, with the second gate structure including a second gate insulating layer between a second gate electrode and the semiconductor substrate. Related methods are also discussed.

    摘要翻译: 半导体器件可以包括半导体衬底和第一和第二晶体管。 第一晶体管可以在半导体衬底上具有第一栅极结构,并且第一栅极结构可以包括在第一栅极电极和半导体衬底之间的第一栅极绝缘层。 第一栅极绝缘层可以包括第一和第二介电材料,其中第二介电材料具有比第一介电材料更大的介电常数。 此外,第一栅电极可以与第二电介质材料接触。 第二晶体管可以在半导体衬底上具有第二栅极结构,其中第二栅极结构包括在第二栅电极和半导体衬底之间的第二栅极绝缘层。 还讨论了相关方法。

    Methods of forming metal wiring in semiconductor devices using etch stop layers
    9.
    发明授权
    Methods of forming metal wiring in semiconductor devices using etch stop layers 有权
    使用蚀刻停止层在半导体器件中形成金属布线的方法

    公开(公告)号:US07521357B2

    公开(公告)日:2009-04-21

    申请号:US11063936

    申请日:2005-02-23

    IPC分类号: H01L21/4763

    摘要: A method of forming a metal wiring in a semiconductor device can include forming an etch stop layer outside a contact hole formed in an insulation layer and avoiding forming the etch stop layer inside the contact hole. A conductive layer can be formed on the etch stop layer outside the contact hole and on an exposed conductive pattern inside the contact hole and on a sidewall of the contact hole and a metal layer can be formed on the conductive layer to fill the contact hole.

    摘要翻译: 在半导体器件中形成金属布线的方法可以包括在形成在绝缘层中的接触孔之外形成蚀刻停止层,并避免在接触孔内形成蚀刻停止层。 可以在接触孔外部的蚀刻停止层上形成导电层,并且在接触孔内部和接触孔的侧壁上的暴露的导电图案上形成导电层,并且可以在导电层上形成金属层以填充接触孔。