Enhanced interconnection to ceramic substrates
    6.
    发明授权
    Enhanced interconnection to ceramic substrates 失效
    增强与陶瓷基板的互连

    公开(公告)号:US06319829B1

    公开(公告)日:2001-11-20

    申请号:US09376599

    申请日:1999-08-18

    IPC分类号: H01L2144

    摘要: A semiconductor chip interposer increases fatigue life of interconnections between a first component having a relatively high thermal coefficient of expansion (TCE) and a second component having a relatively low TCE. The semiconductor chip interposer includes a thin metal plate having a plurality of through holes, the thin metal plate having a TCE intermediate the relatively high TCE and the relatively low TCE. An insulation coating on the thin metal plate is also included on walls of the through holes. An electrical conductive material fills each of the insulated through holes for electrical interconnection between the first component and the second component.

    摘要翻译: 半导体芯片插入器增加具有相对较高的热膨胀系数(TCE)的第一部件和具有相对较低TCE的第二部件之间的互连的疲劳寿命。 半导体芯片插入件包括具有多个通孔的薄金属板,该薄金属板具有TCE中间相对高的TCE和相对较低的TCE。 薄金属板上的绝缘涂层也包括在通孔的壁上。 导电材料填充每个绝缘通孔,用于第一部件和第二部件之间的电互连。