CIRCUIT BOARD STRUCTURE WITH EMBEDDED SEMICONDUCTOR CHIP AND METHOD FOR FABRICATING THE SAME
    1.
    发明申请
    CIRCUIT BOARD STRUCTURE WITH EMBEDDED SEMICONDUCTOR CHIP AND METHOD FOR FABRICATING THE SAME 有权
    具有嵌入式半导体芯片的电路板结构及其制造方法

    公开(公告)号:US20080116565A1

    公开(公告)日:2008-05-22

    申请号:US11868010

    申请日:2007-10-05

    IPC分类号: H01L23/04 H01L21/02

    摘要: The present invention provides a circuit board structure with an embedded semiconductor chip and a method for fabricating the same. The circuit board structure includes a carrier board having a first surface, a second surface, and a through hole penetrating the carrier board from the first surface to the second surface; a semiconductor chip having an active surface whereon a plurality of electrode pads are formed and a non-active surface, embedded in the through hole; a photosensitive first dielectric layer formed on the first surface of the carrier board and an opening formed thereon to expose the non-active surface of the semiconductor chip; a photosensitive second dielectric layer formed on the second surface of the carrier board and the active surface of the semiconductor chip.

    摘要翻译: 本发明提供一种具有嵌入式半导体芯片的电路板结构及其制造方法。 电路板结构包括具有第一表面,第二表面和从第一表面穿过载体板到第二表面的通孔的载体板; 具有形成有多个电极焊盘的活性表面的半导体芯片和埋入通孔中的非活性表面; 形成在所述载体板的第一表面上的光敏第一介电层和形成在其上的开口,以露出所述半导体芯片的非活性表面; 形成在所述载体板的第二表面上的感光性第二介电层和所述半导体芯片的有源表面。

    PACKAGING SUBSTRATE HAVING CHIP EMBEDDED THEREIN AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    PACKAGING SUBSTRATE HAVING CHIP EMBEDDED THEREIN AND MANUFACTURING METHOD THEREOF 审中-公开
    具有嵌入芯片的包装基板及其制造方法

    公开(公告)号:US20090032930A1

    公开(公告)日:2009-02-05

    申请号:US11832466

    申请日:2007-08-01

    IPC分类号: H01L21/52 H01L23/18

    摘要: A packaging substrate having a chip embedded therein, comprises a first aluminum substrate having a first cavity therein; a second aluminum substrate having a second cavity corresponding to the first cavity; a dielectric layer disposed between the first aluminum substrate and the second aluminum substrate; a chip embedded in the first cavity and the second cavity, having an active surface with a plurality of electrode pads thereon; and one built-up structure disposed on the surface of the first aluminum substrate and the active surface of the chip, wherein the built-up structure has a plurality of conductive vias electrically connecting to the electrode pads. The substrate warpage is obviously reduced by the assistance of using aluminum or aluminum alloy as the material of the substrate. Also, a method of manufacturing a packaging substrate having a chip embedded therein is disclosed.

    摘要翻译: 具有嵌入其中的芯片的封装基板包括其中具有第一腔的第一铝基板; 第二铝基板,具有对应于第一空腔的第二腔; 设置在所述第一铝基板和所述第二铝基板之间的电介质层; 嵌入在所述第一腔和所述第二腔中的芯片,具有其上具有多个电极焊盘的活性表面; 以及设置在第一铝基板的表面和芯片的有源表面上的一个堆积结构,其中,所述积层结构具有电连接到电极焊盘的多个导电通孔。 通过使用铝或铝合金作为基材的材料,显着减少了基板翘曲。 另外,公开了一种制造具有嵌入其中的芯片的封装衬底的方法。

    METHOD FOR FABRICATING CIRCUIT BOARD STRUCTURE WITH EMBEDDED SEMICONDUCTOR CHIP
    6.
    发明申请
    METHOD FOR FABRICATING CIRCUIT BOARD STRUCTURE WITH EMBEDDED SEMICONDUCTOR CHIP 审中-公开
    用嵌入式半导体芯片制作电路板结构的方法

    公开(公告)号:US20080145975A1

    公开(公告)日:2008-06-19

    申请号:US11956258

    申请日:2007-12-13

    IPC分类号: H01L21/58

    摘要: The invention provides a method for fabricating printed circuit board having an embedded semiconductor chip, including: providing a carrier board including a first and a second surface and at least one through hole penetrating the first and second surfaces; disposing a semiconductor chip in the through hole and including an active surface and an inactive surface, the active surface including a plurality of electrode pads; forming at least one non photoimagable laminating layer on the first surface of the carrier board with a through hole to expose the inactive surface of the semiconductor chip; forming a dielectric layer on the second surface of the carrier board and the active surface of the semiconductor chip; and forming a circuit layer on the dielectric layer, the circuit layer electrically connecting to the electrode pads of the semiconductor chip through conductive structures in the dielectric layer, thereby preventing the carrier board from warpage due to temperature variations and an asymmetric structure during a single-side circuit formation process of the carrier board.

    摘要翻译: 本发明提供一种制造具有嵌入式半导体芯片的印刷电路板的方法,包括:提供包括第一和第二表面的载体板和穿过第一和第二表面的至少一个通孔; 在所述通孔中设置半导体芯片并且包括活性表面和非活性表面,所述活性表面包括多个电极焊盘; 在所述载体板的所述第一表面上形成至少一个不可光成像的层压层,其具有通孔以露出所述半导体芯片的非活性表面; 在载体板的第二表面和半导体芯片的有源表面上形成电介质层; 并且在电介质层上形成电路层,该电路层通过电介质层中的导电结构与半导体芯片的电极焊盘电连接,从而防止载体板由于温度变化而产生翘曲, 载板的侧电路形成过程。

    Circuit board with identifiable information and method for fabricating the same
    8.
    发明授权
    Circuit board with identifiable information and method for fabricating the same 有权
    具有可识别信息的电路板及其制造方法

    公开(公告)号:US08070932B2

    公开(公告)日:2011-12-06

    申请号:US12076425

    申请日:2008-03-18

    IPC分类号: C25D5/02

    摘要: A circuit board with identifiable information and a method for fabricating the same are proposed. At least one insulating layer within the circuit board has a non-circuit area free of a circuit layout. A plurality of openings are formed in the non-circuit area of the insulating layer. A patterned circuit layer is formed on the insulating layer. Metal identifiable information is disposed in the openings of the non-circuit area. By this arrangement, a product status of the circuit board can be traced and identified via the metal patterned information.

    摘要翻译: 提出了具有可识别信息的电路板及其制造方法。 电路板内的至少一个绝缘层具有不具有电路布局的非电路区域。 在绝缘层的非电路区域中形成多个开口。 在绝缘层上形成图案化的电路层。 金属识别信息设置在非电路区域的开口中。 通过这种布置,电路板的产品状态可以通过金属图案信息进行跟踪和识别。

    Package on package structure
    10.
    发明申请
    Package on package structure 审中-公开
    封装结构封装

    公开(公告)号:US20090102039A1

    公开(公告)日:2009-04-23

    申请号:US12285818

    申请日:2008-10-15

    IPC分类号: H01L23/48

    摘要: The present invention relates to a package on package (PoP) structure, which comprises: a first packaging substrate having a plurality of conductive elements on its surface; a second packaging substrate having a plurality of conductive elements on its surface; and a surface-ceramic aluminum plate sandwiched between the first packaging substrate and the second packaging substrate. The surface-ceramic aluminum plate includes plural plated through holes extending through the layer. In addition, the first packaging substrate electrically conducts with the second packaging substrate through these plated through holes. The disclosed structure eliminates the warpage problem of PoP structure, and enhances the strength of PoP structure.

    摘要翻译: 本发明涉及封装封装(PoP)结构,其包括:第一封装基板,其表面上具有多个导电元件; 第二包装基板,其表面上具有多个导电元件; 以及夹在第一包装基板和第二包装基板之间的表面陶瓷铝板。 表面陶瓷铝板包括贯穿该层的多个电镀通孔。 此外,第一包装基板通过这些电镀通孔与第二封装基板电连接。 所公开的结构消除了PoP结构的翘曲问题,并提高了PoP结构的强度。