公开(公告)号：US5888888A

公开(公告)日：1999-03-30

申请号：US791775

申请日：1997-01-29

申请人： Somit Talwar ,  Guarav Verma ,  Karl-Josef Kramer ,  Kurt Weiner

发明人： Somit Talwar ,  Guarav Verma ,  Karl-Josef Kramer ,  Kurt Weiner

IPC分类号： H01L21/225 ,  H01L21/265 ,  H01L21/268 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/336 ,  H01L21/768 ,  H01L21/22 ,  H01L21/24

CPC分类号： H01L29/66507 ,  H01L21/268 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/32053 ,  H01L21/76895 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66575 ,  H01L21/26506 ,  H01L21/26513

摘要： The method of this invention produces a silicide region on a silicon body that is useful for a variety of purposes, including the reduction of the electrical contact resistance to the silicon body or an integrated electronic device formed thereon. The invented method includes the steps of producing an amorphous region on the silicon body using ion implantation, for example, forming or positioning a metal such as titanium, cobalt or nickel in contact with the amorphous region, and irradiating the metal with intense light from a laser source, for example, to cause metal atoms to diffuse into the amorphous region. The amorphous region thus becomes an alloy region with the desired silicide composition. Upon cooling after irradiation, the alloy region becomes partially crystalline. To convert the alloy region into a more crystalline form, the invented method preferably includes a step of treating the alloy region using rapid thermal annealing, for example. An insulator layer and a conductive lead can subsequently be patterned to establish electrical contact to the silicide region. The low contact resistivity of the silicide region provides the capability to transmit relatively high-frequency electronic signals through the contact region. In a preferred application, the invented method is used to form self-aligned silicide contact regions for the gate, source and drain of a metal-insulator-semiconductor field-effect transistor (MISFET).

摘要翻译： 本发明的方法在硅体上产生可用于各种目的的硅化物区域，包括降低与硅体或其上形成的集成电子器件的电接触电阻。 本发明的方法包括以下步骤：使用离子注入在硅体上产生非晶区域，例如形成或定位与非晶区域接触的诸如钛，钴或镍的金属，并用来自 例如，激光源使金属原子扩散到非晶区域。 因此，非晶区域成为具有所需硅化物组成的合金区域。 照射后冷却，合金区域变得部分结晶。 为了将合金区域转化为更结晶的形式，本发明的方法优选包括例如使用快速热退火处理合金区域的步骤。 随后可以对绝缘体层和导电引线进行构图以建立与硅化物区域的电接触。 硅化物区域的低接触电阻率提供了通过接触区域传输相对高频电子信号的能力。 在优选的应用中，本发明的方法用于形成用于金属 - 绝缘体 - 半导体场效应晶体管（MISFET）的栅极，源极和漏极的自对准硅化物接触区域。

公开(公告)号：US5908307A

公开(公告)日：1999-06-01

申请号：US792107

申请日：1997-01-31

申请人： Somit Talwar ,  Karl-Josef Kramer ,  Guarav Verma ,  Kurt Weiner

发明人： Somit Talwar ,  Karl-Josef Kramer ,  Guarav Verma ,  Kurt Weiner

IPC分类号： H01L29/78 ,  H01L21/225 ,  H01L21/265 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/08

CPC分类号： H01L29/66575 ,  H01L21/2254 ,  H01L21/26506 ,  H01L21/823814 ,  H01L29/0847 ,  Y10S148/061

摘要： Pre-amorphization of a surface layer of crystalline silicon to an ultra-shallow (e.g., less than 100 nm) depth provides a solution to fabrication problems including (1) high thermal conduction in crystalline silicon and (2) shadowing and diffraction-interference effects by an already fabricated gate of a field-effect transistor on incident laser radiation. Such problems, in the past, have prevented prior-art projection gas immersion laser doping from being effectively employed in the fabrication of integrated circuits comprising MOS field-effect transistors employing 100 nm and shallower junction technology.

摘要翻译： 晶体硅表面层的超非晶化至超浅（例如，小于100nm）深度提供了制造问题的解决方案，包括（1）晶体硅中的高热传导和（2）阴影和衍射干涉效应 通过场效应晶体管已经制造的入射激光辐射的栅极。 过去这些问题已经阻止了现有技术的投影气体浸没激光掺杂在制造包含使用100nm和较浅结结技术的MOS场效应晶体管的集成电路中有效地使用。

公开(公告)号：US06297135B1

公开(公告)日：2001-10-02

申请号：US09158265

申请日：1998-09-21

申请人： Somit Talwar ,  Gaurav Verma ,  Karl-Josef Kramer ,  Kurt Weiner

发明人： Somit Talwar ,  Gaurav Verma ,  Karl-Josef Kramer ,  Kurt Weiner

IPC分类号： H01L2122

CPC分类号： H01L29/66507 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/268 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/32053 ,  H01L21/76202 ,  H01L21/76895 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66575 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invented method can be used to form silicide contacts to an integrated MISFET device. Field isolation layers are formed to electrically isolate a portion of the silicon substrate, and gate, source and drain regions are formed therein. A polysilicon runner(s) that makes an electrical connection to the integrated device, is formed on the isolation layers. The structure is subjected to ion implantation to amorphized portions of the silicon gate, source, drain and runner regions. A metal layer is formed in contact with the amorphized regions, and the metal layer overlying the active region of the integrated device is selectively irradiated using a mask. The light melts part of the gate, and amorphized source and drain regions while the remaining portions of the integrated device and substrate remain in their solid phases. Metal diffuses into the melted gate, source and drain regions which are thus converted into respective silicide alloy regions. Preferably, during selective irradiation, a portion of the gate region is not exposed to light so that it is relatively cool and acts as a heat sink to draw heat away from the irradiated portion of the gate region. The heat sink effect causes the gate silicidation rate to more closely correspond with the relatively slow source and drain silicidation rates. The method further includes a blanket irradiation step to diffuse metal into the runner regions to form silicide alloy regions which are then treated to form silicide regions.

摘要翻译： 本发明的方法可用于形成集成MISFET器件的硅化物接触。 形成场隔离层以电隔离硅衬底的一部分，并且在其中形成栅极，源极和漏极区域。 在隔离层上形成有与集成器件电连接的多晶硅浇道。 对硅栅，源极，漏极和流道区域的非晶化部分进行离子注入。 形成与非晶化区域接触的金属层，并且使用掩模选择性地照射覆盖在一体化器件的有源区域上的金属层。 光熔化栅极的一部分，并且源极和漏极区域非晶化，而集成器件和衬底的其余部分保持固相。 金属扩散到熔融的栅极，源极和漏极区域中，从而将其转变成相应的硅化物合金区域。 优选地，在选择性照射期间，栅极区域的一部分不暴露于光，使得其相对较冷，并且用作散热器以将热量从栅极区域的照射部分吸走。 散热效应使栅极硅化速率更接近于相对较慢的源极和漏极硅化速率。 该方法还包括毯子辐射步骤，以将金属扩散到流道区域中以形成硅化物合金区域，然后将其处理形成硅化物区域。

公开(公告)号：US06387803B2

公开(公告)日：2002-05-14

申请号：US09158346

申请日：1998-09-21

申请人： Somit Talwar ,  Gaurav Verma ,  Karl-Josef Kramer ,  Kurt Weiner

发明人： Somit Talwar ,  Gaurav Verma ,  Karl-Josef Kramer ,  Kurt Weiner

IPC分类号： H01L2144

CPC分类号： H01L29/665 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/268 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/32053 ,  H01L21/76202 ,  H01L21/76895 ,  H01L29/66507 ,  H01L29/66545 ,  H01L29/66575 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invented method produces a silicide region on a silicon body that is useful for a variety of purposes, including the reduction of the electrical contact resistance to the silicon body or an integrated electronic device formed thereon. The invented method includes a step of producing an amorphous region on the silicon body using ion implantation, for example, a step of forming a metal layer such as titanium, cobalt or nickel in contact with the amorphous region, and a step of irradiating the metal with intense light from a source such as a laser, to cause metal atoms to diffuse into the amorphous region to form an alloy region with a silicide composition. In an application of the invented method to the manufacture of a MISFET device, the metal layer is preferably formed with a thickness that is at least sufficient to produce a stoichiometric proportion of metal and silicon atoms in the amorphous region of the gate of the MISFET device. Importantly, the irradiating step proceeds until the metal overlying the gate alloy region is consumed and the gate alloy region is exposed. The gate alloy region has a higher reflectivity than the metal layer, and thus reduces further thermal loading of the gate alloy region so that silicide growth can be continued in the source and drain regions without adversely impacting the gate of the MISFET device. The invention also includes an integrated MISFET device in which the gate silicide region is greater than the source/drain silicide region.

摘要翻译： 本发明的方法在硅体上产生可用于各种目的的硅化物区域，包括减少对硅体或其上形成的集成电子器件的电接触电阻。 本发明的方法包括使用离子注入在硅体上制造非晶区域的步骤，例如形成与非晶区域接触的诸如钛，钴或镍的金属层的步骤，以及照射金属 来自诸如激光器的源的强光使金属原子扩散到非晶区域中以形成具有硅化物组成的合金区域。 在本发明的方法应用于制造MISFET器件的过程中，金属层优选形成为至少足以在MISFET器件的栅极的非晶区域中产生化学计量比例的金属和硅原子的厚度 。 重要的是，照射步骤进行直到覆盖在栅极合金区域上的金属被消耗，并且露出栅极合金区域。 栅极合金区域具有比金属层更高的反射率，从而降低栅极合金区域的进一步的热负荷，使得可以在源极和漏极区域中继续进行硅化物生长，而不会对MISFET器件的栅极产生不利影响。 本发明还包括其中栅极硅化物区域大于源极/漏极硅化物区域的集成MISFET器件。

公开(公告)号：US09397250B2

公开(公告)日：2016-07-19

申请号：US13463757

申请日：2012-05-03

申请人： Mehrdad M. Moslehi ,  David Xuan-Qi Wang ,  Sam Tone Tor ,  Karl-Josef Kramer

发明人： Mehrdad M. Moslehi ,  David Xuan-Qi Wang ,  Sam Tone Tor ,  Karl-Josef Kramer

IPC分类号： H01L21/20 ,  H01L31/18 ,  H01L21/67 ,  H01L21/683 ,  H01L21/762

CPC分类号： H01L31/18 ,  H01L21/67092 ,  H01L21/6835 ,  H01L21/6838 ,  H01L21/76259 ,  H01L2924/19042 ,  Y10T29/53683 ,  Y10T279/11

摘要： According to one embodiment, a releasing apparatus for separating a semiconductor substrate from a semiconductor template, the releasing apparatus having an enclosed pressure chamber having at least one gas inlet and at least one gas outlet. A top vacuum chuck for securing a released semiconductor substrate or semiconductor template in the enclosed pressure chamber. A bottom vacuum chuck for securing an attached semiconductor substrate and semiconductor template in the enclosed pressure chamber. A gap between the attached semiconductor substrate and semiconductor template and the top vacuum chuck allowing gas flowing through the gap to generate lifting forces on the attached semiconductor substrate and semiconductor template.

摘要翻译： 根据一个实施例，一种用于从半导体模板分离半导体衬底的释放装置，所述释放装置具有封闭的压力室，其具有至少一个气体入口和至少一个气体出口。 用于将释放的半导体衬底或半导体模板固定在封闭的压力室中的顶部真空吸盘。 用于将附接的半导体衬底和半导体模板固定在封闭的压力室中的底部真空吸盘。 附着的半导体衬底和半导体模板和顶部真空吸盘之间的间隙允许气体流过间隙以在附着的半导体衬底和半导体模板上产生提升力。

公开(公告)号：US20130167915A1

公开(公告)日：2013-07-04

申请号：US13057123

申请日：2010-12-09

申请人： Mehrdad M. Moslehi ,  Pawan Kapur ,  Karl-Josef Kramer ,  David Xuan-Qi Wang ,  Sean M. Seutter ,  Virenda V. Rana

发明人： Mehrdad M. Moslehi ,  Pawan Kapur ,  Karl-Josef Kramer ,  David Xuan-Qi Wang ,  Sean M. Seutter ,  Virenda V. Rana

IPC分类号： H01L31/0236 ,  H01L31/18

CPC分类号： H01L31/0236 ,  H01L31/0201 ,  H01L31/02167 ,  H01L31/022441 ,  H01L31/022458 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/03529 ,  H01L31/03921 ,  H01L31/056 ,  H01L31/068 ,  H01L31/0682 ,  H01L31/18 ,  H01L31/1804 ,  H01L31/1892 ,  Y02E10/52 ,  Y02E10/547 ,  Y02P70/521

摘要： Back contact back junction three dimensional solar cell and methods for manufacturing are provided. The back contact back contact back junction three dimensional solar cell comprises a three-dimensional substrate. The substrate comprises a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer is positioned on the doped backside emitter region. Backside emitter contacts and backside base contacts connected to metal interconnects and selectively formed on three-dimensional features of the backside of three-dimensional solar cell.

摘要翻译： 提供背面接头三维太阳能电池及制造方法。 背面接触背面接合三维太阳能电池包括三维基板。 衬底包括具有钝化层的光捕获前侧表面，掺杂的基极区域和与掺杂的基极区域极性相反的掺杂的背侧发射极区域。 背面钝化层位于掺杂背侧发射极区域上。 连接到金属互连的背面发射极触点和背面底部触点，并且选择性地形成在三维太阳能电池的背面的三维特征上。

公开(公告)号：US08193076B2

公开(公告)日：2012-06-05

申请号：US12826641

申请日：2010-06-29

申请人： Mehrdad M. Moslehi ,  David Xuan-Qi Wang ,  Sam Tone Tor ,  Karl-Josef Kramer

发明人： Mehrdad M. Moslehi ,  David Xuan-Qi Wang ,  Sam Tone Tor ,  Karl-Josef Kramer

IPC分类号： H01L21/20

CPC分类号： H01L31/18 ,  H01L21/67092 ,  H01L21/6835 ,  H01L21/6838 ,  H01L21/76259 ,  H01L2924/19042 ,  Y10T29/53683 ,  Y10T279/11

摘要： The present disclosure relates to methods and apparatuses template. The method involves forming a mechanically weak layer conformally on a semiconductor template. Then forming a thin for releasing a thin semiconductor substrate from a reusable semiconductor substrate conformally on the mechanically weak layer. The thin semiconductor substrate, the mechanically weak layer and the template forming a wafer. Then defining the border of the thin-film semiconductor substrate to be released by exposing the peripheral of the mechanically weak layer. Then releasing the thin-film semiconductor substrate by applying a controlled air flow parallel to said mechanically weak layer wherein the controlled air flow separates the thin semiconductor substrate and template according to lifting forces.

摘要翻译： 本公开涉及方法和装置模板。 该方法包括在半导体模板上共形形成机械弱层。 然后在机械弱层上共形成用于从可重复使用的半导体衬底释放薄半导体衬底的薄层。 薄半导体衬底，机械弱层和模板形成晶片。 然后通过暴露机械薄弱层的周边来限定待释放的薄膜半导体衬底的边界。 然后通过施加平行于所述机械弱层的受控空气流来释放薄膜半导体衬底，其中受控空气流根据提升力分离薄半导体衬底和模板。

公开(公告)号：US20120103408A1

公开(公告)日：2012-05-03

申请号：US13204626

申请日：2011-08-05

申请人： Mehrdad M. Moslehi ,  David Xuan-Qi Wang ,  Karl-Josef Kramer ,  Sean M. Seutter ,  Sam Tone Tor ,  Anthony Calcaterra

发明人： Mehrdad M. Moslehi ,  David Xuan-Qi Wang ,  Karl-Josef Kramer ,  Sean M. Seutter ,  Sam Tone Tor ,  Anthony Calcaterra

IPC分类号： H01L31/0224

CPC分类号： H01L31/022458 ,  H01L31/02008 ,  H01L31/02013 ,  H01L31/022441 ,  H01L31/028 ,  H01L31/0516 ,  H01L31/0682 ,  H01L31/1804 ,  H01L31/1892 ,  Y02E10/50

摘要： Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects.

摘要翻译： 描述了提供太阳能电池基板加强和电互连的背接触太阳能电池的背板的制造方法和结构。 该方法包括在半导体衬底的背面上沉积基底电极和发射电极的交错图案，在交叉图案上形成导电发射器插头和基座插头，并且附接具有第二互补图案的基极和发射极的背板 在导电发射器和基座插头上形成电互连。

公开(公告)号：US07950347B2

公开(公告)日：2011-05-31

申请号：US11718572

申请日：2005-11-03

申请人： Katrin Weilermann ,  Karl-Josef Kramer

发明人： Katrin Weilermann ,  Karl-Josef Kramer

IPC分类号： B05C13/00 ,  B05C11/02 ,  B05B13/02

CPC分类号： H01L21/6708 ,  B08B3/02 ,  B08B11/02 ,  H01L21/6838

摘要： The invention provides a rotatable and optionally heatable device for holding a flat substrate. The device includes a supporting means for placing and holding the substrate on a supporting surface, optionally a heater, a means for rotating the supporting means and a means for applying a fluid, e.g. a solvent, onto the side of the substrate facing the supporting surface. The fluid is applied when the supporting device for supporting and holding the substrate is caused to rotate.

摘要翻译： 本发明提供一种用于保持平坦基底的可旋转和任选可加热的装置。 该装置包括用于将基板放置并保持在支撑表面上的支撑装置，可选地是加热器，用于旋转支撑装置的装置和用于施加流体的装置， 溶剂，位于衬底的面向支撑表面的一侧。 当支撑和保持基板的支撑装置被旋转时，施加流体。

公开(公告)号：US20210310227A1

公开(公告)日：2021-10-07

申请号：US17264273

申请日：2019-07-31

申请人： Karl-Josef KRAMER

发明人： Werner Kramer ,  Karl-Josef Kramer

IPC分类号： E03D9/08 ,  H04N5/232 ,  G06T7/00 ,  H04N5/225 ,  G03B17/56 ,  G02B27/00

摘要： A toilet device with inspection functions, with highly controllable cleaning, drying and reporting functions is presented. Said device is geared towards users with impaired mobility and sensory functions, such as overweight people, people lacking strength or reach, as well as, and in particular, paraplegic and quadriplegic users with sensory impairments. This device allows the user to take full control of observing their bowel movement as well as controlling proper cleaning and drying afterwards, including optional post drying treatments such as using lotions in inflamed areas. Voice activation, push button, touch screen and joystick control allow for direct, flexible and reliable control of the implemented functions, despite a user's potential impairments. Logging and reporting to caretakers or doctors provides possibility for quick interaction and feedback, as well as tracking diet incompatibilities when coupled to or compared with a user's diet diary.