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    Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing
    3.
    发明授权
    Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing 失效
    通过注入和两步退火制备具有浅的，高度突变的掺杂区的半导体的工艺

    公开(公告)号：US4617066A

    公开(公告)日：1986-10-14

    申请号：US674623

    申请日：1984-11-26

    申请人： Prahalad K. Vasudev

    发明人： Prahalad K. Vasudev

    IPC分类号： H01L21/20 ,  H01L21/265 ,  H01L21/324 ,  H01L21/263 ,  H01L21/225

    CPC分类号： H01L21/324 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02694 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/2652 ,  Y10S148/024 ,  Y10S148/061

    摘要： A method for producing hyperabrupt P.+-. or N.+-. regions in a near-surface layer of a substantially defect free crystal, using solid phase epitaxy and transient annealing. The process for producing a hyperabrupt retrograde distribution of the dopant species begins with amorphizing the near-surface layer of a base crystal, and then implanting a steep retrograde distribution of the desired species into the amorphized layer, so that the retrograde distribution lies entirely within the amorphized layer, thereby avoiding channelling effects during implantation. The substantially defect-free structure of the base crystal is restored by annealing the implanted base crystal at a temperature sufficiently high to induce solid phase epitaxial regrowth on the underlying nonamorphized crystal, but at a temperature sufficiently low to avoid significant diffusion of the implanted species. The implanted species is subsequently activated by a rapid thermal annealing process, at a temperature sufficiently high to activate the implanted species, but for a very short time so that long-range diffusion does not occur. In a preferred embodiment, the implanted species is boron, BF.sub.2.sup.+, phosphorus, or arsenic in the top 0.20 micrometers of a substantially defect-free silicon base crystal, which may be in a bulk form or epitaxially deposited on an insulator substrate such as sapphire.

    摘要翻译： 使用固相外延和瞬态退火在基本无缺陷晶体的近表面层中产生超破坏的P +/-或N +/-区的方法。 用于产生掺杂剂物质的超破坏逆向分布的方法开始于将基底的近表面层非晶化，然后将所需物质的陡峭逆向分布植入非晶化层中，使得逆行分布完全位于 非晶化层，从而避免植入过程中的沟道效应。 通过在足够高的温度下对植入的基底晶体退火以在下面的未变形晶体上引发固相外延再生长，但在足够低的温度下避免植入物质的显着扩散来恢复基本晶体的基本上无缺陷的结构。 随后通过快速热退火工艺，在足够高的温度下活化植入的物种，但在非常短的时间内激活注入物种，使得不发生远程扩散。 在一个优选的实施方案中，注入的物质是在基本上无缺陷的硅基晶体的顶部0.20微米内的硼，BF 2 +，磷或砷，其可以是体积形式或外延沉积在诸如蓝宝石的绝缘体衬底上。

    P-type semiconductor material having a wide band gap
    5.
    发明授权
    P-type semiconductor material having a wide band gap 失效
    具有宽带隙的P型半导体材料

    公开(公告)号：US4469715A

    公开(公告)日：1984-09-04

    申请号：US505824

    申请日：1983-06-20

    申请人： Arun Madan

    发明人： Arun Madan

    IPC分类号： C23C14/14 ,  C23C16/24 ,  C23C16/50 ,  H01L31/075 ,  H01L31/18 ,  B05D5/12

    CPC分类号： C23C14/14 ,  C23C16/24 ,  C23C16/50 ,  H01L31/075 ,  H01L31/18 ,  Y02E10/548 ,  Y10S148/061

    摘要： The production of improved photoresponsive amorphous alloys and devices, such as photovoltaic, photoreceptive devices and the like; having improved wavelength threshold characteristics is made possible by adding one or more band gap increasing elements to the alloys and devices. The increasing element or elements are added at least to a portion of the active photoresponsive regions of amorphous silicon devices. One increasing element is carbon which increases the band gap from that of the materials without the increasing element incorporated therein. Other increasing elements can be used such as nitrogen. The silicon and increasing elements are concurrently combined and deposited as amorphous alloys by vapor deposition, sputtering or glow discharge decomposition. A density of states reducing element allows the band gap increasing element(s) to be added to the alloy to adjust the band gap without reducing the electronic qualities of the alloy. The compensating or altering element(s) can be added during deposition of the alloy or following deposition. The addition of the increasing element(s) to the alloys increases the band gap to a widened utilization width for a particular device to increase the photoabsorption efficiency and to thus enhance the device photoresponse. The band gap increasing element(s) can be added in varying amounts, in discrete layers or in substantially constant amounts in the alloys and devices.

    摘要翻译： 改进的光响应非晶合金和器件的生产，例如光伏，感光器件等; 通过将一个或多个带隙增加元件添加到合金和器件，可以实现改进的波长阈值特性。 增加的元素至少添加到非晶硅器件的一部分活性光响应区域中。 一个增加的元素是碳，其增加带隙与材料的带隙，而不增加元素。 可以使用其它增加的元素，例如氮。 硅和增加元素通过气相沉积，溅射或辉光放电分解同时组合并沉积为非晶态合金。 状态减少元件的密度允许将带隙增加元件添加到合金中以调节带隙，而不降低合金的电子质量。 补偿或更换元件可以在合金沉积期间或沉积后加入。 将增加的元素添加到合金中将带隙增加到特定器件的扩大的利用宽度以增加光吸收效率并因此增强器件光响应。 带隙增加元件可以以不同的量以不同的层或在合金和器件中以基本恒定的量加入。

    High performance silicon wafer and fabrication process
    6.
    发明授权
    High performance silicon wafer and fabrication process 失效
    高性能硅晶片和制造工艺

    公开(公告)号：US4144099A

    公开(公告)日：1979-03-13

    申请号：US847383

    申请日：1977-10-31

    申请人： Harold D. Edmonds ,  Gary Markovits

    发明人： Harold D. Edmonds ,  Gary Markovits

    IPC分类号： B24B7/22 ,  H01L21/304 ,  H01L21/322 ,  H01L21/324

    CPC分类号： H01L21/02008 ,  B24B7/228 ,  H01L21/3221 ,  Y10S148/017 ,  Y10S148/024 ,  Y10S148/051 ,  Y10S148/06 ,  Y10S148/061 ,  Y10S148/138 ,  Y10S438/974

    摘要： Gettered semiconductor wafers for integrated circuit device manufacture are prepared by grinding a layer of damage into the back face of the wafer to a depth of about 8-35 microns, heating the wafer to a temperature of about 800.degree.-1150.degree. C. for about 1 to 3 hours and quickly cooling the wafer to a temperature below about 600.degree. C., and polishing both sides of the wafer to form a polished, substantially damage-free front face and a smooth back face which has a residual layer of crystallographic damage to provide additional gettering during device manufacture.

    摘要翻译： 用于集成电路器件制造的获得半导体晶片通过将晶片的背面研磨至约8-35微米的深度来制备，将晶片加热至约800℃-1150℃的温度约为约 1至3小时，并将晶片快速冷却至低于约600℃的温度，并抛光晶片的两侧以形成抛光的，基本无损的前表面和光滑的背面，其具有残留的结晶损伤层 以在设备制造期间提供额外的吸气。

    Means and method for stabilizing polycrystalline semiconductor layers
    9.
    发明授权
    Means and method for stabilizing polycrystalline semiconductor layers 失效
    用于稳定多晶半导体层的方法和方法

    公开(公告)号：US4682407A

    公开(公告)日：1987-07-28

    申请号：US821095

    申请日：1986-01-21

    申请人： Syd R. Wilson ,  Richard B. Gregory ,  Charles J. Varker

    发明人： Syd R. Wilson ,  Richard B. Gregory ,  Charles J. Varker

    IPC分类号： H01L23/52 ,  H01L21/265 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/3215 ,  H01L21/76 ,  H01L29/04 ,  H01L29/78 ,  H01L29/786 ,  H01L21/425

    CPC分类号： H01L21/28176 ,  H01L21/32155 ,  H01L29/04 ,  H01L2924/0002 ,  Y10S148/024 ,  Y10S148/061 ,  Y10S148/153 ,  Y10S438/92

    摘要： Implantation of oxygen or nitrogen in polysilicon layers to a dose above about 10.sup.15 ions/cm.sup.2 retards rapid grain boundary migration of conventional dopants such as B, P, As, Sb, and the like during dopant activation. Pre-annealing of the poly films to increase the grain size also decreases rapid grain boundary migration. The efffects can be combined by first pre-annealing and then implanting oxygen or nitrogen before introducing the dopant. It is desirable to anneal the oxygen implant before introducing the dopant to allow for oxygen diffusion to the grain surfaces where is precipitates and blocks the grain boundaries. Vertical and lateral migration of the dopants can be inhibited by placing the implanted oxygen or nitrogen between the dopant and the location desired to be kept comparatively free of dopants. When very high dopant activation temperatures are used the blocking effect of the oxygen on the grain boundaries is overwhelmed by dopant diffusion through the grains.

    摘要翻译： 在掺杂剂活化期间，多晶硅层中的氧或氮在约1015个离子/ cm 2以上的剂量下注入会阻止常规掺杂剂如B，P，As，Sb等的快速晶界迁移。 多晶膜的预退火以增加晶粒尺寸也降低了快速的晶界迁移。 可以通过首先进行预退火，然后在引入掺杂剂之前注入氧气或氮气来结合这些效果。 期望在引入掺杂剂之前对氧注入进行退火以允许氧扩散到沉淀的晶粒表面并阻止晶界。 可以通过将注入的氧或氮置于掺杂剂和期望保持相对不含掺杂剂的位置之间来抑制掺杂剂的垂直和横向迁移。 当使用非常高的掺杂剂活化温度时，氧对晶界的阻挡作用被通过晶粒的掺杂剂扩散所压倒。