公开(公告)号：US5885905A

公开(公告)日：1999-03-23

申请号：US582975

申请日：1996-01-04

申请人： Souichi Nadahara ,  Kikuo Yamabe ,  Hideyuki Kobayashi ,  Kunihiro Terasaka ,  Akihito Yamamoto ,  Naohiko Yasuhisa

发明人： Souichi Nadahara ,  Kikuo Yamabe ,  Hideyuki Kobayashi ,  Kunihiro Terasaka ,  Akihito Yamamoto ,  Naohiko Yasuhisa

IPC分类号： H01L21/223 ,  C30B33/00 ,  H01L21/322 ,  H01L21/324 ,  H01L21/477

CPC分类号： C30B29/06 ,  C30B33/00 ,  H01L21/3225 ,  Y10S438/909

摘要： A method of processing a semiconductor substrate includes the step of subjecting a semiconductor substrate to a heat treatment under a gaseous atmosphere. The method comprises the step of subjecting a semiconductor substrate to a heat treatment at temperatures not lower than 1100.degree. C. under a non-oxidizing atmosphere, wherein heat treatments before said heat treatment applied to the semiconductor substrate are applied under heat treating temperatures and heat treating time which fall within a region defined by a line connecting four points of (900.degree. C., 4 minutes), (800.degree. C., 40 minutes), (700.degree. C., 11 hours) and (600.degree.0 C., 320 hours) in a graph, in which the heat treating temperature is plotted on the abscissa and the heat treating time is plotted on the ordinate of the graph.

摘要翻译： 一种处理半导体衬底的方法包括在气氛下对半导体衬底进行热处理的步骤。 该方法包括在非氧化性气氛下对半导体衬底进行不低于1100℃的热处理的步骤，其中在加热处理温度和热量下施加所述加热处理之前的热处理 处理时间落在由连接（900℃，4分钟），（800℃，40分钟），（700℃，11小时）和（600℃）四个点 ，320小时），其中热处理温度绘制在横坐标上，热处理时间绘制在图的纵坐标上。

公开(公告)号：US5502010A

公开(公告)日：1996-03-26

申请号：US91266

申请日：1993-07-15

申请人： Souichi Nadahara ,  Kikuo Yamabe ,  Hideyuki Kobayashi ,  Kunihiro Terasaka ,  Akihito Yamamoto ,  Naohiko Yasuhisa

发明人： Souichi Nadahara ,  Kikuo Yamabe ,  Hideyuki Kobayashi ,  Kunihiro Terasaka ,  Akihito Yamamoto ,  Naohiko Yasuhisa

IPC分类号： H01L21/223 ,  C30B33/00 ,  H01L21/322 ,  H01L21/324 ,  H01L21/477

CPC分类号： C30B29/06 ,  C30B33/00 ,  H01L21/3225 ,  Y10S438/909

摘要： A method of processing a semiconductor substrate includes the step of subjecting a semiconductor substrate to a heat treatment under a gaseous atmosphere. The method comprises the step of subjecting a semiconductor substrate to a high temperature heat treatment at temperatures not lower than 1100.degree. C. under a non-oxidizing atmosphere, wherein heat treatments before the high temperature heat treatment applied to the semiconductor substrate are applied under heat treating temperatures and heat treating time which fall within a region defined by a line connecting four points of (900.degree. C., 4 minutes), (800.degree. C., 40 minutes), (700.degree. C., 11 hours) and (600.degree. C., 320 hours) in a graph, in which the heat treating temperature is plotted on the abscissa and the heat treating time is plotted on the ordinate of the graph.

摘要翻译： 一种处理半导体衬底的方法包括在气氛下对半导体衬底进行热处理的步骤。 该方法包括在非氧化性气氛下，在不低于1100℃的温度下对半导体衬底进行高温热处理的步骤，其中在加热到半导体衬底的高温热处理之前的热处理被加热 处理温度和热处理时间落入由连接（900℃，4分钟），（800℃，40分钟），（700℃，11小时）和（ 600℃，320小时），其中热处理温度绘制在横坐标上，热处理时间绘制在图的纵坐标上。

公开(公告)号：US5489542A

公开(公告)日：1996-02-06

申请号：US91921

申请日：1993-07-16

申请人： Hiroshi Iwai ,  Toyota Morimoto ,  Hisayo S. Momose ,  Kikuo Yamabe ,  Yoshio Ozawa

发明人： Hiroshi Iwai ,  Toyota Morimoto ,  Hisayo S. Momose ,  Kikuo Yamabe ,  Yoshio Ozawa

IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/51 ,  H01L21/265 ,  H01L21/02 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L21/28185 ,  H01L21/28202 ,  H01L21/823857 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66575 ,  H01L21/28211

摘要： A method for fabricating a semiconductor device on a silicon substrate, consists of producing a silicon oxide film on the silicon substrate producing a thin silicon nitride film on the silicon oxide film, thermally nitriding the silicon nitride film in an atmosphere of nitrogenous gas, producing a conductive film on the silicon nitride film nitrided in the atmosphere of the nitrogenous gas, producing a gate region from the silicon oxide film, the silicon nitride film, and the conductive film, a channel region being positioned under the gate region in the silicon substrate, producing a source region in the silicon substrate adjacent to one side of the channel region, producing a drain region in the silicon substrate adjacent to another side of the channel region, and producing wiring regions on the source region, the drain region, and the gate region.

摘要翻译： 一种在硅衬底上制造半导体器件的方法，包括在硅衬底上产生氧化硅膜，在氧化硅膜上产生薄的氮化硅膜，在氮气气氛中氮化氮化硅膜， 氮化硅膜上的导电膜在氮气气氛中氮化，从硅氧化膜，氮化硅膜和导电膜产生栅极区，沟道区位于硅衬底的栅极区下方， 在所述硅衬底中邻近所述沟道区的一侧产生源极区，在所述硅衬底中与所述沟道区的另一侧相邻的漏极区产生，并且在所述源极区，所述漏极区和所述栅极上产生布线区 地区。

公开(公告)号：US5360748A

公开(公告)日：1994-11-01

申请号：US007876

申请日：1993-01-22

申请人： Soichi Nadahara ,  Kikuo Yamabe

发明人： Soichi Nadahara ,  Kikuo Yamabe

IPC分类号： H01L21/322 ,  H01L21/306

CPC分类号： H01L21/3221 ,  Y10S148/06

摘要： A method of manufacturing a semiconductor device, which comprises the steps of providing a semiconductor substrate having a first primary surface which is designated to form the semiconductor device and a second primary surface opposite from the first primary surface, the substrate containing contaminants therein; forming a boron-doped layer on the second primary surface of the substrate; and absorbing the contaminants into the boron-doped layer.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：提供半导体衬底，所述半导体衬底具有指定为形成所述半导体器件的第一主表面和与所述第一主表面相对的第二主表面，所述衬底中含有污染物; 在所述衬底的所述第二主表面上形成硼掺杂层; 并将污染物吸收到硼掺杂层中。

公开(公告)号：US5297956A

公开(公告)日：1994-03-29

申请号：US799931

申请日：1991-11-29

申请人： Kikuo Yamabe ,  Keitaro Imai ,  Katsuya Okumura ,  Ken Nakao ,  Seikou Ueno

发明人： Kikuo Yamabe ,  Keitaro Imai ,  Katsuya Okumura ,  Ken Nakao ,  Seikou Ueno

IPC分类号： H01L21/324 ,  C30B31/12 ,  C30B31/14 ,  H01L21/22 ,  H01L21/31 ,  H01L21/673 ,  H01L21/683 ,  F23D5/00

CPC分类号： C30B31/12 ,  C30B31/14

摘要： A method and an apparatus for heat treating in a heat treating apparatus having a heating chamber to be introduced with predetermined gas, a heater disposed around the heating chamber, and jigs disposed in the heating chamber for supporting wafers of a plurality of substrates to be treated in parallel with each other, wherein in order to make the temperature distribution of the wafers of the substrates to be treated in the radial direction uniform in the heat treatment, the jigs are formed to determine the sizes and the shape thereof in predetermined ranges having a gradient according to the heat treating method having a predetermined shape determining procedure so that the jigs are formed in ring-shaped trays (i.e. support-ring) for holding at the peripheries the substrates to be treated and the thickness of the tray is constant or such that the outer peripheral side thereof is thicker than the inner peripheral side thereof.

摘要翻译： 一种热处理装置中的热处理方法和装置，其特征在于，具有要加入预定气体的加热室，设置在所述加热室周围的加热器和设置在所述加热室中的夹具，用于支撑待处理的多个基板的晶片 彼此并联，其中为了使热处理中要处理的基板的晶片的温度分布均匀，形成夹具以确定其尺寸和形状，其具有在 根据具有预定形状确定步骤的热处理方法的梯度，使得夹具形成为环状托盘（即，支撑环），用于在周边保持要处理的基板，并且托盘的厚度等于或等于 其外周侧比其内周侧厚。

公开(公告)号：US08026187B2

公开(公告)日：2011-09-27

申请号：US12550788

申请日：2009-08-31

申请人： Yoshiro Kabe ,  Junichi Kitagawa ,  Kikuo Yamabe

发明人： Yoshiro Kabe ,  Junichi Kitagawa ,  Kikuo Yamabe

IPC分类号： H01L21/00 ,  H01L21/76

CPC分类号： H01L21/31662 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/02337 ,  H01L21/31654 ,  H01L21/67115 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/7881 ,  H01L29/792

摘要： To form a good quality silicon oxide film provided with both a superior Qbd characteristic and Rd characteristic, a wafer W is loaded into a plasma treatment apparatus where the surface of a silicon layer 501 of the wafer W is treated by plasma oxidation to form on the silicon layer 501 to a film thickness T1 a silicon oxide film 503. Next, the wafer W on which the silicon oxide film 503 is formed is transferred to a thermal oxidation treatment apparatus where the silicon oxide film 503 is treated by thermal oxidation to thereby form a silicon oxide film 505 having a target film thickness T2.

摘要翻译： 为了形成具有优异的Qbd特性和Rd特性的优质氧化硅膜，将晶片W装载到等离子体处理装置中，其中通过等离子体氧化处理晶片W的硅层501的表面以形成在 硅层501形成膜厚T1，形成氧化硅膜503.接着，将形成有氧化硅膜503的晶片W转移到热氧化处理装置中，通过热氧化处理氧化硅膜503，形成 具有目标膜厚度T2的氧化硅膜505。

公开(公告)号：US5237188A

公开(公告)日：1993-08-17

申请号：US798098

申请日：1991-11-27

申请人： Hiroshi Iwai ,  Toyota Morimoto ,  Hisayo S. Momose ,  Kikuo Yamabe ,  Yoshio Ozawa

发明人： Hiroshi Iwai ,  Toyota Morimoto ,  Hisayo S. Momose ,  Kikuo Yamabe ,  Yoshio Ozawa

IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/51

CPC分类号： H01L21/28185 ,  H01L21/28202 ,  H01L21/823857 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66575 ,  H01L21/28211

摘要： A semiconductor device formed on a silicon substrate consisting of the steps of producing a silicon oxide film on the silicon substrate, producing a thin silicon nitride film on the silicon oxide film, thermally nitriding the silicon nitride film in an atmosphere of nitrogenous gas, producing a conductive film on the silicon nitride film nitrided in the atmosphere of the nitrogenous gas, producing a gate region from the silicon oxide film, the silicon nitride film, and the conductive film, a channel region being positioned under the gate region in the silicon substrate, producing a source region in the silicon substrate adjacent to one side of the channel region, producing a drain region in the silicon substrate adjacent to another side of the channel region, and producing wiring regions on the source region, the drain region, and the gate region.

摘要翻译： 一种形成在硅衬底上的半导体器件，包括在硅衬底上制造氧化硅膜的步骤，在氧化硅膜上产生薄氮化硅膜，在氮气气氛中对氮化硅膜进行氮化，产生 氮化硅膜上的导电膜在氮气气氛中氮化，从硅氧化膜，氮化硅膜和导电膜产生栅极区，沟道区位于硅衬底的栅极区下方， 在所述硅衬底中邻近所述沟道区的一侧产生源极区，在所述硅衬底中与所述沟道区的另一侧相邻的漏极区产生，并且在所述源极区，所述漏极区和所述栅极上产生布线区 地区。

公开(公告)号：US5073813A

公开(公告)日：1991-12-17

申请号：US557716

申请日：1990-07-26

申请人： Shigeru Morita ,  Kikuo Yamabe ,  Masakazu Kakumu

发明人： Shigeru Morita ,  Kikuo Yamabe ,  Masakazu Kakumu

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/768 ,  H01L29/78

CPC分类号： H01L21/76224 ,  H01L21/768

摘要： A MOS structure is formed on a silicon semiconductor substrate surface using a first gate electrode film made of polysilicon, an element isolation groove reaching the inside of the silicon semiconductor substrate is formed, and an insulating film is filled in the groove. In addition, a second gate electrode film made of a refractory metal such as molybdenum silicide is formed to be connected to the first gate electrode film, and the first and second gate electrode films are simultaneously removed to form a MOS gate electrode and a wiring layer.

摘要翻译： 使用由多晶硅制成的第一栅极电极膜，在硅半导体衬底表面上形成MOS结构，形成到硅半导体衬底内部的元件隔离沟，并且将绝缘膜填充到沟槽中。 此外，形成由诸如硅化钼的难熔金属制成的第二栅极电极膜，以连接到第一栅极电极膜，并且同时去除第一和第二栅极电极膜以形成MOS栅电极和布线层 。

公开(公告)号：US08034179B2

公开(公告)日：2011-10-11

申请号：US12865969

申请日：2009-02-06

申请人： Yoshiro Kabe ,  Junichi Kitagawa ,  Kikuo Yamabe

发明人： Yoshiro Kabe ,  Junichi Kitagawa ,  Kikuo Yamabe

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/3105 ,  C23C16/0272 ,  C23C16/402 ,  C23C16/45565 ,  C23C16/511 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/28008 ,  H01L21/31612 ,  H01L21/31654 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/66765

摘要： In order to form an insulating film, which constitutes a flat interface with silicon, by CVD, a surface of silicon is oxidized to form a silicon oxide film using a plasma treatment apparatus in which microwaves are introduced into a chamber through a flat antenna having a plurality of holes. A silicon oxide film is formed as an insulating film on the silicon oxide film by CVD. Further, in the plasma treatment apparatus, a treating gas containing a noble gas and oxygen is introduced into the chamber, and, further, microwaves are introduced into the chamber through the flat antenna. Plasma is generated under a pressure in the range of not less than 6.7 Pa and not more than 533 Pa to modify the insulating film with the plasma.

摘要翻译： 为了通过CVD形成与硅形成平坦界面的绝缘膜，使用等离子体处理装置将硅的表面氧化形成氧化硅膜，其中微波通过具有 多个孔。 通过CVD在氧化硅膜上形成氧化硅膜作为绝缘膜。 此外，在等离子体处理装置中，将含有惰性气体和氧气的处理气体引入室内，并且还通过平板天线将微波引入室内。 在不低于6.7Pa且不大于533Pa的压力下产生等离子体，以便用等离子体改性绝缘膜。

公开(公告)号：US5543334A

公开(公告)日：1996-08-06

申请号：US356419

申请日：1994-12-15

申请人： Ichiro Yoshii ,  Hiroyuki Kamijoh ,  Yoshio Ozawa ,  Kikuo Yamabe ,  Kazuhiko Hashimoto ,  Katsuya Okumura ,  Kaoru Hama

发明人： Ichiro Yoshii ,  Hiroyuki Kamijoh ,  Yoshio Ozawa ,  Kikuo Yamabe ,  Kazuhiko Hashimoto ,  Katsuya Okumura ,  Kaoru Hama

IPC分类号： H01L21/66

CPC分类号： H01L22/14 ,  H01L2924/0002

摘要： A method of screening a semiconductor device. A silicon wafer having gate electrodes formed on the gate oxide film is prepared. An insulating layer is deposited on the silicon wafer. Gate electrode portions of a group of transistors to be tested are exposed. A conductive layer is deposited on the silicon wafer having exposed gate electrodes. The conductive layer is patterned to be a wiring layer so that the gate electrodes of a group of the transistors can be electrically connected to each other. The chip area to be tested is irradiated with light having intensity enough to generate a required quantity of carriers in a depletion layer between a well and a substrate. A predetermined test voltage is applied between the wiring layer and the substrate of the silicon wafer during irradiation of the light to measure current flowing through the wiring layer and the gate oxide film. An abnormality of the gate oxide film can be detected on the basis of the measured current value. The screening method may be conducted before the completion of forming the gate electrodes. Further, gate electrode portions not to be used by a user may not be electrically connected to the gate electrode portions to be used.

摘要翻译： 一种半导体器件的屏蔽方法。 制备在栅氧化膜上形成栅电极的硅晶片。 绝缘层沉积在硅晶片上。 待测试的一组晶体管的栅电极部分露出。 在具有暴露的栅电极的硅晶片上沉积导电层。 导电层被图案化为布线层，使得一组晶体管的栅电极可以彼此电连接。 用足够强度的光照射要测试的芯片面积，以在阱和衬底之间的耗尽层中产生所需量的载流子。 在光照射期间，在布线层和硅晶片的基板之间施加预定的测试电压，以测量流过布线层和栅氧化膜的电流。 可以基于测量的电流值来检测栅氧化膜的异常。 筛选方法可以在形成栅电极的完成之前进行。 此外，用户不使用的栅电极部分可以不与要使用的栅电极部分电连接。