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    METHOD OF CREATING A Ge-RICH CHANNEL LAYER FOR HIGH-PERFORMANCE CMOS CIRCUITS
    1.
    发明申请
    METHOD OF CREATING A Ge-RICH CHANNEL LAYER FOR HIGH-PERFORMANCE CMOS CIRCUITS 失效
    为高性能CMOS电路创建Ge-RICH通道层的方法

    公开(公告)号：US20060148143A1

    公开(公告)日：2006-07-06

    申请号：US10905477

    申请日：2005-01-06

    申请人： Stephen Bedell ,  Bruce Doris ,  Devendra Sadana

    发明人： Stephen Bedell ,  Bruce Doris ,  Devendra Sadana

    IPC分类号： H01L21/84 ,  H01L21/00 ,  H01L21/20

    CPC分类号： H01L21/26506 ,  H01L21/26566 ,  H01L21/2658 ,  H01L21/84 ,  H01L29/1054 ,  H01L29/51 ,  H01L29/66575 ,  H01L29/78687

    摘要： A method of forming a surface Ge-containing channel which can be used to fabricate a Ge-based field effect transistor (FET) which can be applied to semiconductor-on-insulator substrates (SOIs) is provided. The disclosed method uses Ge-containing ion beams, such as cluster ion beams, to create a strained Ge-containing rich region at or near a surface of a SOI substrate. The Ge-containing rich region can be present continuously across the entire surface of the semiconductor substrate, or it can be present as a discrete region at a predetermined surface portion of the semiconductor substrate.

    摘要翻译： 提供了可用于制造可应用于绝缘体上半导体衬底（SOI）的基于Ge的场效应晶体管（FET）的表面Ge含有沟道的形成方法。 所公开的方法使用含Ge离子束，例如簇离子束，以在SOI衬底的表面处或附近产生应变的含Ge富集区。 含锗富含区域可以连续地存在于半导体衬底的整个表面上，或者可以作为半导体衬底的预定表面部分处的离散区域存在。

    Strained semiconductor-on-insulator (sSOI) by a simox method
    3.
    发明申请
    Strained semiconductor-on-insulator (sSOI) by a simox method 有权
    应用绝缘体半导体（sSOI）通过simox方法

    公开(公告)号：US20070164356A1

    公开(公告)日：2007-07-19

    申请号：US11332564

    申请日：2006-01-13

    申请人： Thomas Adam ,  Stephen Bedell ,  Joel de Souza ,  Keith Fogel ,  Alexander Reznicek ,  Devendra Sadana ,  Ghavam Shahidi

    发明人： Thomas Adam ,  Stephen Bedell ,  Joel de Souza ,  Keith Fogel ,  Alexander Reznicek ,  Devendra Sadana ,  Ghavam Shahidi

    IPC分类号： H01L27/12 ,  H01L21/84

    CPC分类号： H01L21/76243 ,  H01L29/66772 ,  H01L29/7849 ,  H01L29/78654

    摘要： A strained (tensile or compressive) semiconductor-on-insulator material is provided in which a single semiconductor wafer and a separation by ion implantation of oxygen process are used. The separation by ion implantation of oxygen process, which includes oxygen ion implantation and annealing creates, a buried oxide layer within the material that is located beneath the strained semiconductor layer. In some embodiments, a graded semiconductor buffer layer is located beneath the buried oxide layer, while in other a doped semiconductor layer including Si doped with at least one of B or C is located beneath the buried oxide layer.

    摘要翻译： 提供了一种应变（拉伸或压缩）半导体绝缘体材料，其中使用单个半导体晶片和通过氧气工艺的离子注入分离。 通过离子注入氧气工艺的分离，其中包括氧离子注入和退火，产生位于应变半导体层之下的材料内的掩埋氧化物层。 在一些实施例中，渐变半导体缓冲层位于掩埋氧化物层的下方，而在其它掺杂半导体层中，包含掺杂有B或C中的至少一个的掺杂半导体层位于掩埋氧化物层的下方。

    Method of preventing surface roughening during hydrogen pre-bake of SiGe substrates using chlorine containing gases
    5.
    发明申请
    Method of preventing surface roughening during hydrogen pre-bake of SiGe substrates using chlorine containing gases 审中-公开
    在使用含氯气体的SiGe衬底的氢预烘烤期间防止表面粗糙化的方法

    公开(公告)号：US20050148162A1

    公开(公告)日：2005-07-07

    申请号：US10751207

    申请日：2004-01-02

    申请人： Huajie Chen ,  Dan Mocuta ,  Richard Murphy ,  Stephen Bedell ,  Devendra Sadana

    发明人： Huajie Chen ,  Dan Mocuta ,  Richard Murphy ,  Stephen Bedell ,  Devendra Sadana

    IPC分类号： C30B25/02 ,  C30B29/52 ,  H01L21/20 ,  H01L21/205 ,  H01L21/306 ,  H01L21/36 ,  H01L21/44

    CPC分类号： H01L21/02046 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02052 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02661

    摘要： The invention forms an epitaxial silicon-containing layer on a silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface and avoids creating a rough surface upon which the epitaxial silicon-containing layer is grown. In order to avoid creating the rough surface, the invention first performs a hydrofluoric acid etching process on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. This etching process removes most of oxide from the surface, and leaves only a sub-monolayer of oxygen (typically 1×1013-1×1015/cm2 of oxygen) at the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. The invention then performs a hydrogen pre-bake process in a chlorine containing environment which heats the silicon germanium, strained silicon, or thin silicon-on-insulator surface sufficiently to remove the remaining oxygen from the surface. By introducing a small amount of chlorine containing gases, the heating processes avoid changing the roughness of the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. Then the process of epitaxially growing the epitaxial silicon-containing layer on the silicon germanium, patterned strained silicon, or patterned silicon-on-insulator surface is performed.

    摘要翻译： 本发明在硅​​锗，图案化的应变硅或图案化的绝缘体上硅表面上形成外延含硅层，并避免产生外延含硅层生长的粗糙表面。 为了避免产生粗糙表面，本发明首先对硅锗，图案化应变硅或图案化的绝缘体上硅表面进行氢氟酸蚀刻工艺。 该蚀刻工艺从表面除去大部分氧化物，并且仅留下氧气的亚单层（通常为1×10 13/1×10 15 / cm 2以上） 的氧），图案化的应变硅或图案化的绝缘体上硅表面。 然后，本发明在含氯环境中进行氢预烘烤过程，其中充分加热硅锗，应变硅或薄的绝缘体上硅表面以从表面除去剩余的氧。 通过引入少量的含氯气体，加热过程避免改变硅锗，图案化的应变硅或图案化的绝缘体上硅表面的粗糙度。 然后进行外延生长硅锗，图案化应变硅或图案化硅绝缘体表面上的外延硅含量层的工艺。

    HIGH-QUALITY SGOI BY ANNEALING NEAR THE ALLOY MELTING POINT
    7.
    发明申请
    HIGH-QUALITY SGOI BY ANNEALING NEAR THE ALLOY MELTING POINT 失效
    高品质SGOI通过靠近合金熔点来退火

    公开(公告)号：US20080116483A1

    公开(公告)日：2008-05-22

    申请号：US12027561

    申请日：2008-02-07

    申请人： Stephen Bedell ,  Huajie Chen ,  Anthony Domenicucci ,  Keith Fogel ,  Richard Murphy ,  Devendra Sadana

    发明人： Stephen Bedell ,  Huajie Chen ,  Anthony Domenicucci ,  Keith Fogel ,  Richard Murphy ,  Devendra Sadana

    IPC分类号： H01L29/165

    CPC分类号： H01L21/26506 ,  H01L21/324 ,  H01L21/7624 ,  H01L21/76254 ,  H01L29/1054

    摘要： A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A heating step is then performed at a temperature that approaches the melting point of the final SiGe alloy and retards the formation of stacking fault defects while retaining Ge. The heating step permits interdiffusion of Ge throughout the first single crystal Si layer and the Ge-containing layer thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer. Moreover, because the heating step is carried out at a temperature that approaches the melting point of the final SiGe alloy, defects that persist in the single crystal SiGe layer as a result of relaxation are efficiently annihilated therefrom. In one embodiment, the heating step includes an oxidation process that is performed at a temperature from about 1230° to about 1320° C. for a time period of less than about 2 hours. This embodiment provides SGOI substrate that have minimal surface pitting and reduced crosshatching.

    摘要翻译： 提供一种形成低缺陷，基本上松弛的绝缘体上硅衬底材料的方法。 该方法包括首先在耐Ge扩散的阻挡层上存在的第一单晶Si层的表面上形成含Ge层。 然后在接近最终SiGe合金的熔点的温度下进行加热步骤，并且在保留Ge的同时延缓形成堆垛层错缺陷。 加热步骤允许Ge遍及第一单晶Si层和含Ge层的相互扩散，从而在阻挡层顶部形成基本松弛的单晶SiGe层。 此外，由于加热步骤在接近最终SiGe合金的熔点的温度下进行，所以由于弛豫而在单晶SiGe层中持续存在的缺陷被有效地湮灭。 在一个实施方案中，加热步骤包括氧化过程，其在约1230℃至约1320℃的温度下进行约少于约2小时的时间。 该实施例提供具有最小表面点蚀和减少的交叉阴影的SGOI衬底。