公开(公告)号：US20090273082A1

公开(公告)日：2009-11-05

申请号：US12115254

申请日：2008-05-05

申请人： Suku Kim ,  James J. Murphy ,  Michael D. Gruenhagen ,  Matthew R. Reynolds ,  Romel N. Manatad ,  Jan Vincent Mancelita

发明人： Suku Kim ,  James J. Murphy ,  Michael D. Gruenhagen ,  Matthew R. Reynolds ,  Romel N. Manatad ,  Jan Vincent Mancelita

IPC分类号： H01L23/488 ,  H01L21/768

CPC分类号： H01L21/74 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/16 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

摘要： Methods for localized thinning of wafers used in semiconductor devices and the structures formed from such methods are described. The methods thin localized areas of the backside of the semiconductor wafer to form recesses with a bi-directional channel design that is repeated within the wafer (or die) so that no straight channel line crosses the wafer (or die). The bi-directional pattern design keeps the channels from being aligned with the crystal orientation of the wafer. The recesses are then filled by a solder ball drop process by dropping proper size solder balls into the recesses and then annealing the wafer to reflow the solder balls and flatten them out. The reflow process begins to fill in the recesses from the bottom up, thereby avoiding void formation and the resulting air traps in the reflowed solder material. Other embodiments are also described.

摘要翻译： 描述了半导体器件中使用的晶片的局部变薄方法和由这些方法形成的结构。 该方法使半导体晶片的背面薄的局部区域形成具有在晶片（或管芯）内重复的双向通道设计的凹槽，使得没有直通道线穿过晶片（或管芯）。 双向图案设计保持通道不与晶片的晶体取向对齐。 然后通过将适当尺寸的焊球落入凹槽中然后通过焊球落下工艺填充凹陷，然后退火晶片以回流焊球并使其平坦化。 回流工艺开始从底部向上填充凹槽，从而避免了空隙形成和回流焊料中形成的空气阱。 还描述了其它实施例。

公开(公告)号：US20120168947A1

公开(公告)日：2012-07-05

申请号：US13404317

申请日：2012-02-24

申请人： Suku Kim ,  James J. Murphy ,  Michael D. Gruenhagen ,  Matthew R. Reynolds ,  Romel N. Manatad ,  Jan Vincent C. Mancelita

发明人： Suku Kim ,  James J. Murphy ,  Michael D. Gruenhagen ,  Matthew R. Reynolds ,  Romel N. Manatad ,  Jan Vincent C. Mancelita

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L21/74 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/16 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

摘要： Methods for localized thinning of wafers used in semiconductor devices and the structures formed from such methods are described. The methods thin localized areas of the backside of the semiconductor wafer to form recesses with a bi-directional channel design that is repeated within the wafer (or die) so that no straight channel line crosses the wafer (or die). The bi-directional pattern design keeps the channels from being aligned with the crystal orientation of the wafer. The recesses are then filled by a solder ball drop process by dropping proper size solder balls into the recesses and then annealing the wafer to reflow the solder balls and flatten them out. The reflow process begins to fill in the recesses from the bottom up, thereby avoiding void formation and the resulting air traps in the reflowed solder material. Other embodiments are also described.

摘要翻译： 描述了半导体器件中使用的晶片的局部变薄方法和由这些方法形成的结构。 该方法使半导体晶片的背面薄的局部区域形成具有在晶片（或管芯）内重复的双向通道设计的凹槽，使得没有直通道线穿过晶片（或管芯）。 双向图案设计保持通道不与晶片的晶体取向对齐。 然后通过将适当尺寸的焊球落入凹槽中然后通过焊球落下工艺填充凹陷，然后退火晶片以回流焊球并使其平坦化。 回流工艺开始从底部向上填充凹槽，从而避免了空隙形成和回流焊料中形成的空气阱。 还描述了其它实施例。

公开(公告)号：US08158506B2

公开(公告)日：2012-04-17

申请号：US12115254

申请日：2008-05-05

申请人： Suku Kim ,  James J. Murphy ,  Michael D. Gruenhagen ,  Matthew R. Reynolds ,  Romel N. Manatad ,  Jan Vincent C. Mancelita

发明人： Suku Kim ,  James J. Murphy ,  Michael D. Gruenhagen ,  Matthew R. Reynolds ,  Romel N. Manatad ,  Jan Vincent C. Mancelita

IPC分类号： H01L21/44

CPC分类号： H01L21/74 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/16 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

摘要： Methods for localized thinning of wafers used in semiconductor devices and the structures formed from such methods are described. The methods thin localized areas of the backside of the semiconductor wafer to form recesses with a bi-directional channel design that is repeated within the wafer (or die) so that no straight channel line crosses the wafer (or die). The bi-directional pattern design keeps the channels from being aligned with the crystal orientation of the wafer. The recesses are then filled by a solder ball drop process by dropping proper size solder balls into the recesses and then annealing the wafer to reflow the solder balls and flatten them out. The reflow process begins to fill in the recesses from the bottom up, thereby avoiding void formation and the resulting air traps in the reflowed solder material. Other embodiments are also described.

摘要翻译： 描述了半导体器件中使用的晶片的局部变薄方法和由这些方法形成的结构。 该方法使半导体晶片的背面薄的局部区域形成具有在晶片（或管芯）内重复的双向通道设计的凹槽，使得没有直通道线穿过晶片（或管芯）。 双向图案设计保持通道不与晶片的晶体取向对齐。 然后通过将适当尺寸的焊球落入凹槽中然后通过焊球落下工艺填充凹陷，然后退火晶片以回流焊球并使其平坦化。 回流工艺开始从底部向上填充凹槽，从而避免了空隙形成和回流焊料中形成的空气阱。 还描述了其它实施例。

公开(公告)号：US08598035B2

公开(公告)日：2013-12-03

申请号：US13151495

申请日：2011-06-02

申请人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Douglas E. Dolan

发明人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Douglas E. Dolan

IPC分类号： H01L21/44

CPC分类号： H01L23/49513 ,  H01L23/49524 ,  H01L24/05 ,  H01L24/16 ,  H01L24/32 ,  H01L24/33 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/2518 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73255 ,  H01L2224/73265 ,  H01L2224/83856 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/37099

摘要： Disclosed are semiconductor dice with backside trenches filled with elastic conductive material. The trenches reduce the on-state resistances of the devices incorporated on the dice. The elastic conductive material provides a conductive path to the backsides of the die with little induced stress on the semiconductor die caused by thermal cycling. Also disclosed are packages using the dice, and methods of making the dice.

摘要翻译： 公开了具有填充有弹性导电材料的背面沟槽的半导体裸片。 沟槽减小了掺入骰子的器件的导通电阻。 弹性导电材料为模具的背面提供导电路径，在半导体芯片上由热循环引起的微小应力。 还公开了使用骰子的包裹以及制造骰子的方法。

公开(公告)号：US08058732B2

公开(公告)日：2011-11-15

申请号：US12275086

申请日：2008-11-20

申请人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Ihsiu Ho ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Rohit Dikshit

发明人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Ihsiu Ho ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Rohit Dikshit

IPC分类号： H01L23/48

CPC分类号： H01L29/7802 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/482 ,  H01L24/16 ,  H01L24/19 ,  H01L24/31 ,  H01L29/0657 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/73253 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/351 ,  H01L2924/00

摘要： Disclosed are semiconductor die structures that enable a die having a vertical power device to be packaged in a wafer-level chip scale package where the current-conducting terminals are present at one surface of the die, and where the device has very low on-state resistance. In an exemplary embodiment, a trench and an aperture are formed in a backside of a die, with the aperture contacting a conductive region at the top surface of the die. A conductive layer and/or a conductive body may be disposed on the trench and aperture to electrically couple the backside current-conducting electrode of the device to the conductive region. Also disclosed are packages and systems using a die with a die structure according to the invention, and methods of making dice with a die structure according to the invention.

摘要翻译： 公开了半导体管芯结构，其使具有垂直功率器件的管芯封装在晶片级芯片级封装中，其中导电端子存在于管芯的一个表面处，并且器件具有非常低的导通状态 抵抗性。 在示例性实施例中，沟槽和孔形成在管芯的背面，孔与导管的顶表面处的导电区接触。 可以在沟槽和孔上设置导电层和/或导体，以将器件的背面导电电极电耦合到导电区域。 还公开了使用根据本发明的具有模具结构的模具的封装和系统，以及根据本发明的具有模具结构的模具的方法。

公开(公告)号：US20110230046A1

公开(公告)日：2011-09-22

申请号：US13151495

申请日：2011-06-02

申请人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Douglas E. Dolan

发明人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Douglas E. Dolan

IPC分类号： H01L21/28

CPC分类号： H01L23/49513 ,  H01L23/49524 ,  H01L24/05 ,  H01L24/16 ,  H01L24/32 ,  H01L24/33 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/2518 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73255 ,  H01L2224/73265 ,  H01L2224/83856 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/37099

摘要： Disclosed are semiconductor dice with backside trenches filled with elastic conductive material. The trenches reduce the on-state resistances of the devices incorporated on the dice. The elastic conductive material provides a conductive path to the backsides of the die with little induced stress on the semiconductor die caused by thermal cycling. Also disclosed are packages using the dice, and methods of making the dice.

摘要翻译： 公开了具有填充有弹性导电材料的背面沟槽的半导体裸片。 沟槽减小了掺入骰子的器件的导通电阻。 弹性导电材料为模具的背面提供导电路径，在半导体芯片上由热循环引起的微小应力。 还公开了使用骰子的包裹以及制造骰子的方法。

公开(公告)号：US07960800B2

公开(公告)日：2011-06-14

申请号：US12334331

申请日：2008-12-12

申请人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Douglas E. Dolan

发明人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Douglas E. Dolan

IPC分类号： H01L27/088

CPC分类号： H01L23/49513 ,  H01L23/49524 ,  H01L24/05 ,  H01L24/16 ,  H01L24/32 ,  H01L24/33 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/2518 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73255 ,  H01L2224/73265 ,  H01L2224/83856 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/37099

摘要： Disclosed are semiconductor dice with backside trenches filled with elastic conductive material. The trenches reduce the on-state resistances of the devices incorporated on the dice. The elastic conductive material provides a conductive path to the backsides of the die with little induced stress on the semiconductor die caused by thermal cycling. Also disclosed are packages using the dice, and methods of making the dice.

摘要翻译： 公开了具有填充有弹性导电材料的背面沟槽的半导体裸片。 沟槽减小了掺入骰子的器件的导通电阻。 弹性导电材料为模具的背面提供导电路径，在半导体芯片上由热循环引起的微小应力。 还公开了使用骰子的包裹以及制造骰子的方法。

公开(公告)号：US20100148325A1

公开(公告)日：2010-06-17

申请号：US12334331

申请日：2008-12-12

申请人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Douglas E. Dolan

发明人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Douglas E. Dolan

IPC分类号： H01L23/495 ,  H01L23/498 ,  H01L21/768

CPC分类号： H01L23/49513 ,  H01L23/49524 ,  H01L24/05 ,  H01L24/16 ,  H01L24/32 ,  H01L24/33 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/2518 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73255 ,  H01L2224/73265 ,  H01L2224/83856 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/37099

摘要： Disclosed are semiconductor dice with backside trenches filled with elastic conductive material. The trenches reduce the on-state resistances of the devices incorporated on the dice. The elastic conductive material provides a conductive path to the backsides of the die with little induced stress on the semiconductor die caused by thermal cycling. Also disclosed are packages using the dice, and methods of making the dice.

摘要翻译： 公开了具有填充有弹性导电材料的背面沟槽的半导体裸片。 沟槽减小了掺入骰子的器件的导通电阻。 弹性导电材料为模具的背面提供导电路径，在半导体芯片上由热循环引起的微小应力。 还公开了使用骰子的包裹以及制造骰子的方法。

公开(公告)号：US20110006409A1

公开(公告)日：2011-01-13

申请号：US12501849

申请日：2009-07-13

申请人： Michael D. Gruenhagen ,  James J. Murphy ,  Suku Kim ,  Jim Pierce ,  William S. Beggs ,  Robert J. Purtell

发明人： Michael D. Gruenhagen ,  James J. Murphy ,  Suku Kim ,  Jim Pierce ,  William S. Beggs ,  Robert J. Purtell

IPC分类号： H01L23/498 ,  H01L23/495

CPC分类号： H01L24/05 ,  H01L23/4827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

摘要： Semiconductor devices containing nickel-titanium (NiTi or TiNi) compounds (or alloys) and methods for making such devices are described. The devices contain a silicon substrate with an integrated circuit having a drain on the backside of the substrate, a TiNi contact layer contacting the drain on the backside of the substrate, a soldering layer on the contact layer, an oxidation reducing layer on the soldering layer, a solder bump on the soldering layer, and a lead frame attached to the solder bump. The combination of the Ti and Ni materials in the contact layer exhibits many features not found in the Ti and Ni materials alone, such as reduced backside on-resistance, ability to form a silicide with the Si substrate at lower temperatures, reduced wafer warpage, increased ductility for improved elasticity, and good adhesion properties. Other embodiments are described.

摘要翻译： 描述了包含镍 - 钛（NiTi或TiNi）化合物（或合金）的半导体器件及其制造方法。 这些器件包含具有集成电路的硅衬底，该集成电路在衬底的背面具有漏极，接触衬底背面的漏极的TiNi接触层，接触层上的焊接层，焊接层上的氧化还原层 焊锡层上的焊料凸块，以及附着在焊锡凸块上的引线框架。 接触层中Ti和Ni材料的组合在Ti和Ni材料中单独出现了许多特征，例如降低的背面导通电阻，在较低温度下与Si衬底形成硅化物的能力，减少的晶片翘曲， 提高延展性以提高弹性，并具有良好的附着性。 描述其他实施例。

公开(公告)号：US20100123225A1

公开(公告)日：2010-05-20

申请号：US12275086

申请日：2008-11-20

申请人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Ihsiu Ho ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Rohit Dikshit

发明人： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Ihsiu Ho ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Rohit Dikshit

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L29/7802 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/482 ,  H01L24/16 ,  H01L24/19 ,  H01L24/31 ,  H01L29/0657 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/73253 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/351 ,  H01L2924/00

摘要： Disclosed are semiconductor die structures that enable a die having a vertical power device to be packaged in a wafer-level chip scale package where the current-conducting terminals are present at one surface of the die, and where the device has very low on-state resistance. In an exemplary embodiment, a trench and an aperture are formed in a backside of a die, with the aperture contacting a conductive region at the top surface of the die. A conductive layer and/or a conductive body may be disposed on the trench and aperture to electrically couple the backside current-conducting electrode of the device to the conductive region. Also disclosed are packages and systems using a die with a die structure according to the invention, and methods of making dice with a die structure according to the invention.

摘要翻译： 公开了半导体管芯结构，其使具有垂直功率器件的管芯封装在晶片级芯片级封装中，其中导电端子存在于管芯的一个表面处，并且器件具有非常低的导通状态 抵抗性。 在示例性实施例中，沟槽和孔形成在管芯的背面，孔与导管的顶表面处的导电区接触。 可以在沟槽和孔上设置导电层和/或导体，以将器件的背面导电电极电耦合到导电区域。 还公开了使用根据本发明的具有模具结构的模具的封装和系统，以及根据本发明的具有模具结构的模具的方法。