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公开(公告)号：US07394637B2
公开(公告)日：2008-07-01
申请号：US11304174
申请日：2005-12-15
IPC分类号： H02H5/04
CPC分类号： G11C17/18
摘要： A sense amplifier for detecting a logic state of a selected electrical fuse cell among a number of unselected electrical fuse cells includes a bias module coupled to a power supply for generating a first current, and a tracking module coupled to the bias module for generating a second current. A current supplier is coupled to the bias module and the tracking module for generating a third current substantially equal to a sum of the first and second currents scaled by a predetermined factor, the third current being diverted into a first sub-current flowing through the selected electrical fuse cell and a second sub-current leaking through the unselected electrical fuse cells. The tracking module is so configured that the second current scaled by the predetermined factor is substantially equal to the second sub-current, thereby avoiding the first sub-current to be reduced by the second sub-current.
摘要翻译： 用于检测多个未选择的电熔丝单元中的所选择的电熔丝单元的逻辑状态的读出放大器包括耦合到电源的用于产生第一电流的偏置模块，以及耦合到偏置模块的跟踪模块，用于产生第二 当前。 当前供应商耦合到偏置模块和跟踪模块，用于产生基本上等于由预定因子缩放的第一和第二电流之和的第三电流，第三电流被转移到流过所选择的第一电流的第一子电流 电熔丝单元和第二子电流通过未选择的电熔丝单元泄漏。 跟踪模块被配置为使得按预定因子缩放的第二电流基本上等于第二子电流，从而避免第一子电流被第二子电流减小。
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公开(公告)号：US20070139843A1
公开(公告)日：2007-06-21
申请号：US11304174
申请日：2005-12-15
IPC分类号： H02H5/04
CPC分类号： G11C17/18
摘要： A sense amplifier for detecting a logic state of a selected electrical fuse cell among a number of unselected electrical fuse cells includes a bias module coupled to a power supply for generating a first current, and a tracking module coupled to the bias module for generating a second current. A current supplier is coupled to the bias module and the tracking module for generating a third current substantially equal to a sum of the first and second currents scaled by a predetermined factor, the third current being diverted into a first sub-current flowing through the selected electrical fuse cell and a second sub-current leaking through the unselected electrical fuse cells. The tracking module is so configured that the second current scaled by the predetermined factor is substantially equal to the second sub-current, thereby avoiding the first sub-current to be reduced by the second sub-current.
摘要翻译： 用于检测多个未选择的电熔丝单元中的所选择的电熔丝单元的逻辑状态的读出放大器包括耦合到电源的用于产生第一电流的偏置模块，以及耦合到偏置模块的跟踪模块，用于产生第二 当前。 当前供应商耦合到偏置模块和跟踪模块，用于产生基本上等于由预定因子缩放的第一和第二电流之和的第三电流，第三电流被转移到流过所选择的第一电流的第一子电流 电熔丝单元和第二子电流通过未选择的电熔丝单元泄漏。 跟踪模块被配置为使得按预定因子缩放的第二电流基本上等于第二子电流，从而避免第一子电流被第二子电流减小。
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公开(公告)号：US20080169514A1
公开(公告)日：2008-07-17
申请号：US11652895
申请日：2007-01-11
申请人： Fu-Lung Hsueh , Sung-Chieh Lin
发明人： Fu-Lung Hsueh , Sung-Chieh Lin
CPC分类号： H01L23/5228 , H01L2924/0002 , H01L2924/00
摘要： A resistor structure for an integrated circuit includes a first set of contacts connected between a semiconductor layer and a first conductive layer; and a second set of plugs connected between the first conductive layer and a second conductive layer, wherein the first set of contacts and the second set of plugs are coupled together as a first resistor segment to provide a predetermined resistance for the integrated circuit.
摘要翻译： 用于集成电路的电阻器结构包括连接在半导体层和第一导电层之间的第一组触点; 以及连接在所述第一导电层和第二导电层之间的第二组插头，其中所述第一组触点和所述第二组插头作为第一电阻器段耦合在一起以为所述集成电路提供预定电阻。
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公开(公告)号：US07919832B2
公开(公告)日：2011-04-05
申请号：US11652895
申请日：2007-01-11
申请人： Fu-Lung Hsueh , Sung-Chieh Lin
发明人： Fu-Lung Hsueh , Sung-Chieh Lin
IPC分类号： H01L29/06
CPC分类号： H01L23/5228 , H01L2924/0002 , H01L2924/00
摘要： A resistor structure for an integrated circuit includes a first set of contacts connected between a semiconductor layer and a first conductive layer; and a second set of plugs connected between the first conductive layer and a second conductive layer, wherein the first set of contacts and the second set of plugs are coupled together as a first resistor segment to provide a predetermined resistance for the integrated circuit.
摘要翻译： 用于集成电路的电阻器结构包括连接在半导体层和第一导电层之间的第一组触点; 以及连接在所述第一导电层和第二导电层之间的第二组插头，其中所述第一组触点和所述第二组插头作为第一电阻器段耦合在一起以为所述集成电路提供预定电阻。
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公开(公告)号：US08762897B2
公开(公告)日：2014-06-24
申请号：US13475853
申请日：2012-05-18
申请人： Chih-Hsien Chang , Yung-Chow Peng , Fu-Lung Hsueh
发明人： Chih-Hsien Chang , Yung-Chow Peng , Fu-Lung Hsueh
CPC分类号： G06F17/5081 , G03F1/00 , G06F17/5009 , G06F17/5045 , G06F17/5068 , G06F19/00 , G06F2217/12 , G21K5/00
摘要： A circuit design system includes a schematic design tool configured to generate schematic information and pre-coloring information for a circuit. The circuit design system also includes a netlist file configured to store the schematic information and the pre-coloring information on a non-transitory computer readable medium and an extraction tool configured to extract the pre-coloring information from the netlist file. A layout design tool, included in the circuit design system, is configured to design at least one mask based on the schematic information and the pre-coloring information. The circuit design system further includes a layout versus schematic comparison tool configured to compare the at least one mask to the schematic information and the pre-coloring information.
摘要翻译： 电路设计系统包括被配置为产生电路的示意图信息和预着色信息的示意性设计工具。 电路设计系统还包括被配置为在非暂时计算机可读介质上存储原理图信息和预着色信息的网表文件，以及被配置为从网表文件中提取预着色信息的提取工具。 包括在电路设计系统中的布局设计工具被配置为基于原理图信息和预着色信息设计至少一个掩模。 电路设计系统还包括布局与示意性比较工具，其被配置为将至少一个掩模与示意图信息和预着色信息进行比较。
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公开(公告)号：US08698566B2
公开(公告)日：2014-04-15
申请号：US13252498
申请日：2011-10-04
申请人： Chan-Hong Chern , Ming-Chieh Huang , Tao Wen Chung , Chih-Chang Lin , Fu-Lung Hsueh , Yuwen Swei
发明人： Chan-Hong Chern , Ming-Chieh Huang , Tao Wen Chung , Chih-Chang Lin , Fu-Lung Hsueh , Yuwen Swei
CPC分类号： H03L7/102 , H03L7/099 , H03L2207/06
摘要： An inductor-capacitor phase locked loop (LCPLL) includes an inductor-capacitor voltage controlled oscillator (LCVCO) that provides an output frequency. A calibration circuit includes two comparators and provides a coarse tune signal to the LCVCO. The two comparators respectively compare the loop filter signal with a first reference voltage and a second reference voltage that is higher than the first reference voltage to supply a first and second comparator output, respectively. The calibration circuit is capable of adjusting the coarse tune signal continuously in voltage values and adjusts the coarse tune signal based on the two comparator outputs. A loop filter provides a loop filter signal to the calibration circuit and a fine tune signal to the LCVCO. A coarse tune frequency range is greater than a fine tune frequency range.
摘要翻译： 电感 - 电容器锁相环（LCPLL）包括提供输出频率的电感 - 电容压控振荡器（LCVCO）。 校准电路包括两个比较器，并向LCVCO提供粗调信号。 两个比较器分别将环路滤波器信号与第一参考电压和高于第一参考电压的第二参考电压进行比较，以分别提供第一和第二比较器输出。 校准电路能够在电压值中连续调整粗调信号，并根据两个比较器输出调整粗调信号。 环路滤波器向校准电路提供环路滤波器信号，并向LCVCO提供微调信号。 粗调频率范围大于微调频率范围。
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公开(公告)号：US08432204B1
公开(公告)日：2013-04-30
申请号：US13344637
申请日：2012-01-06
申请人： Chan-Hong Chern , Ming-Chieh Huang , Tao Wen Chung , Chih-Chang Lin , Yuwen Swei , Fu-Lung Hsueh
发明人： Chan-Hong Chern , Ming-Chieh Huang , Tao Wen Chung , Chih-Chang Lin , Yuwen Swei , Fu-Lung Hsueh
IPC分类号： H03L7/06
摘要： A PLL circuit includes a phase frequency detector; a programmable charge pump coupled to an output of the phase frequency detector; a loop filter coupled to an output of the charge pump, the loop filter providing a fine tuning voltage; a first voltage-to-current converter, the first voltage-to-current converter providing a fine tuning current corresponding to the fine tuning voltage; a current-controlled oscillator (CCO); a feedback divider coupled to an output of the CCO and an input of the phase frequency detector; and an analog calibration circuit. The analog calibration circuit provides a coarse adjustment current for coarse adjustments to a frequency pivot point for an oscillator frequency of the CCO, wherein the CCO generates a frequency signal at an output responsive to a summed coarse adjustment and fine tuning current, wherein the frequency pivot point is continuously adjustable.
摘要翻译： PLL电路包括相位检波器; 耦合到所述相位频率检测器的输出的可编程电荷泵; 耦合到电荷泵的输出的环路滤波器，所述环路滤波器提供微调电压; 第一电压 - 电流转换器，第一电压 - 电流转换器提供对应于微调电压的微调电流; 电流控制振荡器（CCO）; 耦合到CCO的输出的反馈分压器和相位频率检测器的输入端; 和模拟校准电路。 模拟校准电路提供用于对CCO的振荡器频率的频率枢转点进行粗调整的粗调电流，其中CCO响应于总和的粗调和微调电流而在输出端产生频率信号，其中频率枢轴 点连续可调。
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公开(公告)号：US08427240B2
公开(公告)日：2013-04-23
申请号：US12968342
申请日：2010-12-15
申请人： Hsieh-Hung Hsieh , Po-Yi Wu , Ho-Hsiang Chen , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Hsieh-Hung Hsieh , Po-Yi Wu , Ho-Hsiang Chen , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H03F3/04
CPC分类号： H03G1/0029 , H03F1/223 , H03F3/195 , H03F2200/249 , H03F2200/318 , H03F2200/408 , H03F2200/411 , H03F2200/451 , H03F2200/492
摘要： A low-noise amplifier (“LNA”) includes a first cascode gain stage including a first complementary metal oxide semiconductor (“CMOS”) transistor configured to receive a radio frequency (“RF”) input signal and a second CMOS transistor coupled to an output node. The first inductive gate network is coupled to a gate of the second CMOS transistor for increasing a gain of the first cascode gain stage. The first inductive gate network has a non-zero inductive input impedance and includes at least one passive circuit element.
摘要翻译： 低噪声放大器（“LNA”）包括第一共源共栅增益级，其包括被配置为接收射频（“RF”）输入信号的第一互补金属氧化物半导体（“CMOS”）晶体管和耦合到 输出节点。 第一感应栅极网络耦合到第二CMOS晶体管的栅极，用于增加第一共源共栅增益级的增益。 第一感应栅极网络具有非零电感输入阻抗并且包括至少一个无源电路元件。
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公开(公告)号：US20120286888A1
公开(公告)日：2012-11-15
申请号：US13103592
申请日：2011-05-09
申请人： Hsieh-Hung Hsieh , Ming Hsien Tsai , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Hsieh-Hung Hsieh , Ming Hsien Tsai , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
CPC分类号： H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1265 , H03B2201/0266
摘要： A system comprises a voltage controlled oscillator comprising an inductor and a variable capacitor and a switched capacitor array connected in parallel with the variable capacitor. The switched capacitor array further comprises a plurality of capacitor banks wherein a thermometer code is employed to control each capacitor bank. In addition, the switched capacitor array provides N tuning steps for the oscillation frequency of the voltage controlled oscillator when the switched capacitor array is controlled by an n-bit thermometer code.
摘要翻译： 一种系统包括压控振荡器，其包括电感器和可变电容器以及与可变电容器并联连接的开关电容器阵列。 开关电容器阵列还包括多个电容器组，其中使用温度计代码来控制每个电容器组。 此外，当开关电容器阵列由n位温度计代码控制时，开关电容器阵列为压控振荡器的振荡频率提供N个调谐步骤。
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公开(公告)号：US08258879B2
公开(公告)日：2012-09-04
申请号：US12907294
申请日：2010-10-19
申请人： Ying-Ta Lu , Ho-Hsiang Chen , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Ying-Ta Lu , Ho-Hsiang Chen , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H03L7/00
CPC分类号： H03B27/00 , H03B5/1215 , H03B5/1228
摘要： A quadrature oscillator includes a first oscillator having a first second-order harmonic node, a second oscillator having a second second-order harmonic node, and at least one capacitor coupling the first second-order harmonic node and the second second-order harmonic node. The first oscillator is configured to supply an in-phase signal and the second oscillator is configured to supply a quadrature signal.
摘要翻译： 正交振荡器包括具有第一二次谐波节点的第一振荡器，具有第二二次谐波节点的第二振荡器和耦合第一二次谐波节点和第二二次谐波节点的至少一个电容器。 第一振荡器被配置为提供同相信号，并且第二振荡器被配置为提供正交信号。
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