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公开(公告)号:US20200302984A1
公开(公告)日:2020-09-24
申请号:US16557802
申请日:2019-08-30
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Tadashi KAI , Masahiko NAKAYAMA , Jyunichi OZEKI , Shogo ITAI
Abstract: According to one embodiment, a magnetic device includes a stacked body including a first magnetic layer, a second magnetic layer, and a non-magnetic layer between the first magnetic layer and the second magnetic layer. The stacked body has a quadrangular planar shape, the stacked body has a first side dimension in a first direction parallel to a surface of a substrate and a thickness in a second direction perpendicular to the surface of the substrate, and a ratio of the first side dimension to the thickness is in a range of 0.10 to 4.0.
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公开(公告)号:US20200075671A1
公开(公告)日:2020-03-05
申请号:US16678316
申请日:2019-11-08
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Jyunichi OZEKI , Masahiko NAKAYAMA , Hiroaki YODA , Eiji KITAGAWA , Takao OCHIAI , Minoru AMANO , Kenji NOMA
Abstract: According to one embodiment, a magnetic memory device includes a first magnetic layer having a variable magnetization direction, and including a first main surface and a second main surface located opposite to the first main surface, a second magnetic layer provided on a first main surface side of the first magnetic layer, and having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, wherein a saturation magnetization of a part of the first magnetic layer which is located close to the first main surface is higher than a saturation magnetization of a part of the first magnetic layer which is located close to the second main surface.
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公开(公告)号:US20190259438A1
公开(公告)日:2019-08-22
申请号:US16400048
申请日:2019-05-01
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Tatsuya KISHI , Tsuneo INABA , Daisuke WATANABE , Masahiko NAKAYAMA , Nobuyuki OGATA , Masaru TOKO , Hisanori AIKAWA , Jyunichi OZEKI , Toshihiko NAGASE , Young Min EEH , Kazuya SAWADA
Abstract: A memory device includes a magnetoresistive element including first and second magnetic layers and a non-magnetic layer provided between the first and second magnetic layers. The memory device also includes a write circuit which controls a first writing setting magnetization of the first and second magnetic layers in a parallel state and a second writing setting the magnetization of the first and second magnetic layers in an antiparallel state, and applies a write current to the magnetoresistive element. A first write current in the first writing includes a first pulse and a second pulse added to the first pulse. A width of the second pulse is smaller than a width of the first pulse, and a scurrent level of the second pulse is different from a current level of the first pulse.
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公开(公告)号:US20180114897A1
公开(公告)日:2018-04-26
申请号:US15850599
申请日:2017-12-21
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Jyunichi OZEKI , Hiroyuki OHTORI , Kuniaki SUGIURA , Yutaka HASHIMOTO , Katsuya NISHIYAMA
CPC classification number: H01L43/02 , H01L27/228 , H01L43/08 , H01L43/10 , H01L43/12
Abstract: A magnetic memory device including a first magnetic layer selectively exhibiting a first state in which the first magnetic layer has a first magnetization direction perpendicular to a main surface thereof and a second state in which the first magnetic layer has a second magnetization direction opposite to the first magnetization direction; a second magnetic layer having a fixed magnetization direction which is perpendicular to a main surface thereof and which corresponds to the first magnetization direction, and having a top surface including a recess portion or a bottom surface including a recess portion; a third magnetic layer provided between the first magnetic layer and the second magnetic layer, and having a fixed magnetization direction which is perpendicular to a main surface thereof and which corresponds to the second magnetization direction; and a nonmagnetic layer provided between the first magnetic layer and the third magnetic layer.
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公开(公告)号:US20180075895A1
公开(公告)日:2018-03-15
申请号:US15456031
申请日:2017-03-10
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Tatsuya KISHI , Tsuneo INABA , Daisuke WATANABE , Masahiko NAKAYAMA , Nobuyuki OGATA , Masaru TOKO , Hisanori AIKAWA , Jyunichi OZEKI , Toshihiko NAGASE , Young Min EEH , Kazuya SAWADA
IPC: G11C11/16
CPC classification number: G11C11/1675 , G11C7/1096 , G11C11/1655 , G11C11/1657 , G11C11/1673
Abstract: According to one embodiment, a memory device includes: a magnetoresistive element including first and second magnetic layers and a non-magnetic layer provided between the first and second magnetic layers; and a write circuit which controls a first writing setting magnetization of the first and second magnetic layers in a parallel state and a second writing setting the magnetization of the first and second magnetic layers in an antiparallel state, and applies a current pulse to the magnetoresistive element. A first pulse pattern used in the first writing is different from a second pulse pattern used in the second writing.
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