公开(公告)号：US5925574A

公开(公告)日：1999-07-20

申请号：US865646

申请日：1992-04-10

申请人： Kenji Aoki ,  Tadao Akamine ,  Yoshikazu Kojima

发明人： Kenji Aoki ,  Tadao Akamine ,  Yoshikazu Kojima

IPC分类号： H01L21/225 ,  H01L21/331 ,  H01L21/265

CPC分类号： H01L29/66287 ,  H01L21/2254 ,  Y10S148/017 ,  Y10S148/034 ,  Y10S148/144

摘要： A method of producing a bipolar transistor composed of collector, base and emitter regions disposed sequentially on a semiconductor substrate. According to the method, a semiconductor layer is deposited on the collector region, the semiconductor layer is cleaned to expose an active surface, an impurity source gas is applied to the exposed active surface while heating the substrate to form an impurity adsorption layer, the impurity is diffused into the semiconductor layer to form the base region, another semiconductor layer is deposited on the base region, this semiconductor layer is cleaned to expose an active surface, another impurity source gas is applied to the exposed active surface while heating the substrate to form another impurity adsorption layer, and impurity is diffused into the semiconductor layer to from the impurity adsorption layer to form the emitter region.

摘要翻译： 一种制造由依次设置在半导体衬底上的集电极，基极和发射极组成的双极晶体管的方法。 根据该方法，在集电极区域上淀积半导体层，对半导体层进行清洗以露出活性表面，在对基板进行加热而形成杂质吸附层的同时，向露出的活性表面施加杂质源气体，杂质吸附层 扩散到半导体层中以形成基极区域，另一半导体层沉积在基极区上，该半导体层被清洁以暴露活性表面，另一杂质源气体被加到暴露的有源表面上，同时加热衬底形成 另一杂质吸附层，杂质从杂质吸附层扩散到半导体层中，形成发射极区域。

公开(公告)号：US5124272A

公开(公告)日：1992-06-23

申请号：US565960

申请日：1990-08-13

申请人： Naoto Saito ,  Kenji Aoki ,  Tadao Akamine ,  Yoshikazu Kojima ,  Kunihiro Takahashi ,  Masahiko Kinbara

发明人： Naoto Saito ,  Kenji Aoki ,  Tadao Akamine ,  Yoshikazu Kojima ,  Kunihiro Takahashi ,  Masahiko Kinbara

IPC分类号： H01L21/225 ,  H01L21/336

CPC分类号： H01L29/66575 ,  H01L21/2254 ,  H01L29/66628 ,  H01L29/66636

摘要： An impurity adsorption layer is selectively formed from a gas containing an impurity on a semiconductor surface. Solid-phase diffusion of the impurity is effected from the impurity adsorption layer into the semiconductor surface to form a source region and a drain region having a sufficiently small resistivity and an ultrashallow PN junction depth, thereby producing a metal-insulator semiconductor field-effect-transistor featuring fast operating speed and reduced dimensions.

公开(公告)号：US5753530A

公开(公告)日：1998-05-19

申请号：US449655

申请日：1995-05-24

申请人： Tadao Akamine ,  Naoto Saito ,  Kenji Aoki ,  Yoshikazu Kojima

发明人： Tadao Akamine ,  Naoto Saito ,  Kenji Aoki ,  Yoshikazu Kojima

IPC分类号： H01L21/225 ,  H01L21/285 ,  H01L21/306 ,  H01L21/331 ,  H01L21/336 ,  H01L21/385

CPC分类号： H01L21/02046 ,  H01L21/2257 ,  H01L21/28512 ,  H01L29/66272 ,  H01L29/66545 ,  H01L29/66575 ,  Y10S438/906

摘要： A solid phase diffusion process using boron silicide film as diffusion source to improve controllability of diffusion of boron impurity into a silicon substrate in order to achieve a shallow junction. The process includes: cleaning the surface of a Si substrate by removing the native oxide film thereof to expose an active surface; treating the active surface to form thereon a boron silicide film as an impurity source; and introducing boron impurity from the boron silicide film into the Si substrate to form a boron diffusion layer. In this manner, a boron diffusion layer having a high surface concentration and a shallow junction can be formed because the boron silicide film is formed directly on the surface of the Si substrate. Because the boron silicide film is chemically and physically stable, an improved diffusion controllability is obtained. The diffusion controllability is further improved by accurately evaluating the impurity film optically during the fabrication process. A structure composed of a boron diffusion layer and a boron silicide region provides a high speed, highly integrated, and highly reliable semiconductor device, particularly when the boron silicide region is disposed between an impurity region and an electrode metal.

摘要翻译： 使用硅化硅膜作为扩散源的固相扩散工艺，以提高硼杂质扩散到硅衬底中的可控性，以便实现浅结。 该方法包括：通过去除其自然氧化膜以暴露活性表面来清洁Si衬底的表面; 处理活性表面以形成作为杂质源的硼化硅膜; 并将硼杂质从硅化硅膜引入Si衬底中以形成硼扩散层。 以这种方式，可以形成具有高表面浓度和浅结的硼扩散层，因为硅化硅膜直接形成在Si衬底的表面上。 因为硼化硅膜在化学和物理上是稳定的，所以获得改进的扩散控制性。 通过在制造过程中光学地精确评估杂质膜，进一步提高了扩散控制性。 由硼扩散层和硼硅化物区组成的结构提供高速，高度集成且高度可靠的半导体器件，特别是当硅化硼区域设置在杂质区域和电极金属之间时。

公开(公告)号：US5514620A

公开(公告)日：1996-05-07

申请号：US210769

申请日：1994-03-21

申请人： Kenji Aoki ,  Tadao Akamine ,  Naoto Saito

发明人： Kenji Aoki ,  Tadao Akamine ,  Naoto Saito

IPC分类号： H01L21/225 ,  H01L21/329 ,  H01L21/822 ,  H01L27/04 ,  H01L29/861 ,  H01L29/866 ,  H01L29/88 ,  H01L29/93 ,  H01L31/0248 ,  H01L31/103 ,  H01L31/18

CPC分类号： H01L29/66151 ,  H01L21/2254 ,  H01L29/66136 ,  H01L29/66174 ,  H01L31/103 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S438/906 ,  Y10S438/914

摘要： A PN junction device is formed by removing an inert film from a surface of an N type semiconductor layer to expose an active face, then applying a source gas containing an P type impurity component to the active face to form an impurity adsorption film, and thereafter carrying out a solid-phase diffusion of the impurity is carried out from a diffusion source composed of the P type impurity adsorption film into the N type semiconductor layer to form therein a P type semiconductor layer to thereby provide a PN junction. Lastly, a pair of electrodes are connected to the respective semiconductor layers to form the an PN junction device.

摘要翻译： 通过从N型半导体层的表面去除惰性膜以暴露活性面，然后将含有P型杂质成分的源气体施加到活性面上形成杂质吸附膜，形成PN结器件，之后 从由P型杂质吸附膜构成的扩散源向N型半导体层中进行杂质的固相扩散，形成P型半导体层，由此提供PN结。 最后，一对电极连接到各个半导体层以形成PN结器件。

公开(公告)号：US5532185A

公开(公告)日：1996-07-02

申请号：US858173

申请日：1992-03-27

申请人： Tadao Akamine ,  Naoto Saito ,  Kenji Aoki

发明人： Tadao Akamine ,  Naoto Saito ,  Kenji Aoki

IPC分类号： H01L21/22 ,  H01L21/225 ,  H01L21/385

CPC分类号： H01L21/2254 ,  H01L21/2225

摘要： The surface of a silicon wafer is cleaned to expose chemically active surface. Diborane gas is fed to the exposed active surface for adsorbing boron to the active surface. The adsorbed boron on the silicon wafer works as an impurity diffusion source. Boron is diffused from the impurity diffusion source into the silicon wafer to make an impurity diffusion layer by heat treatment. The amount of diborane gas fed to the active surface is set in an amount at which the sheet resistance of the impurity diffusion layer does not depend on variations in feed amount.

摘要翻译： 清洁硅晶片的表面以暴露化学活性表面。 将二烷烃气体供给到暴露的活性表面，以将硼吸附到活性表面。 硅晶片上吸附的硼作为杂质扩散源。 硼从杂质扩散源扩散到硅晶片中，通过热处理形成杂质扩散层。 供给到活性表面的乙硼烷气体的量设定为杂质扩散层的薄层电阻不依赖于进料量的变化。

公开(公告)号：US5874352A

公开(公告)日：1999-02-23

申请号：US544454

申请日：1995-10-18

申请人： Tadao Akamine ,  Kenji Aoki

发明人： Tadao Akamine ,  Kenji Aoki

IPC分类号： H01L21/225 ,  H01L21/3215 ,  H01L21/336 ,  H01L29/78 ,  H01L21/223

CPC分类号： H01L29/66575 ,  H01L21/2254 ,  H01L21/32155 ,  H01L29/78

摘要： A method of producing an MIS transistor by preparing a substrate formed with a gate electrode and a semiconductor layer which defines a source region and a drain region, removing a natural oxide film from a surface of the gate electrode and from a surface of the semiconductor layer to expose an active surface, delivering a source gas containing an impurity component to the exposed active surface to deposit thereon an impurity adsorption film, and annealing the substrate to diffuse the impurity component from the impurity adsorption film into the gate electrode and concurrently into the semiconductor layer to form the source and drain regions. The gate electrode has the same conductivity type as the source and drain regions.

摘要翻译： 一种制造MIS晶体管的方法，该方法通过制备形成有栅电极的基板和限定源区和漏区的半导体层，从栅电极的表面和半导体层的表面去除自然氧化膜 暴露活性表面，将含有杂质组分的源气体输送到暴露的活性表面上以沉积杂质吸附膜，并使衬底退火以将杂质成分从杂质吸附膜扩散到栅电极中并同时进入半导体 层以形成源区和漏区。 栅电极具有与源区和漏区相同的导电类型。

公开(公告)号：US5338697A

公开(公告)日：1994-08-16

申请号：US620615

申请日：1990-12-03

申请人： Kenji Aoki ,  Tadao Akamine ,  Naoto Saito

发明人： Kenji Aoki ,  Tadao Akamine ,  Naoto Saito

IPC分类号： H01L21/225 ,  H01L21/336 ,  H01L21/762 ,  H01L29/06 ,  H01L29/10 ,  H01L21/76

CPC分类号： H01L29/66651 ,  H01L21/2254 ,  H01L21/762 ,  H01L29/0653 ,  H01L29/1083 ,  Y10S148/037

摘要： An exposed active surface is prepared on a major surface of a semiconductor substrate. A source gas containing an impurity component is applied to the exposed active surface to adsorb thereon a film of the impurity component so as to form a barrier region along the major surface of the semiconductor substrate. A semiconductor device is formed on the major surface of the semiconductor substrate and is protected by the barrier region.

摘要翻译： 在半导体衬底的主表面上制备曝光的活性表面。 将含有杂质成分的源气体施加到暴露的活性表面上以在其上吸附杂质成分的膜，以沿着半导体基板的主表面形成阻挡区域。 半导体器件形成在半导体衬底的主表面上并被阻挡区保护。

公开(公告)号：US06469405B1

公开(公告)日：2002-10-22

申请号：US09493773

申请日：2000-01-28

申请人： Yasuhiro Moya ,  Tatsuya Kitta ,  Yoshihide Kanakubo ,  Tadao Akamine

发明人： Yasuhiro Moya ,  Tatsuya Kitta ,  Yoshihide Kanakubo ,  Tadao Akamine

IPC分类号： H01H3500

CPC分类号： G09G3/3283 ,  G09G3/3216 ,  G09G5/02 ,  G09G2300/06 ,  G09G2310/0297 ,  G09G2320/041 ,  G09G2330/028 ,  H04N5/70 ,  H04N9/30 ,  H05B33/0896 ,  Y10T307/858

摘要： A constant-current FET functions as a constant current element by application of a constant voltage to the gate thereof. A first switch FET is disposed between the constant-current FET and a power supply without another switching element being disposed between the constant current FET and an output terminal. A second switch FET that performs an on/off operation in association with an on/off operation performed by the first switch FET is connected between the output terminal and ground.

摘要翻译： 恒流FET通过向其栅极施加恒定电压而用作恒流元件。 第一开关FET设置在恒流FET和电源之间，而没有另外的开关元件设置在恒流FET和输出端之间。 与第一开关FET执行的接通/断开操作相关联地执行导通/截止操作的第二开关FET连接在输出端子和地之间。

公开(公告)号：US5719414A

公开(公告)日：1998-02-17

申请号：US213952

申请日：1994-03-16

申请人： Keiji Sato ,  Yutaka Saito ,  Tadao Akamine ,  Junko Yamanaka

发明人： Keiji Sato ,  Yutaka Saito ,  Tadao Akamine ,  Junko Yamanaka

IPC分类号： H01L31/10 ,  H01L31/105 ,  H01L31/107 ,  H01L31/18

CPC分类号： H01L31/105 ,  H01L31/107 ,  H01L31/1804 ,  Y02E10/547

摘要： A photoelectric conversion semiconductor device is characterized in that a second conductivity type impurity region is formed in a first conductivity type semiconductor substrate, the second conductivity type impurity region having a depth of 0.1 .mu.m or less and a peak density of 1.times.10.sup.19 atoms/cm.sup.3 or more. A method of manufacturing a photoelectric conversion semiconductor device is characterized by a step of ion-injecting boron or boron fluoride with a dose amount of 1.times.10.sup.16 to 5.times.10.sup.16 atoms/cm.sup.2 into a semiconductor substrate as an impurity.

摘要翻译： 光电转换半导体器件的特征在于，在第一导电型半导体衬底中形成第二导电类型杂质区，第二导电类型杂质区的深度为0.1μm或更小，峰密度为1×1019原子/ cm3或 更多。 制造光电转换半导体器件的方法的特征在于将作为杂质的半导体衬底中的剂量为1×10 16至5×10 16原子/ cm 2的硼或氟化硼离子注入的步骤。

公开(公告)号：US07868907B2

公开(公告)日：2011-01-11

申请号：US12011383

申请日：2008-01-24

申请人： Tadao Akamine ,  Toshihiko Omi

发明人： Tadao Akamine ,  Toshihiko Omi

IPC分类号： B41J2/32

CPC分类号： B41J2/35

摘要： A thermal head driving IC for supplying voltage to a plurality of heating resistors each controlled by a driving MOS transistor includes a switch for making and breaking electrically between a substrate and a source of the plurality of driving MOS transistors. In a case where the plurality of heating resistors are activated, the plurality of driving MOS transistors are turned on and the switch is turned off, whereby the substrate potential is floated. As a result, the substrate potential is forward-biased against the source by a substrate current generated in a high-electric-field depletion region near the drain, and a parasitic bipolar transistor turns on, whereby both the plurality of driving MOS transistors and the parasitic bipolar transistor turn on. In a case where the plurality of heating resistors are not activated, a signal for turning off the plurality of driving NMOS transistors is given, and the switch is turned on.

摘要翻译： 用于向由驱动MOS晶体管控制的多个加热电阻器提供电压的热敏头驱动IC包括用于在衬底和多个驱动MOS晶体管的源极之间电气断开的开关。 在多个加热电阻器被激活的情况下，多个驱动MOS晶体管导通，开关断开，从而基板电位浮起。 结果，衬底电位通过在漏极附近的高电场耗尽区中产生的衬底电流而相对于源极被偏置，并且寄生双极晶体管导通，由此多个驱动MOS晶体管和 寄生双极晶体管导通。 在多个加热电阻器未被激活的情况下，给出用于关闭多个驱动NMOS晶体管的信号，并且开关导通。