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    Semiconductor device and method
    1.
    发明授权
    Semiconductor device and method 有权

    公开(公告)号：US10770359B2

    公开(公告)日：2020-09-08

    申请号：US16390681

    申请日：2019-04-22

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Yi-Jing Lee ,  Tsung-Hsi Yang ,  Ming-Hua Yu

    IPC分类号： H01L21/8238 ,  H01L27/092 ,  H01L29/66

    摘要： An embodiment is a device including a first fin extending from a substrate, a first gate stack over and along sidewalls of the first fin, a first gate spacer disposed along a sidewall of the first gate stack, and a first epitaxial source/drain region in the first fin and adjacent the first gate spacer. The first epitaxial source/drain region including a first epitaxial layer on the first fin, the first epitaxial layer including silicon and carbon, a second epitaxial layer on the first epitaxial layer, the second epitaxial layer having a different material composition than the first epitaxial layer, the first epitaxial layer separating the second epitaxial layer from the first fin, and a third epitaxial layer on the second epitaxial layer, the third epitaxial layer having a different material composition than the first epitaxial layer.

    Increasing Source/Drain Dopant Concentration to Reduced Resistance
    3.
    发明申请
    Increasing Source/Drain Dopant Concentration to Reduced Resistance 审中-公开

    公开(公告)号：US20200006532A1

    公开(公告)日：2020-01-02

    申请号：US16562696

    申请日：2019-09-06

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Yi-Jing Lee ,  Ming-Hua Yu

    IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L29/36 ,  H01L29/08 ,  H01L29/06 ,  H01L29/78 ,  H01L29/167

    摘要： A method includes recessing a semiconductor fin to form a recess, wherein the semiconductor fin protrudes higher than isolation regions on opposite sides of the semiconductor fin, and performing a first epitaxy to grow a first epitaxy layer extending into the recess. The first epitaxy is performed using a first process gas comprising a silicon-containing gas, silane, and a phosphorous-containing gas. The first epitaxy layer has a first phosphorous atomic percentage. The method further includes performing a second epitaxy to grow a second epitaxy layer extending into the recess and over the first epitaxy layer. The second epitaxy is performed using a second process gas comprising the silicon-containing gas, silane, and the phosphorous-containing gas. The second epitaxy layer has a second phosphorous atomic percentage higher than the first phosphorous atomic percentage.

    Semiconductor structure and the manufacturing method thereof
    7.
    发明授权
    Semiconductor structure and the manufacturing method thereof 有权
    半导体结构及其制造方法

    公开(公告)号：US09553012B2

    公开(公告)日：2017-01-24

    申请号：US14026067

    申请日：2013-09-13

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

    发明人： Yi-Jing Lee ,  Cheng-Hsien Wu ,  Chih-Hsin Ko ,  Clement Hsingjen Wann

    IPC分类号： H01L29/78 ,  H01L21/762 ,  H01L29/16 ,  H01L29/66

    CPC分类号： H01L29/7849 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02263 ,  H01L21/02274 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/7624 ,  H01L21/76283 ,  H01L29/0649 ,  H01L29/16 ,  H01L29/66795 ,  H01L29/785

    摘要： The present disclosure provides a FinFET. The FinFET includes a silicon-on-insulator (SOI) with an insulator; a plurality of fin structures on the insulator; an isolation on the insulator, and between two adjacent fin structures in the plurality of fin structures; and an oxide layer between each of the plurality of fin structures and the insulator, wherein the insulator comprises silicon germanium oxide. A method for manufacturing the FinFET includes forming a plurality of fin structures on a layer having a larger lattice constant than that of the fin structure by a patterning operation; oxidizing the fin structure and the layer to transform the layer into a first oxide layer; filling insulating material between adjacent fin structures; and etching the insulating material to expose a top surface and at least a portion of a sidewall of the fin structure.

    摘要翻译： 本公开提供了FinFET。 FinFET包括具有绝缘体的绝缘体上硅（SOI）; 绝缘体上的多个翅片结构; 绝缘体上的隔离，以及多个翅片结构中的两个相邻翅片结构之间的隔离; 以及在所述多个翅片结构和所述绝缘体中的每一个之间的氧化物层，其中所述绝缘体包括硅氧化锗。 制造FinFET的方法包括通过图案化操作在具有比翅片结构更大的晶格常数的层上形成多个翅片结构; 氧化鳍结构和层以将层转变成第一氧化物层; 在相邻翅片结构之间填充绝缘材料; 并蚀刻绝缘材料以暴露翅片结构的顶表面和侧壁的至少一部分。

    FinFET devices with unique fin shape and the fabrication thereof
    8.
    发明授权
    FinFET devices with unique fin shape and the fabrication thereof 有权
    FinFET器件具有独特的翅片形状及其制造

    公开(公告)号：US09548303B2

    公开(公告)日：2017-01-17

    申请号：US14207848

    申请日：2014-03-13

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Yi-Jing Lee ,  Cheng-Hsien Wu ,  Chih-Hsin Ko ,  Clement Hsingjen Wann

    IPC分类号： H01L27/12 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/84

    CPC分类号： H01L21/823878 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0922 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/1054 ,  H01L29/7854

    摘要： A semiconductor device includes a PMOS FinFET and an NMOS FinFET. The PMOS FinFET includes a substrate, a silicon germanium layer disposed over the substrate, a silicon layer disposed over the silicon germanium layer, and a PMOS fin disposed over the silicon layer. The PMOS fin contains silicon germanium. The NMOS FinFET includes the substrate, a silicon germanium oxide layer disposed over the substrate, a silicon oxide layer disposed over the silicon germanium oxide layer, and an NMOS fin disposed over the silicon oxide layer. The NMOS fin contains silicon. The silicon germanium oxide layer and the silicon oxide layer collectively define a concave recess in a horizontal direction. The concave recess is partially disposed below the NMOS fin.

    摘要翻译： 半导体器件包括PMOS FinFET和NMOS FinFET。 PMOS FinFET包括衬底，设置在衬底上的硅锗层，设置在硅锗层上的硅层和设置在硅层上的PMOS鳍。 PMOS鳍包含硅锗。 NMOS FinFET包括衬底，设置在衬底上的硅锗氧化物层，设置在硅锗氧化物层上的氧化硅层和设置在氧化硅层上的NMOS鳍。 NMOS鳍包含硅。 硅氧化硅层和氧化硅层共同地在水平方向上限定凹形凹部。 凹槽部分地设置在NMOS鳍片下方。