公开(公告)号：US20080142571A1

公开(公告)日：2008-06-19

申请号：US11949849

申请日：2007-12-04

申请人： Takehide Yokozuka ,  Ukyo Ikeda ,  Masahide Harada ,  Hideto Yoshinari

发明人： Takehide Yokozuka ,  Ukyo Ikeda ,  Masahide Harada ,  Hideto Yoshinari

IPC分类号： B23K1/06

CPC分类号： H05K1/144 ,  H01L2924/0002 ,  H05K1/056 ,  H05K3/328 ,  H05K3/3447 ,  H05K3/368 ,  H05K3/4015 ,  H05K2201/042 ,  H05K2201/0979 ,  H05K2201/1028 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10856 ,  H05K2201/10924 ,  H05K2203/0285 ,  H01L2924/00

摘要： Since an electronic device of the present invention has a pair of joint pieces thereof formed (extended) on both sides with respect to one end of the body thereof, the pair of joint pieces both connected to one of the substrates improves the joining strength between the lead frame connector and the one of substrates and ensures the reliability of electrical connection between the lead frame connector and the one of the substrates.

摘要翻译： 由于本发明的电子设备具有相对于其本体的一端在两侧形成（延伸）的一对连接件，所以与一个基板连接的一对连接件提高了两者之间的接合强度 引线框架连接器和基板之一，并且确保引线框架连接器和一个基板之间的电连接的可靠性。

公开(公告)号：US07498671B2

公开(公告)日：2009-03-03

申请号：US11834724

申请日：2007-08-07

申请人： Shinichi Fujiwara ,  Masahide Harada ,  Hideto Yoshinari ,  Shosaku Ishihara ,  Shiro Yamashita ,  Isamu Yoshida ,  Ukyo Ikeda

发明人： Shinichi Fujiwara ,  Masahide Harada ,  Hideto Yoshinari ,  Shosaku Ishihara ,  Shiro Yamashita ,  Isamu Yoshida ,  Ukyo Ikeda

IPC分类号： H01L23/10

CPC分类号： H01L23/3735 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L2224/26165 ,  H01L2224/26175 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/33181 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/3754 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/40499 ,  H01L2224/73263 ,  H01L2224/83136 ,  H01L2224/83139 ,  H01L2224/8314 ,  H01L2224/83385 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/9221 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2224/84

摘要： A semiconductor module of the present invention comprises a first conductive layer (film) and a second conductive layer (film) which are separately formed on the main surface of a packed substrate, a thermal diffusion plate connected by solder to the upper surface of the first conductive layer, a semiconductor element connected by solder to the upper surface of the thermal diffusion plate, and a lead having one end connected by solder to the second conductive layer and the other end connected by solder to the semiconductor element, wherein the outer periphery of the connected region where the semiconductor element is connected by solder to the upper surface of the thermal diffusion plate is formed with protrusion parts protruding up from the connecting region and a turning of the semiconductor element in the upper surface of the thermal diffusion plate in the solder connecting process is suppressed by the protrusion parts.

摘要翻译： 本发明的半导体模块包括在填充基板的主表面上分别形成的第一导电层（膜）和第二导电层（膜），通过焊料与第一导电层（膜）的上表面连接的热扩散板 导电层，通过焊料连接到热扩散板的上表面的半导体元件，以及引线，其一端通过焊料连接到第二导电层，另一端通过焊料连接到半导体元件，其中外周边 半导体元件通过焊料连接到热扩散板的上表面的连接区域形成有从连接区域突出的突出部分和在焊料中的热扩散板的上表面中的半导体元件的转动 连接过程被突出部分抑制。

公开(公告)号：US20080061431A1

公开(公告)日：2008-03-13

申请号：US11834724

申请日：2007-08-07

申请人： Shinichi Fujiwara ,  Masahide Harada ,  Hideto Yoshinari ,  Shosaku Ishihara ,  Shiro Yamashita ,  Isamu Yoshida ,  Ukyo Ikeda

发明人： Shinichi Fujiwara ,  Masahide Harada ,  Hideto Yoshinari ,  Shosaku Ishihara ,  Shiro Yamashita ,  Isamu Yoshida ,  Ukyo Ikeda

IPC分类号： H01L23/34

CPC分类号： H01L23/3735 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L2224/26165 ,  H01L2224/26175 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/33181 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/3754 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/40499 ,  H01L2224/73263 ,  H01L2224/83136 ,  H01L2224/83139 ,  H01L2224/8314 ,  H01L2224/83385 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/9221 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2224/84

摘要： A semiconductor module of the present invention comprises a first conductive layer (film) and a second conductive layer (film) which are separately formed on the main surface of a packed substrate, a thermal diffusion plate connected by solder to the upper surface of the first conductive layer, a semiconductor element connected by solder to the upper surface of the thermal diffusion plate, and a lead having one end connected by solder to the second conductive layer and the other end connected by solder to the semiconductor element, wherein the outer periphery of the connected region where the semiconductor element is connected by solder to the upper surface of the thermal diffusion plate is formed with protrusion parts protruding up from the connecting region and a turning of the semiconductor element in the upper surface of the thermal diffusion plate in the solder connecting process is suppressed by the protrusion parts.

摘要翻译： 本发明的半导体模块包括在填充基板的主表面上分别形成的第一导电层（膜）和第二导电层（膜），通过焊料与第一导电层（膜）的上表面连接的热扩散板 导电层，通过焊料连接到热扩散板的上表面的半导体元件，以及引线，其一端通过焊料连接到第二导电层，另一端通过焊料连接到半导体元件，其中外周边 半导体元件通过焊料连接到热扩散板的上表面的连接区域形成有从连接区域突出的突出部分和在焊料中的热扩散板的上表面中的半导体元件的转动 连接过程被突出部分抑制。

公开(公告)号：US08796563B2

公开(公告)日：2014-08-05

申请号：US12696762

申请日：2010-01-29

申请人： Ukyo Ikeda ,  Masato Nakamura ,  Shiro Yamashita

发明人： Ukyo Ikeda ,  Masato Nakamura ,  Shiro Yamashita

IPC分类号： H01L23/49 ,  H05K1/03 ,  H05K1/16 ,  H05K1/11 ,  H01L23/48 ,  H01L29/40 ,  H05K7/10

CPC分类号： H01L23/49811 ,  H01L21/50 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/4847 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/1306 ,  H01L2924/13091 ,  Y10T29/49117 ,  H01L2924/00014 ,  H01L2924/00

摘要： In ultrasonic bonding of a metal terminal to a substrate pad, a thin buffer metal layer which is formed of a soft metal or a highly slidable metal is interposed between a terminal edge and a pad so as to prevent direct contact between an end of the terminal and the pad upon bonding. This makes it possible to prevent abrasion and a crack in the pad at the end of the terminal caused by pressure and an ultrasonic wave upon the ultrasonic bonding. This makes it possible to realize a compact bonded structure with high reliability.

摘要翻译： 在金属端子与衬底焊盘的超声波接合中，由软金属或高度可滑动的金属形成的薄缓冲金属层插入在端子边缘和焊盘之间，以防止端子的端部之间的直接接触 和粘合时的垫。 这使得可以防止在超声波接合时由压力和超声波引起的端子端部处的焊盘的磨损和裂纹。 这使得可以实现具有高可靠性的紧凑的结合结构。

公开(公告)号：US20110237001A1

公开(公告)日：2011-09-29

申请号：US13034510

申请日：2011-02-24

申请人： Takehiko HASEBE ,  Masako Kato ,  Yoshihide Yamaguchi ,  Masashi Nishiki ,  Naoki Matsushima ,  Teiichi Inada ,  Rei Yamamoto ,  Hiroyuki Temmei ,  Ukyo Ikeda

发明人： Takehiko HASEBE ,  Masako Kato ,  Yoshihide Yamaguchi ,  Masashi Nishiki ,  Naoki Matsushima ,  Teiichi Inada ,  Rei Yamamoto ,  Hiroyuki Temmei ,  Ukyo Ikeda

IPC分类号： H01L21/02 ,  H01L23/544 ,  G01K7/16

CPC分类号： H01L25/0657 ,  G01R31/2874 ,  H01L23/481 ,  H01L23/49811 ,  H01L24/48 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/48091 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A technique for evaluating a semiconductor chip is provided. The semiconductor chip is mounted on a mount substrate, the semiconductor chip laminating on one surface of a silicone substrate, at least any of a metal wiring film 101 serving as a resistance temperature detector made up of multiple regions and a metal wiring film 102 serving as a heater made up of one or more regions, and an electrode 103 for connecting the metal wiring film 101 and the metal wiring film 102 with the mount substrate. Then, the metal wiring film 101 is electrically connected with an ammeter and a voltmeter, and the metal wiring film 102 is electrically connected with a power source, thereby providing an evaluation system which is capable of evaluating temperature measurement, heating, and temperature profile in each of the regions on the semiconductor chip.

摘要翻译： 提供了一种用于评估半导体芯片的技术。 半导体芯片安装在安装基板上，半导体芯片层叠在硅树脂基板的一个表面上，至少由用作由多个区域构成的电阻温度检测器的金属布线膜101和用作 由一个或多个区域构成的加热器和用于将金属布线膜101和金属布线膜102与安装基板连接的电极103。 然后，金属配线膜101与电流表和电压表电连接，并且金属布线膜102与电源电连接，从而提供能够评价温度测量，加热和温度分布的评估系统 半导体芯片上的每个区域。

公开(公告)号：US20110058342A1

公开(公告)日：2011-03-10

申请号：US12868303

申请日：2010-08-25

申请人： Shinya Kawakita ,  Shiro Yamashita ,  Ukyo Ikeda ,  Takuto Yamaguchi

发明人： Shinya Kawakita ,  Shiro Yamashita ,  Ukyo Ikeda ,  Takuto Yamaguchi

IPC分类号： H05K7/00

CPC分类号： H01L23/49537 ,  H01L23/3135 ,  H01L23/49575 ,  H01L2924/0002 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00012

摘要： An object of the present invention is to provide a semiconductor device having a small-sized, thin, and high heat-dissipating multilayer frame mounting structure. To achieve the object, the invention provides a semiconductor device having a multilayer frame obtained by stacking a plurality of lead frames on which electronic parts are mounted and sealing the stack with a resin. An interlayer distance between a lead frame on which an electronic part is mounted and a lead frame which is stacked above the lead frame and on which an electronic part is mounted is shorter than a distance from a face of the lead frame to a top face of the electronic part.

摘要翻译： 本发明的目的是提供一种具有小型，薄型和高散热多层框架安装结构的半导体器件。 为了实现该目的，本发明提供了一种具有多层框架的半导体器件，该多层框架通过堆叠安装有电子部件的多个引线框架并用树脂密封堆叠而获得。 在其上安装有电子部件的引线框架与层叠在引线框架上方并且安装有电子部件的引线框架之间的层间距离短于从引线框架的表面到引线框架的顶面的距离 电子部分。