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    Semiconductor device with low resistance SiC-metal contact
    2.
    发明授权
    Semiconductor device with low resistance SiC-metal contact 失效
    具有低电阻SiC-金属接触的半导体器件

    公开(公告)号：US08624264B2

    公开(公告)日：2014-01-07

    申请号：US13213561

    申请日：2011-08-19

    申请人： Tatsuo Shimizu ,  Takashi Shinohe

    发明人： Tatsuo Shimizu ,  Takashi Shinohe

    IPC分类号： H01L29/15

    CPC分类号： H01L29/7802 ,  H01L21/0485 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/167 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/7395 ,  H01L29/861 ,  H01L29/868 ,  H01L29/872

    摘要： A semiconductor device according to an embodiment includes a first electrode and a first silicon carbide (SiC) semiconductor part. The first electrode uses a conductive material and the first silicon carbide (SiC) semiconductor part is connected to the first electrode, in which at least one element of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba) is contained in an interface portion with the first electrode in such a way that a surface density thereof peaks, and whose conduction type is a p-type.

    摘要翻译： 根据实施例的半导体器件包括第一电极和第一碳化硅（SiC）半导体部件。 第一电极使用导电材料，第一碳化硅（SiC）半导体部分连接到第一电极，其中至少一种元素的镁（Mg），钙（Ca），锶（Sr）和钡（Ba ）包含在与第一电极的界面部分中，使得其表面密度峰值，并且其导电类型是p型。

    Full duplex transmission circuit and electronic apparatus
    5.
    发明授权
    Full duplex transmission circuit and electronic apparatus 有权
    全双工传输电路和电子设备

    公开(公告)号：US08817671B2

    公开(公告)日：2014-08-26

    申请号：US13325489

    申请日：2011-12-14

    申请人： Tatsuo Shimizu ,  Uichiro Omae

    发明人： Tatsuo Shimizu ,  Uichiro Omae

    IPC分类号： H04B1/56 ,  H03F3/45

    CPC分类号： H04L5/14 ,  H04L25/0272

    摘要： Disclosed herein is a full duplex transmission circuit including: a first internal input terminal receiving a signal to be transmitted; a second internal input terminal receiving a signal having an amplitude equal to ½ times the amplitude of the signal to be transmitted and having the same phase as the phase of the signal to be transmitted; an external input/output terminal; an internal output terminal; a first metal oxide semiconductor transistor; and the second metal oxide semiconductor transistor. A current generated by the current source as well as the sizes of the first and second metal oxide semiconductor transistors are set so that the transconductances of the first and second metal oxide semiconductor transistors become equal to 1/Z.

    摘要翻译： 这里公开了一种全双工传输电路，包括：第一内部输入端子，接收待传输的信号; 第二内部输入端子接收具有等于要发送的信号的振幅的1/2倍的信号的信号，并且具有与要发送的信号的相位相同的相位; 外部输入/输出端子; 内部输出端子; 一第一金属氧化物半导体晶体管; 和第二金属氧化物半导体晶体管。 设置由电流源产生的电流以及第一和第二金属氧化物半导体晶体管的尺寸，使得第一和第二金属氧化物半导体晶体管的跨导变为等于1 / Z。

    Oxide cluster semiconductor memory device
    6.
    发明授权
    Oxide cluster semiconductor memory device 有权
    氧化物簇半导体存储器件

    公开(公告)号：US08436417B2

    公开(公告)日：2013-05-07

    申请号：US12880711

    申请日：2010-09-13

    申请人： Tatsuo Shimizu ,  Atsuhiro Kinoshita

    发明人： Tatsuo Shimizu ,  Atsuhiro Kinoshita

    IPC分类号： H01L29/792

    CPC分类号： H01L29/792 ,  B82Y10/00 ,  G11C16/0466 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/42348 ,  H01L29/66833

    摘要： According to one embodiment, in a semiconductor memory device, a source region and a drain region are disposed away from each other in the semiconductor layer. A tunnel insulating film is formed between the source region and the drain region on the semiconductor layer. A charge accumulating film includes an oxide cluster and is formed on the tunnel insulating film. A block insulating film is formed on the charge accumulating film. A gate electrode is formed on the block insulating film. The oxide cluster includes either Zr or Hf, and further contains at least one element selected from Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Nb, Mo, Tc, Ru, Rh, Pd, Ag, Cd, Ta, W, Re, Os, Ir, Pt, Au and Hg.

    摘要翻译： 根据一个实施例，在半导体存储器件中，源极区域和漏极区域在半导体层中彼此远离地设置。 在半导体层上的源极区域和漏极区域之间形成隧道绝缘膜。 电荷累积膜包括氧化物簇并形成在隧道绝缘膜上。 在电荷累积膜上形成块绝缘膜。 栅电极形成在块绝缘膜上。 氧化物簇包括Zr或Hf，还含有选自Ti，V，Cr，Mn，Fe，Co，Ni，Cu，Zn，Nb，Mo，Tc，Ru，Rh，Pd，Ag中的至少一种元素， Cd，Ta，W，Re，Os，Ir，Pt，Au和Hg。

    Semiconductor device
    7.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07960793B2

    公开(公告)日：2011-06-14

    申请号：US12370641

    申请日：2009-02-13

    申请人： Tatsuo Shimizu ,  Masato Koyama

    发明人： Tatsuo Shimizu ,  Masato Koyama

    IPC分类号： H01L29/78

    CPC分类号： H01L21/823857 ,  H01L21/823821 ,  H01L21/823842 ,  H01L27/1203 ,  H01L29/785

    摘要： According to one embodiment, it is possible to provide a semiconductor device provided with an MIS transistor which has an effective work function being, as much as possible, suitable for low threshold operation. A CMIS device provided with an electrode having an optimal effective work function and enabling low threshold operation to achieve by producing an in-gap level by the addition of a high valence metal in an Hf (or Zr) oxide and changing a position of the in-gap level by nitrogen or fluorine or the like has been realized.

    摘要翻译： 根据一个实施例，可以提供一种设置有MIS晶体管的半导体器件，该半导体器件具有尽可能多的适合于低阈值操作的有效功函数。 具有电极的CMIS器件具有最佳的有效功函数，并且能够通过在Hf（或Zr）氧化物中添加高价金属而产生空隙间电平来实现低阈值操作，从而改变位于 通过氮或氟等的差异水平已经实现。

    Semiconductor device
    8.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07859077B2

    公开(公告)日：2010-12-28

    申请号：US11937730

    申请日：2007-11-09

    申请人： Kazushige Yamamoto ,  Tatsuo Shimizu

    发明人： Kazushige Yamamoto ,  Tatsuo Shimizu

    IPC分类号： H01L31/06

    CPC分类号： H01L27/1443 ,  H04B10/801

    摘要： A semiconductor device includes: an n-type MOS transistor and a p-type MOS transistor connected in series; and a first gate extending via an insulating film above a channel of the n-type MOS transistor and a channel of the p-type MOS transistor. By providing light to the first gate, electrons and holes are generated, at least one of either of the electrons and holes passes through above the channel of the n-type MOS transistor and at least one of the either of the electrons and holes passes through above the channel of the p-type MOS transistor, whereby the n-type MOS transistor and the p-type MOS transistor are switched.

    摘要翻译： 半导体器件包括：串联连接的n型MOS晶体管和p型MOS晶体管; 以及通过n型MOS晶体管的沟道上的绝缘膜和p型MOS晶体管的沟道延伸的第一栅极。 通过向第一栅极提供光，产生电子和空穴，电子和空穴中的至少一个通过n型MOS晶体管的沟道上方，并且任一电子和空穴中的至少一个穿过 在p型MOS晶体管的沟道之上，从而切换n型MOS晶体管和p型MOS晶体管。

    Light-emitting device and manufacturing method of the same
    9.
    发明授权
    Light-emitting device and manufacturing method of the same 失效
    发光装置及其制造方法

    公开(公告)号：US07809039B2

    公开(公告)日：2010-10-05

    申请号：US12409693

    申请日：2009-03-24

    申请人： Kazushige Yamamoto ,  Haruhiko Yoshida ,  Tatsuo Shimizu

    发明人： Kazushige Yamamoto ,  Haruhiko Yoshida ,  Tatsuo Shimizu

    IPC分类号： H01S5/00

    CPC分类号： H01S5/125 ,  B82Y20/00 ,  H01S5/021 ,  H01S5/026 ,  H01S5/1032 ,  H01S5/1071 ,  H01S5/30 ,  H01S5/3224 ,  H01S5/34 ,  H01S5/3428

    摘要： A semiconductor light-emitting device including an insulating film, an optical resonator formed on the insulating film, and a p-electrode and an n-electrode which are disposed on the both sides of the optical resonator, respectively. The optical resonator includes a first semiconductor wire and a second semiconductor wire which are arranged in parallel with a space left therebetween, the space being narrower than emission wavelength, resonator mirrors disposed at the both ends of these semiconductor wires, and a plurality of semiconductor ultra-thin films which are interposed between the first semiconductor wire and the second semiconductor wire and are electrically connected with these semiconductor wires, the first semiconductor wire is electrically connected with the p-electrode, and the second semiconductor wire is electrically connected with the n-electrode, thereby enabling the semiconductor ultra-thin films to generate laser oscillation as a current is injected thereinto.

    摘要翻译： 一种半导体发光装置，分别包括绝缘膜，形成在绝缘膜上的光谐振器，以及分别设置在光谐振器两侧的p电极和n电极。 光谐振器包括：第一半导体布线和第二半导体布线，它们与其间隔开的空间平行设置，该空间比发射波长窄，设置在这些半导体布线两端的谐振镜，以及多个半导体超导体 介于第一半导体布线和第二半导体布线之间并与这些半导体布线电连接的第一半导体布线与p电极电连接，第二半导体布线与n型电极电连接， 电极，从而使得半导体超薄膜能够在注入电流时产生激光振荡。