公开(公告)号：US07627947B2

公开(公告)日：2009-12-08

申请号：US11797232

申请日：2007-05-02

申请人： Thomas J. Davis ,  Subahu D. Desai ,  John M. Lauffer ,  James J. McNamara, Jr. ,  Voya R. Markovich

发明人： Thomas J. Davis ,  Subahu D. Desai ,  John M. Lauffer ,  James J. McNamara, Jr. ,  Voya R. Markovich

IPC分类号： H05K3/10 ,  H01R12/04

CPC分类号： H05K3/429 ,  H05K3/0032 ,  H05K3/0038 ,  H05K3/427 ,  H05K3/445 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0355 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/0143 ,  H05K2203/0554 ,  H05K2203/1545 ,  H05K2203/1572 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A method of making a multilayered circuitized substrate in which a continuous process is used to form electrically conductive layers which each will form part of a sub-composite. The sub-composites are then aligned such that openings within the conductive layers are also aligned, the sub-composites are then bonded together, and a plurality of holes are then laser drilled through the entire thickness of the bonded structure. The dielectric layers used in the sub-composites do not include continuous or semi-continuous fibers therein, thus expediting hole formation there-through.

摘要翻译： 制造多层电路化基板的方法，其中使用连续工艺来形成每个将形成子复合材料的一部分的导电层。 然后对准次级复合材料，使得导电层内的开口也对准，然后将该次级复合材料结合在一起，然后在结合结构的整个厚度上激光钻出多个孔。 在次级复合材料中使用的电介质层不包括其中的连续或半连续的纤维，因此加速了孔的形成。

公开(公告)号：US07629559B2

公开(公告)日：2009-12-08

申请号：US11305073

申请日：2005-12-19

申请人： Subahu D. Desai ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich ,  Ronald V. Smith

发明人： Subahu D. Desai ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich ,  Ronald V. Smith

IPC分类号： H05B1/02

CPC分类号： H05K3/4069 ,  H05K1/0293 ,  H05K3/105 ,  H05K2201/096 ,  H05K2203/105

摘要： A method of improving conductive paste connections in a circuitized substrate in which at least one and preferably a series of high voltage pulses are applied across the paste and at least one and preferably a series of high current pulses are applied, both series of pulses applied separately. The result is an increase in the number of conductive paths through the paste connections from those present prior to the pulse applications and a corresponding resistance reduction in said connections.

摘要翻译： 一种改进电路化基板中的导电糊料连接的方法，其中施加至少一个并且优选一系列高压脉冲施加在该糊料上并且至少一个并且优选地一系列高电流脉冲，两个脉冲串分别施加 。 结果是通过粘合连接的导电路径的数量从在脉冲应用之前存在的导电路径的数量增加以及所述连接中相应的电阻减小。

公开(公告)号：US06740819B2

公开(公告)日：2004-05-25

申请号：US10421272

申请日：2003-04-23

申请人： Anilkumar C. Bhatt ,  Ashwinkumar C. Bhatt ,  Subahu D. Desai ,  John M. Lauffer ,  Voya R. Markovich ,  Thomas R. Miller

发明人： Anilkumar C. Bhatt ,  Ashwinkumar C. Bhatt ,  Subahu D. Desai ,  John M. Lauffer ,  Voya R. Markovich ,  Thomas R. Miller

IPC分类号： H05K706

CPC分类号： H05K3/445 ,  H05K1/056 ,  H05K3/0023 ,  H05K3/0082 ,  H05K3/4641 ,  H05K2203/143

摘要： Via holes are formed in an electrically conductive power plane. Photo-imageable dielectric (PID) material is applied to one side of the power plane filling the via holes. The power plane side with no PID material is exposed to light energy to cure the PID material in the via holes. A developer is used to remove any uncured PID material. Signal plane assemblies comprising a conductive signal plane and a dielectric layer are laminated onto the filled power plane forming a two signal and one power plane (2S1P) structure. In another embodiment, the power plane has PID material applied from both sides. A photo-mask is applied to the power plane and the PID material in the via holes is cured with light energy. A developer is used to remove uncured PID material. Signal plane assemblies, as described above, are laminated onto the filled power plane forming a 2S1P structure.

摘要翻译： 通孔形成在导电电力平面中。 可光成像电介质（PID）材料被施加到填充通孔的电源平面的一侧。 没有PID材料的电源平面侧暴露于光能以固化通孔中的PID材料。 开发人员用于去除任何未固化的PID材料。 包括导电信号平面和电介质层的信号平面组件层压到形成两个信号和一个功率平面（2S1P）结构的填充的电源平面上。 在另一实施例中，动力平面具有从两侧施加的PID材料。 将光掩模应用于电源平面，通孔中的PID材料用光能固化。 开发人员用于清除未固化的PID材料。 如上所述的信号平面组件被层压到形成2S1P结构的填充的电源平面上。

公开(公告)号：US06608757B1

公开(公告)日：2003-08-19

申请号：US10101277

申请日：2002-03-18

申请人： Anilkumar C. Bhatt ,  Ashwinkumar C. Bhatt ,  Subahu D. Desai ,  John M. Lauffer ,  Voya R. Markovich ,  Thomas R. Miller

发明人： Anilkumar C. Bhatt ,  Ashwinkumar C. Bhatt ,  Subahu D. Desai ,  John M. Lauffer ,  Voya R. Markovich ,  Thomas R. Miller

IPC分类号： H05K716

CPC分类号： H05K3/445 ,  H05K1/056 ,  H05K3/0023 ,  H05K3/0082 ,  H05K3/4641 ,  H05K2203/143

摘要： Via holes are formed in an electrically conductive power plane. Photo-imageable dielectric (PID) material is applied to one side of the power plane filling the via holes. The power plane side with no PID material is exposed to light energy to cure the PID material in the via holes. A developer is used to remove any uncured PID material. Signal plane assemblies comprising a conductive signal plane and a dielectric layer are laminated onto the filled power plane forming a two signal and one power plane (2S1P) structure. In another embodiment, the power plane has PID material applied from both sides. A photo-mask is applied to the power plane and the PID material in the via holes is cured with light energy. A developer is used to remove uncured PID material. Signal plane assemblies, as described above, are laminated onto the filled power plane forming a 2S1P structure.

摘要翻译： 通孔形成在导电电力平面中。 可光成像电介质（PID）材料被施加到填充通孔的电源平面的一侧。 没有PID材料的电源平面侧暴露于光能以固化通孔中的PID材料。 开发人员用于去除任何未固化的PID材料。 包括导电信号平面和电介质层的信号平面组件层压到形成两个信号和一个功率平面（2S1P）结构的填充的电源平面上。 在另一实施例中，动力平面具有从两侧施加的PID材料。 将光掩模应用于电源平面，通孔中的PID材料用光能固化。 开发人员用于清除未固化的PID材料。 如上所述的信号平面组件被层压到形成2S1P结构的填充的电源平面上。

公开(公告)号：US07326643B2

公开(公告)日：2008-02-05

申请号：US11808596

申请日：2007-06-12

申请人： Subahu D. Desai ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich ,  David L. Thomas

发明人： Subahu D. Desai ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich ,  David L. Thomas

IPC分类号： H01L21/4751

CPC分类号： G11C11/22 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/16 ,  H05K2201/0166 ,  H05K2201/0179 ,  H05K2201/09763 ,  H05K2201/10159 ,  H01L2224/0401

摘要： A method of making circuitized substrate comprised of at least one dielectric material having an electrically conductive pattern thereon. At least part of the pattern is used as the first layer of an organic memory device which further includes at least a second dielectric layer over the pattern and a second pattern aligned with respect to the lower part for achieving several points of contact to thus form the device.

摘要翻译： 一种制造电路化衬底的方法，所述电路化衬底由其上具有导电图案的至少一种电介质材料组成。 图案的至少一部分被用作有机存储器件的第一层，该有机存储器件还包括在图案上方的至少第二介电层和相对于下部对准的第二图案，用于实现几个接触点，从而形成 设备。

公开(公告)号：US07253502B2

公开(公告)日：2007-08-07

申请号：US10900385

申请日：2004-07-28

申请人： Subahu D. Desai ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich ,  David L. Thomas

发明人： Subahu D. Desai ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich ,  David L. Thomas

IPC分类号： H01L23/58

CPC分类号： G11C11/22 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/16 ,  H05K2201/0166 ,  H05K2201/0179 ,  H05K2201/09763 ,  H05K2201/10159 ,  H01L2224/0401

摘要： A circuitized substrate comprised of at least one dielectric material having an electrically conductive pattern thereon. At least part of the pattern is used as the first layer of an organic memory device which further includes at least a second dielectric layer over the pattern and a second pattern aligned with respect to the lower part for achieving several points of contact to thus form the device. The substrate is preferably combined with other dielectric-circuit layered assemblies to form a multilayered substrate on which can be positioned discrete electronic components (e.g., a logic chip) coupled to the internal memory device to work in combination therewith. An electrical assembly capable of using the substrate is also provided, as is an information handling system adapted for using one or more such electrical assemblies as part thereof.

摘要翻译： 一种电路化衬底，由至少一层具有导电图案的电介质材料构成。 图案的至少一部分被用作有机存储器件的第一层，该有机存储器件还包括在图案上方的至少第二介电层和相对于下部对准的第二图案，用于实现几个接触点，从而形成 设备。 衬底优选地与其它介电电路分层组件组合以形成多层衬底，在多层衬底上，可以将耦合到内部存储器件的分立电子部件（例如，逻辑芯片）放置在其上以与之组合工作。 还提供了能够使用基板的电气组件，以及适于使用一个或多个这样的电气组件作为其一部分的信息处理系统。

公开(公告)号：US07977034B1

公开(公告)日：2011-07-12

申请号：US12657394

申请日：2010-01-20

申请人： John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  Peter A. Moschak

发明人： John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  Peter A. Moschak

IPC分类号： H05K3/02 ,  H05K3/06

CPC分类号： H05K3/4641 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/427 ,  H05K3/44 ,  H05K3/445 ,  H05K3/462 ,  H05K2201/0355 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/0143 ,  H05K2203/068 ,  H05K2203/1545 ,  H05K2203/1572 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

摘要： Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.

摘要翻译： 使用连续辊式制造电路化基板的装置和方法，其中导体层被馈送到装置中，可光成像电介质层被施加到导体层的相对侧，穿过复合材料形成通孔， 然后在电介质上添加金属层，然后在其中形成图案（例如电路）。 除了这些之外，还进行了几个操作以形成最终终端产品，电路化基板（例如，印刷电路板），同时产品的导体层保持为固体形式，直到与连续层的最终分离 。

公开(公告)号：US07827682B2

公开(公告)日：2010-11-09

申请号：US11110920

申请日：2005-04-21

申请人： John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  Peter A. Moschak

发明人： John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  Peter A. Moschak

IPC分类号： H05K3/10 ,  G03F7/16

CPC分类号： H05K3/4641 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/427 ,  H05K3/44 ,  H05K3/445 ,  H05K3/462 ,  H05K2201/0355 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/0143 ,  H05K2203/068 ,  H05K2203/1545 ,  H05K2203/1572 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

摘要： Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.

摘要翻译： 使用连续辊式制造电路化基板的装置和方法，其中导体层被馈送到装置中，可光成像电介质层被施加到导体层的相对侧，穿过复合材料形成通孔， 然后在电介质上添加金属层，然后在其中形成图案（例如电路）。 除了这些之外，还进行了几个操作以形成最终终端产品，电路化基板（例如，印刷电路板），同时产品的导体层保持为固体形式，直到与连续层的最终分离 。

公开(公告)号：US20110173809A1

公开(公告)日：2011-07-21

申请号：US12657394

申请日：2010-01-20

申请人： John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, JR. ,  Peter A. Moschak

发明人： John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, JR. ,  Peter A. Moschak

IPC分类号： H05K3/42 ,  H05K3/02 ,  H05K3/46

CPC分类号： H05K3/4641 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/427 ,  H05K3/44 ,  H05K3/445 ,  H05K3/462 ,  H05K2201/0355 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/0143 ,  H05K2203/068 ,  H05K2203/1545 ,  H05K2203/1572 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

摘要： Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.

摘要翻译： 使用连续辊式制造电路化基板的装置和方法，其中导体层被馈送到装置中，可光成像电介质层被施加到导体层的相对侧，穿过复合材料形成通孔， 然后在电介质上添加金属层，然后在其中形成图案（例如电路）。 除了这些之外，还进行了几个操作以形成最终终端产品，电路化基板（例如，印刷电路板），同时产品的导体层保持为固体形式，直到与连续层的最终分离 。

公开(公告)号：US07176383B2

公开(公告)日：2007-02-13

申请号：US10740398

申请日：2003-12-22

申请人： John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  David L. Thomas

发明人： John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  David L. Thomas

IPC分类号： H05K1/03

CPC分类号： H05K1/0216 ,  H05K1/0228 ,  H05K2201/09236 ,  H05K2201/09672 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A printed circuit board and a method of making same in which the board includes a common power plane having dielectric layers on opposing sides thereof and a signal layer on each of said dielectric layers, each signal layer comprising a plurality of substantially parallel signal lines running in substantially similar directions across said signal layers. Predetermined portions of the signal lines in one signal layer are aligned relative to and also parallel to corresponding signal lines in the other signal layer, with the power plane being located between these portions. Through hole connections are provided between selected signal lines in the two layers, these occurring through clearance holes in the power plane so as to be isolated therefrom.

摘要翻译： 一种印刷电路板及其制造方法，其中所述板包括在其相对侧上具有电介质层的公共电源平面和每个所述电介质层上的信号层，每个信号层包括多条基本上平行的信号线， 基本相似的方向跨越所述信号层。 一个信号层中的信号线的预定部分相对于并且平行于另一个信号层中的相应的信号线，而功率平面位于这些部分之间。 在两层中的选定信号线之间提供通孔连接，这些连接通过电源平面中的间隙而发生，从而与其隔离。