摘要:
On the p.sup.- substrate, the n.sup.- epitaxial layer is surrounded and isolated by the p well. In the surface of the n.sup.- epitaxial layer, there is provided the p floating region in the vicinity of the p well, on which the sense electrode is provided. The insulation film and the conductive film are formed on the n.sup.- epitaxial layer between the p well and the p floating region to overlap them. The conductive film and the p floating region serve as a composite field plate, which makes it hard that the surface electric field distribution is influenced by the state of electric charge in the surface and relieves the surface electric field by expanding the depletion layer, which extends from the pn junction between the n.sup.31 epitaxial layer and the p well into the n.sup.- epitaxial layer in current blocking state, toward the center of the n.sup.- epitaxial layer. The potential of the p floating region is determined by capacity coupling in the current blocking state and thus the sense voltage characteristics through the sense electrode can be smooth.
摘要:
First and second semiconductor elements are formed in first and second semiconductor element forming regions which have the same thickness, include first and second semiconductor layers and are separated with dielectric isolation from each other. The thickness of the first semiconductor layer is made different between the first and second semiconductor element forming regions, so that the thickness of the second semiconductor layer becomes different between the first and second semiconductor element forming regions. Thus, the semiconductor device may have the semiconductor elements which have second semiconductor layers with different thicknesses in accordance with desired electrical characteristics for each of the semiconductor elements formed in the first and second semiconductor element forming regions, to complement a semiconductor device having the semiconductor elements each of which has independent optimum electrical characteristics.
摘要:
The present invention relates to a semiconductor device which is fabricated in simple process steps and which prevents deterioration in a breakdown voltage. Two diffusion regions are formed in space in a surface of an n.sup.- type layer. The diffusion regions are separated from each other by an insulation layer, but each in contact with a conductive film. Another conductive film is disposed on the insulation layer. The three conductive films are insulated from each other by the insulation layer and still another overlying insulation layer. Still other conductive films are formed on the upper insulation layer, and are coupled to the three conductive films. A wiring conductive film is also formed on the upper insulation layer. The wiring conductive film has a relatively small capacitance with the three conductive films. Due to the device structure, influence of the wiring conductive film over the surface of the semiconductor device is blocked by the conductive films. Hence, an electric field concentration will not result.
摘要:
On the p.sup.- substrate, the n.sup.- epitaxial layer is surrounded and isolated by the p well. In the surface of the n.sup.- epitaxial layer, there is provided the p floating region in the vicinity of the p well, on which the sense electrode is provided. The insulation film and the conductive film are formed on the n.sup.- epitaxial layer between the p well and the p floating region to overlap them. The conductive film and the p floating region serve as a composite field plate, which makes it hard that the surface electric field distribution is influenced by the state of electric charge in the surface and relieves the surface electric field by expanding the depletion layer, which extends from the pn junction between the n.sup.- epitaxial layer and the p well into the n.sup.- epitaxial layer in current blocking state, toward the center of the n.sup.- epitaxial layer. The potential of the p floating region is determined by capacity coupling in the current blocking state and thus the sense voltage characteristics through the sense electrode can be smooth.
摘要:
On the p.sup.- substrate, the n.sup.- epitaxial layer is surrounded and isolated by the p well. In the surface of the n.sup.- epitaxial layer, there is provided the p floating region in the vicinity of the p well, on which the sense electrode is provided. The insulation film and the conductive film are formed on the n.sup.- epitaxial layer between the p well and the p floating region to overlap them. The conductive film and the p floating region serve as a composite field plate, which makes it hard that the surface electric field distribution is influenced by the state of electric charge in the surface and relieves the surface electric field by expanding the depletion layer, which extends from the pn junction between the n.sup.- epitaxial layer and the p well into the n.sup.- epitaxial layer in current blocking state, toward the center of the n.sup.- epitaxial layer. The potential of the p floating region is determined by capacity coupling in the current blocking state and thus the sense voltage characteristics through the sense electrode can be smooth.
摘要:
A semiconductor device supplying a charging current to a charging-target element includes: a semiconductor layer of a first conductivity type; a first semiconductor region of a second conductivity type formed on a main surface of the semiconductor layer and having a first node coupled to a first electrode of the charging-target element and a second node coupled to a power supply potential node supplied with a power supply voltage; a second semiconductor region of the first conductivity type formed in a surface of the first semiconductor region at a distance from the semiconductor layer and having a third node coupled to the power supply potential node; and a charge carrier drift restriction portion restricting drift of charge carrier from the third node to the semiconductor layer.
摘要:
A voltage mitigating element mitigating a voltage applied across a gate insulating film in an off state of an insulated gate bipolar transistor (IGBT) is arranged to a gate electrode node of a P-channel MOS transistor provided for suppressing flow-in of holes at the time of turn-off of the IGBT. Withstanding voltage characteristics are improved and an occupation area thereof is reduced while maintaining switching characteristics and a low on-resistance of an insulated gate bipolar transistor.
摘要:
A semiconductor device has a first conductivity-type first semiconductor region, a second conductivity-type second semiconductor region and a second conductivity-type third semiconductor region both located on or above the first semiconductor region, a second conductivity-type fourth semiconductor region between the second semiconductor region and the third semiconductor region, and a first conductivity-type fifth semiconductor region between the third semiconductor region and the fourth semiconductor region. The fourth semiconductor region and the fifth semiconductor region are electrically connected by a conductive member. A distance between the fourth semiconductor region and the third semiconductor region is larger than a width of the fourth semiconductor region.
摘要:
In a semiconductor device and a method of manufacturing the same according to the invention, a p-type diffusion region for electrically connecting a back gate region and an electrode layer together is formed at a source region. Thereby, both of source region and p-type diffusion region are electrically connected to the electrode layer, so that the source region and the back gate region are maintained at the same potential. As a result, it is possible to provide the semiconductor device and the method of manufacturing the same which can suppress operation of a parasitic bipolar transistor formed in the semiconductor device even if a gate electrode has a large width.
摘要:
A resurf structure is provided which includes an n type diffusion region surrounded by a n- diffusion region, in which a part of the joined combination of the n type diffusion region and the n- diffusion region is separated by a narrow p- substrate region in between. An aluminum lead is provided between the separated n- diffusion regions, and a signal is level shifted. A high voltage semiconductor device which includes a small area high voltage isolation region is obtained without process cost increase.