公开(公告)号：US20110171778A1

公开(公告)日：2011-07-14

申请号：US13071629

申请日：2011-03-25

申请人： Tomoko TAMURA ,  Eiji SUGIYAMA ,  Yoshitaka DOZEN ,  Koji DAIRIKI ,  Takuya TSURUME

发明人： Tomoko TAMURA ,  Eiji SUGIYAMA ,  Yoshitaka DOZEN ,  Koji DAIRIKI ,  Takuya TSURUME

IPC分类号： H01L21/50 ,  H01L21/56

CPC分类号： H01L21/02381 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/13 ,  H01L2221/68359 ,  H01L2221/68368 ,  H01L2224/81001

摘要： A release layer formed over a substrate; at least one of thin film integrated circuits is formed over the release layer; a film is formed over each of the at least one of thin film integrated circuits; and the release layer is removed by using an etchant; thus, the at least one of thin film integrated circuits is peeled from the substrate. A semiconductor device is formed by sealing the peeled thin film integrated circuit by lamination or the like.

摘要翻译： 形成在衬底上的释放层; 在剥离层上形成薄膜集成电路中的至少一个; 在薄膜集成电路中的至少一个上形成膜; 并通过使用蚀刻剂除去释放层; 因此，薄膜集成电路中的至少一个从基板剥离。 半导体器件通过层压等密封剥离的薄膜集成电路而形成。

公开(公告)号：US20110207292A1

公开(公告)日：2011-08-25

申请号：US13100316

申请日：2011-05-04

申请人： Yoshitaka DOZEN ,  Tomoko TAMURA ,  Takuya TSURUME ,  Koji DAIRIKI

发明人： Yoshitaka DOZEN ,  Tomoko TAMURA ,  Takuya TSURUME ,  Koji DAIRIKI

IPC分类号： H01L21/762

CPC分类号： H01L27/1266 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/13 ,  H01L27/28 ,  H01L29/78603 ,  H01L2924/3511

摘要： Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.

摘要翻译： 预期由硅晶片形成的IC芯片的应用形式和需求将增加，并且需要进一步降低成本。 本发明的目的是提供一种IC芯片的结构和能够以较低成本生产的方法。 本发明的一个特征是使用具有金属膜的金属膜和反应物作为分离层。 金属膜或具有金属的反应物的蚀刻速率高，并且除了蚀刻金属膜的化学方法或具有金属的反应物之外的物理手段可以用于本发明。 因此，可以在短时间内更容易地制造IDF芯片。

公开(公告)号：US20090050964A1

公开(公告)日：2009-02-26

申请号：US12255117

申请日：2008-10-21

申请人： Yoshitaka DOZEN ,  Tomoko TAMURA ,  Takuya TSURUME ,  Koji DAIRIKI

发明人： Yoshitaka DOZEN ,  Tomoko TAMURA ,  Takuya TSURUME ,  Koji DAIRIKI

IPC分类号： H01L29/786 ,  H01L21/304

CPC分类号： H01L27/1266 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/13 ,  H01L27/28 ,  H01L29/78603 ,  H01L2924/3511

摘要： Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.

摘要翻译： 预期由硅晶片形成的IC芯片的应用形式和需求将增加，并且需要进一步降低成本。 本发明的目的是提供一种IC芯片的结构和能够以较低成本生产的方法。 本发明的一个特征是使用具有金属膜的金属膜和反应物作为分离层。 金属膜或具有金属的反应物的蚀刻速率高，并且除了蚀刻金属膜的化学方法或具有金属的反应物之外的物理手段可以用于本发明。 因此，可以在短时间内更容易地制造IDF芯片。

公开(公告)号：US20120322212A1

公开(公告)日：2012-12-20

申请号：US13596376

申请日：2012-08-28

申请人： Koji DAIRIKI ,  Junya MARUYAMA ,  Tomoko TAMURA ,  Eiji SUGIYAMA ,  Yoshitaka DOZEN

发明人： Koji DAIRIKI ,  Junya MARUYAMA ,  Tomoko TAMURA ,  Eiji SUGIYAMA ,  Yoshitaka DOZEN

IPC分类号： H01L21/56

CPC分类号： H01L27/1255 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78648

摘要： It is an object of the present invention to reduce the cost of a wireless chip, further, to reduce the cost of a wireless chip by enabling the mass production of a wireless chip, and furthermore, to provide a downsized and lightweight wireless chip. A wireless chip in which a thin film integrated circuit peeled from a glass substrate or a quartz substrate is formed between a first base material and a second base material is provided according to the invention. As compared with a wireless chip formed from a silicon substrate, the wireless chip according to the invention realizes downsizing, thinness, and lightweight. The thin film integrated circuit included in the wireless chip according to the invention at least has an n-type thin film transistor having an LDD (Lightly Doped Drain) structure, a p-type thin film transistor having a single drain structure, and a conductive layer functioning as an antenna.

摘要翻译： 本发明的目的在于降低无线芯片的成本，并且通过实现无线芯片的批量生产，进一步降低无线芯片的成本，此外，提供小型化，轻量化的无线芯片。 根据本发明，提供一种其中从玻璃基板或石英基板剥离的薄膜集成电路形成在第一基材和第二基材之间的无线芯片。 与由硅基板形成的无线芯片相比，根据本发明的无线芯片实现了小型化，薄型化和轻量化。 包括在根据本发明的无线芯片中的薄膜集成电路至少具有具有LDD（轻掺杂漏极）结构的n型薄膜晶体管，具有单个漏极结构的p型薄膜晶体管和导电 层作为天线起作用。

公开(公告)号：US20110244656A1

公开(公告)日：2011-10-06

申请号：US13162611

申请日：2011-06-17

申请人： Koji DAIRIKI ,  Naoto KUSUMOTO ,  Takuya TSURUME

发明人： Koji DAIRIKI ,  Naoto KUSUMOTO ,  Takuya TSURUME

IPC分类号： H01L21/82 ,  H01L21/20

CPC分类号： H01L27/1266 ,  H01L27/1214 ,  H01L2221/68354

摘要： It is an object of the present invention to improve a factor which influences productivity such as variation caused by a characteristic defect of a circuit by thinning or production yield when an integrated circuit device in which a substrate is thinned is manufactured. A stopper layer is formed over one surface of a substrate, and an element is formed over the stopper layer, and then, the substrate is thinned from the other surface thereof. A method in which a substrate is ground or polished or a method in which the substrate is etched by chemical reaction is used as a method for thinning or removing the substrate.

摘要翻译： 本发明的目的在于，制造基板薄型化的集成电路装置时，通过减薄或提高成品率来提高影响生产率的因素，例如电路特性缺陷引起的变化。 在衬底的一个表面上形成阻挡层，并且在阻挡层上形成元件，然后从其另一个表面减薄衬底。 将基板研磨或抛光的方法或其中通过化学反应蚀刻基板的方法用作薄膜或去除基板的方法。

公开(公告)号：US20110033987A1

公开(公告)日：2011-02-10

申请号：US12908239

申请日：2010-10-20

申请人： Koji DAIRIKI ,  Naoto KUSUMOTO ,  Takuya TSURUME

发明人： Koji DAIRIKI ,  Naoto KUSUMOTO ,  Takuya TSURUME

IPC分类号： H01L21/56 ,  H01L21/20

CPC分类号： H01L27/1266 ,  H01L27/1285 ,  H01L27/1292

摘要： An object is to provide a method for manufacturing a semiconductor device which suppresses an influence on a semiconductor element due to entry of an impurity element, moisture, or the like from outside even in the case of thinning or removing a substrate after forming a semiconductor element over the substrate. A feature is to form an insulating film functioning as a protective film on at least one side of the substrate by performing surface treatment on the substrate, to form a semiconductor element such as a thin film transistor over the insulating film, and to thin the substrate. As the surface treatment, addition of an impurity element or plasma treatment is performed on the substrate. As a means for thinning the substrate, the substrate can be partially removed by performing grinding treatment, polishing treatment, or the like on the other side of the substrate.

摘要翻译： 本发明的目的是提供一种用于制造半导体器件的方法，其中，即使在形成半导体元件之后减薄或去除衬底的情况下，也可以抑制由于杂质元素，水分等的进入而对半导体元件的影响 在基板上。 特征在于，在基板的至少一面上形成作为保护膜的绝缘膜，在基板上进行表面处理，在绝缘膜上形成薄膜晶体管等半导体元件，并使基板 。 作为表面处理，在基板上进行杂质元素或等离子体处理的添加。 作为使基板变薄的方法，可以在基板的另一侧进行研磨处理，研磨处理等来部分除去基板。

公开(公告)号：US20120146240A1

公开(公告)日：2012-06-14

申请号：US12053932

申请日：2008-03-24

申请人： Koji DAIRIKI ,  Konami IZUMI

发明人： Koji DAIRIKI ,  Konami IZUMI

IPC分类号： H01L23/52

CPC分类号： H01L25/0657 ,  H01L21/6835 ,  H01L23/48 ,  H01L23/5385 ,  H01L23/58 ,  H01L23/645 ,  H01L23/66 ,  H01L24/32 ,  H01L24/48 ,  H01L2221/68318 ,  H01L2221/6835 ,  H01L2221/68368 ,  H01L2223/6677 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48157 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2924/00014 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01054 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/07811 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15159 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01Q1/2283 ,  H01Q9/0407 ,  H01Q9/285 ,  H01Q13/10 ,  H01Q23/00 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： To provide a semiconductor device in which wireless communication is performed between devices formed over different substrates and connection defects of wirings are reduced. A first device having a first antenna is provided over a first substrate, a second device having a second antenna which can communicate with the first antenna is provided over a second substrate, and the first substrate and the second substrate are bonded to each other to manufacture a semiconductor device. The first substrate and the second substrate are bonded to each other by bonding with a bonding layer interposed therebetween, anodic bonding, or surface activated bonding.

摘要翻译： 为了提供在不同基板之间形成的器件之间执行无线通信的半导体器件，并且布线的连接缺陷被减少。 具有第一天线的第一装置设置在第一基板上，具有可与第一天线连通的第二天线的第二装置设置在第二基板上，并且第一基板和第二基板彼此接合以制造 半导体器件。 第一基板和第二基板通过与其间的接合层的粘合，阳极接合或表面活性接合而彼此接合。

公开(公告)号：US20110220907A1

公开(公告)日：2011-09-15

申请号：US13045951

申请日：2011-03-11

申请人： Hidekazu MIYAIRI ,  Koji DAIRIKI ,  Satoshi TORIUMI

发明人： Hidekazu MIYAIRI ,  Koji DAIRIKI ,  Satoshi TORIUMI

IPC分类号： H01L29/786

CPC分类号： H01L29/78648 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78687 ,  H01L29/78696

摘要： In an inverted staggered thin film transistor, a microcrystalline silicon film and a pair of silicon carbide films are provided between a gate insulating film and wirings serving as a source wiring and a drain wiring. The microcrystalline silicon film is formed on the gate insulating film side and the pair of silicon carbide films are formed on the wiring side. In such a manner, a semiconductor device having favorable electric characteristics can be manufactured with high productivity.

摘要翻译： 在倒置交错薄膜晶体管中，在栅极绝缘膜和用作源极布线和漏极布线的布线之间提供微晶硅膜和一对碳化硅膜。 在栅极绝缘膜侧形成微晶硅膜，在布线侧形成一对碳化硅膜。 以这种方式，可以以高生产率制造具有良好电特性的半导体器件。

公开(公告)号：US20110092013A1

公开(公告)日：2011-04-21

申请号：US12977213

申请日：2010-12-23

申请人： Fumito ISAKA ,  Sho KATO ,  Koji DAIRIKI

发明人： Fumito ISAKA ,  Sho KATO ,  Koji DAIRIKI

IPC分类号： H01L31/18

CPC分类号： H01L31/1804 ,  H01L31/02168 ,  H01L31/022433 ,  H01L31/03762 ,  H01L31/0725 ,  H01L31/1864 ,  H01L31/202 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

摘要： A fragile layer is formed in a region at a depth of less than 1000 nm from one surface of a single crystal semiconductor substrate, and a first impurity semiconductor layer and a first electrode are formed at the one surface side. After bonding the first electrode and a supporting substrate, the single crystal semiconductor substrate is separated using the fragile layer or the vicinity as a separation plane, thereby forming a first single crystal semiconductor layer over the supporting substrate. An amorphous semiconductor layer is formed on the first single crystal semiconductor layer, and a second single crystal semiconductor layer is formed by heat treatment for solid phase growth of the amorphous semiconductor layer. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer and a second electrode are formed over the second single crystal semiconductor layer.

摘要翻译： 在单晶半导体衬底的一个表面的深度小于1000nm的区域形成脆性层，在一个表面侧形成第一杂质半导体层和第一电极。 在接合第一电极和支撑衬底之后，使用脆弱层或附近分离单晶半导体衬底作为分离平面，从而在支撑衬底上形成第一单晶半导体层。 在第一单晶半导体层上形成非晶半导体层，通过对非晶半导体层的固相生长进行热处理形成第二单晶半导体层。 在第二单晶半导体层上形成具有与第一杂质半导体层的导电类型相反的导电类型的第二杂质半导体层和第二电极。

公开(公告)号：US20090057672A1

公开(公告)日：2009-03-05

申请号：US12196798

申请日：2008-08-22

申请人： Satoshi KOBAYASHI ,  Ikuko KAWAMATA ,  Koji DAIRIKI ,  Shigeki KOMORI ,  Toshiyuki ISA ,  Shunpei YAMAZAKI

发明人： Satoshi KOBAYASHI ,  Ikuko KAWAMATA ,  Koji DAIRIKI ,  Shigeki KOMORI ,  Toshiyuki ISA ,  Shunpei YAMAZAKI

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78696

摘要： A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.

摘要翻译： 一种包括具有高电特性和高可靠性的薄膜晶体管的显示装置，以及具有高批量生产率的显示装置的制造方法。 在包括反交错通道停止型薄膜晶体管的显示装置中，反交错通道停止型薄膜晶体管包括包含沟道形成区的微晶半导体膜，以及含有杂质元素的杂质区 在微晶半导体膜的沟道形成区域中，在不与源极和漏极重叠的区域中选择性地提供一种导电型。