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公开(公告)号:US20190279932A1
公开(公告)日:2019-09-12
申请号:US16103106
申请日:2018-08-14
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Satoshi WAKATSUKI , Masayuki KITAMURA , Takeshi ISHIZAKI , Hiroshi ITOKAWA , Daisuke IKENO , Kei WATANABE , Atsuko SAKATA
IPC: H01L23/522 , H01L27/1157 , H01L27/11582 , H01L23/532 , H01L21/28 , H01L21/768
Abstract: In one embodiment, a semiconductor device includes a first insulator. The device further includes a metal layer that includes a first metal layer provided on a surface of the first insulator, and a second metal layer provided on a surface of the first metal layer and containing a first metallic element and oxygen or containing aluminum and nitrogen, or includes a third metal layer provided on the surface of the first insulator and containing a second metallic element, aluminum and nitrogen. The device further includes an interconnect material layer provided on a surface of the metal layer.
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公开(公告)号:US20190088675A1
公开(公告)日:2019-03-21
申请号:US15910703
申请日:2018-03-02
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Hiroshi ITOKAWA , Takashi FURUHASHI
IPC: H01L27/11582 , H01L29/51
Abstract: A semiconductor memory device includes a stacked body, a semiconductor portion, a first insulating film, a charge storage layer, and a second insulating film. The stacked body has a plurality of electrode layers stacked in a spaced apart manner from each other. The semiconductor portion is provided in the stacked body and extends in a first direction where the plurality of electrode layers are stacked. The first insulating film is provided between the plurality of electrode layers and the semiconductor portion. The charge storage layer is provided between the plurality of electrode layers and the first insulating film and contains a compound including at least one of hafnium oxide or zirconium oxide and a first material having a valence lower than that of the at least one of the hafnium oxide or the zirconium oxide.
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公开(公告)号:US20170373082A1
公开(公告)日:2017-12-28
申请号:US15682996
申请日:2017-08-22
Applicant: Toshiba Memory Corporation
Inventor: Katsuyuki SEKINE , Tatsuya KATO , Fumitaka ARAI , Toshiyuki IWAMOTO , Yuta WATANABE , Wataru SAKAMOTO , Hiroshi ITOKAWA , Akio KANEKO
IPC: H01L27/11556 , H01L21/768 , H01L29/51 , H01L29/788 , H01L29/423 , H01L21/02 , H01L21/28 , H01L29/45 , H01L29/49 , H01L21/311 , H01L21/3065 , H01L21/285 , H01L27/11519 , H01L29/10
CPC classification number: H01L27/11556 , H01L21/02164 , H01L21/0217 , H01L21/02181 , H01L21/02271 , H01L21/02532 , H01L21/02592 , H01L21/0262 , H01L21/02636 , H01L21/28562 , H01L21/28568 , H01L21/3065 , H01L21/31111 , H01L21/31116 , H01L21/76801 , H01L27/11519 , H01L29/1037 , H01L29/40114 , H01L29/42324 , H01L29/456 , H01L29/4958 , H01L29/4966 , H01L29/4975 , H01L29/513 , H01L29/515 , H01L29/517 , H01L29/66666 , H01L29/7827 , H01L29/7883 , H01L29/7889
Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the semiconductor pillar and the second electrode, a second insulating film provided between the first electrode and the second electrode and on two first-direction sides of the first electrode, and a conductive film provided between the second electrode and the second insulating film, the conductive film not contacting the first insulating film.
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