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    Deposition method for transition-metal oxide based dielectric
    4.
    发明申请
    Deposition method for transition-metal oxide based dielectric 审中-公开
    基于过渡金属氧化物的电介质的沉积方法

    公开(公告)号：US20080182427A1

    公开(公告)日：2008-07-31

    申请号：US11698337

    申请日：2007-01-26

    申请人： Lars Oberbeck ,  Uwe Schroeder ,  Johannes Heitmann ,  Stephan Kudelka ,  Tim Boescke ,  Jonas Sundqvist

    发明人： Lars Oberbeck ,  Uwe Schroeder ,  Johannes Heitmann ,  Stephan Kudelka ,  Tim Boescke ,  Jonas Sundqvist

    IPC分类号： H01L29/78 ,  H01L21/31 ,  H01L29/92

    CPC分类号： H01L21/02337 ,  H01L21/02175 ,  H01L21/28194 ,  H01L21/3142 ,  H01L21/31641 ,  H01L27/10805 ,  H01L27/1085 ,  H01L28/40 ,  H01L29/513 ,  H01L29/517

    摘要： The present invention relates to a method for depositing a dielectric material comprising a transition metal oxide. In an initial step, a substrate is provided. In a further step, a first precursor comprising a transition metal containing compound, and a second precursor predominantly comprising at least one of water vapor, ozone, oxygen, or oxygen plasma are sequentially applied for depositing above the substrate a layer of a transition metal containing material. In another step, a third precursor comprising a dopant containing compound, and a fourth precursor predominantly comprising at least one of water vapor, ozone, oxygen, or oxygen plasma are sequentially applied for depositing above the substrate a layer of a dopant containing material. The transition metal comprises at least one of zirconium and hafnium. The dopant comprises at least one of barium, strontium, calcium, niobium, bismuth, magnesium, and cerium.

    摘要翻译： 本发明涉及沉积包含过渡金属氧化物的电介质材料的方法。 在初始步骤中，提供衬底。 在另一步骤中，依次施加包含含过渡金属的化合物的第一前体和主要包含水蒸气，臭氧，氧或氧等离子体中的至少一种的第二前体，以在基底上沉积含有过渡金属的层 材料。 在另一步骤中，顺序地施加包含掺杂剂的化合物的第三前体和主要包含水蒸汽，臭氧，氧或氧等离子体中的至少一种的第四前体，以在衬底上沉积含掺杂剂材料的层。 过渡金属包括锆和铪中的至少一种。 掺杂剂包括钡，锶，钙，铌，铋，镁和铈中的至少一种。

    Integrated circuit with dielectric layer
    7.
    发明授权
    Integrated circuit with dielectric layer 有权
    集成电路与介质层

    公开(公告)号：US07709359B2

    公开(公告)日：2010-05-04

    申请号：US11850218

    申请日：2007-09-05

    申请人： Tim Boescke ,  Johannes Heitmann ,  Uwe Schroder

    发明人： Tim Boescke ,  Johannes Heitmann ,  Uwe Schroder

    IPC分类号： H01L29/72

    CPC分类号： H01L21/28291 ,  H01L27/10873 ,  H01L28/40 ,  H01L28/91 ,  H01L29/513 ,  H01L29/78

    摘要： A method of fabricating an integrated circuit with a dielectric layer on a substrate is disclosed. One embodiment provides forming the dielectric layer in an amorphous state on the substrate, the dielectric layer having a crystallization temperature; a doping the dielectric layer; a forming of a covering layer on the dielectric layer at a temperature being equal to or below the crystallization temperature; and a heating of the dielectric layer to a temperature being equal to or greater than the crystallization temperature.

    摘要翻译： 公开了一种在衬底上制造具有电介质层的集成电路的方法。 一个实施例提供在基底上形成非晶状态的电介质层，介电层具有结晶温度; 掺杂介电层; 在等于或低于结晶温度的温度下在电介质层上形成覆盖层; 以及将介电层加热至等于或大于结晶温度的温度。

    INTEGRATED CIRCUIT WITH DIELECTRIC LAYER
    8.
    发明申请
    INTEGRATED CIRCUIT WITH DIELECTRIC LAYER 有权
    集成电路与电介质层

    公开(公告)号：US20090057737A1

    公开(公告)日：2009-03-05

    申请号：US11850218

    申请日：2007-09-05

    申请人： Tim Boescke ,  Johannes Heitmann ,  Uwe Schroder

    发明人： Tim Boescke ,  Johannes Heitmann ,  Uwe Schroder

    IPC分类号： H01L29/76 ,  H01L21/00

    CPC分类号： H01L21/28291 ,  H01L27/10873 ,  H01L28/40 ,  H01L28/91 ,  H01L29/513 ,  H01L29/78

    摘要： A method of fabricating an integrated circuit with a dielectric layer on a substrate is disclosed. One embodiment provides forming the dielectric layer in an amorphous state on the substrate, the dielectric layer having a crystallization temperature; a doping the dielectric layer; a forming of a covering layer on the dielectric layer at a temperature being equal to or below the crystallization temperature; and a heating of the dielectric layer to a temperature being equal to or greater than the crystallization temperature.

    摘要翻译： 公开了一种在衬底上制造具有电介质层的集成电路的方法。 一个实施例提供在基底上形成非晶状态的电介质层，介电层具有结晶温度; 掺杂介电层; 在等于或低于结晶温度的温度下在电介质层上形成覆盖层; 以及将介电层加热至等于或大于结晶温度的温度。

    Zirconium oxide based capacitor and process to manufacture the same
    9.
    发明授权
    Zirconium oxide based capacitor and process to manufacture the same 有权
    基于氧化锆的电容器及其制造方法

    公开(公告)号：US07723771B2

    公开(公告)日：2010-05-25

    申请号：US11731457

    申请日：2007-03-30

    申请人： Tim Boescke ,  Uwe Schroeder

    发明人： Tim Boescke ,  Uwe Schroeder

    IPC分类号： H01L27/108

    CPC分类号： H01G4/1236 ,  H01G4/33 ,  H01L28/40 ,  Y10T29/417

    摘要： A capacitor structure comprises a first and a second electrode of conducting material. Between the first and second electrodes, an atomic layer deposited dielectric film is disposed, which comprises zirconium oxide and a dopant oxide. Herein, the dopant comprises an ionic radius that differs by more than 24 pm from an ionic radius of zirconium, while the dielectric film comprises a dopant content of 10 atomic percent or less of the dielectric film material excluding oxygen. A process for fabricating a capacitor comprises a step of forming a bottom electrode of the capacitor. On the bottom electrode, a dielectric film comprising zirconium oxide is deposited, and a step for introducing a dopant oxide into the dielectric film performed. On the dielectric structure, a top electrode is formed. The dopant comprises an ionic radius that differs by more than 24 pm from an ionic radius of zirconium, whereas the dielectric structure deposited comprises a dopant content of 10 atomic percent or less of the deposited material excluding oxygen.

    摘要翻译： 电容器结构包括导电材料的第一和第二电极。 在第一和第二电极之间，设置原子层沉积介电膜，其包括氧化锆和掺杂剂氧化物。 这里，掺杂剂包含从锆的离子半径相差大于24μm的离子半径，而电介质膜包含不含氧的电介质膜材料的10原子％以下的掺杂剂含量。 制造电容器的工艺包括形成电容器的底部电极的步骤。 在底部电极上沉​​积包含氧化锆的电介质膜，并且进行用于将掺杂剂氧化物引入电介质膜的步骤。 在电介质结构上，形成顶部电极。 掺杂剂包含距离锆的离子半径相差超过24μm的离子半径，而沉积的介电结构包括不含氧的沉积材料的10原子％以下的掺杂剂含量。

    Zirconium oxide based capacitor and process to manufacture the same
    10.
    发明申请
    Zirconium oxide based capacitor and process to manufacture the same 有权
    基于氧化锆的电容器及其制造方法

    公开(公告)号：US20080237791A1

    公开(公告)日：2008-10-02

    申请号：US11731457

    申请日：2007-03-30

    申请人： Tim Boescke ,  Uwe Schroeder

    发明人： Tim Boescke ,  Uwe Schroeder

    IPC分类号： H01L27/082 ,  B05D5/12 ,  H01G5/013 ,  H01G9/00

    CPC分类号： H01G4/1236 ,  H01G4/33 ,  H01L28/40 ,  Y10T29/417

    摘要： A capacitor structure comprises a first and a second electrode of conducting material. Between the first and second electrodes, an atomic layer deposited dielectric film is disposed, which comprises zirconium oxide and a dopant oxide. Herein, the dopant comprises an ionic radius that differs by more than 24 pm from an ionic radius of zirconium, while the dielectric film comprises a dopant content of 10 atomic percent or less of the dielectric film material excluding oxygen. A process for fabricating a capacitor comprises a step of forming a bottom electrode of the capacitor. On the bottom electrode, a dielectric film comprising zirconium oxide is deposited, and a step for introducing a dopant oxide into the dielectric film performed. On the dielectric structure, a top electrode is formed. The dopant comprises an ionic radius that differs by more than 24 pm from an ionic radius of zirconium, whereas the dielectric structure deposited comprises a dopant content of 10 atomic percent or less of the deposited material excluding oxygen.

    摘要翻译： 电容器结构包括导电材料的第一和第二电极。 在第一和第二电极之间，设置原子层沉积介电膜，其包括氧化锆和掺杂剂氧化物。 这里，掺杂剂包含从锆的离子半径相差大于24μm的离子半径，而电介质膜包含不含氧的电介质膜材料的10原子％以下的掺杂剂含量。 制造电容器的工艺包括形成电容器的底部电极的步骤。 在底部电极上沉​​积包含氧化锆的电介质膜，并且进行将掺杂剂氧化物引入电介质膜的步骤。 在电介质结构上，形成顶部电极。 掺杂剂包含距离锆的离子半径相差超过24μm的离子半径，而沉积的介电结构包括不含氧的沉积材料的10原子％以下的掺杂剂含量。