公开(公告)号：US08971014B2

公开(公告)日：2015-03-03

申请号：US12984731

申请日：2011-01-05

申请人： Wei-Chun Hua ,  Chung-Long Chang ,  Chun-Hung Chen ,  Chih-Ping Chao ,  Jye-Yen Cheng ,  Hua-Chou Tseng

发明人： Wei-Chun Hua ,  Chung-Long Chang ,  Chun-Hung Chen ,  Chih-Ping Chao ,  Jye-Yen Cheng ,  Hua-Chou Tseng

IPC分类号： H01G4/228 ,  H01L49/02 ,  H01L23/522

CPC分类号： H01G4/005 ,  H01L23/5223 ,  H01L28/60 ,  H01L2924/0002 ,  Y10T29/43 ,  H01L2924/00

摘要： A capacitor structure includes first and second sets of electrodes and a plurality of line plugs. The first set of electrodes has a first electrode and a second electrode formed in a first metallization layer among a plurality of metallization layers, wherein the first electrode and the second electrode are separated by an insulation material. The second set of electrodes has a third electrode and a fourth electrode formed in a second metallization layer among the plurality of metallization layers, wherein the third electrode and the fourth electrode are separated by the insulation material. The line plugs connect the second set of electrodes to the first set of electrodes.

摘要翻译： 电容器结构包括第一和第二组电极和多个线插头。 第一组电极具有形成在多个金属化层中的第一金属化层中的第一电极和第二电极，其中第一电极和第二电极被绝缘材料分开。 第二组电极具有形成在多个金属化层之间的第二金属化层中的第三电极和第四电极，其中第三电极和第四电极被绝缘材料隔开。 线插头将第二组电极连接到第一组电极。

公开(公告)号：US09620421B2

公开(公告)日：2017-04-11

申请号：US12948184

申请日：2010-11-17

申请人： Chien-Chih Ho ,  Chih-Ping Chao ,  Hua-Chou Tseng ,  Chun-Hung Chen ,  Chia-Yi Su ,  Alex Kalnitsky ,  Jye-Yen Cheng ,  Harry-Hak-Lay Chuang

发明人： Chien-Chih Ho ,  Chih-Ping Chao ,  Hua-Chou Tseng ,  Chun-Hung Chen ,  Chia-Yi Su ,  Alex Kalnitsky ,  Jye-Yen Cheng ,  Harry-Hak-Lay Chuang

IPC分类号： H01L21/8238 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/51 ,  H01L29/66

CPC分类号： H01L23/481 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76895 ,  H01L21/823425 ,  H01L21/823475 ,  H01L21/823842 ,  H01L21/823871 ,  H01L27/088 ,  H01L29/0653 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545

摘要： A method of forming an integrated circuit structure includes providing a gate strip in an inter-layer dielectric (ILD) layer. The gate strip comprises a metal gate electrode over a high-k gate dielectric. An electrical transmission structure is formed over the gate strip and a conductive strip is formed over the electrical transmission structure. The conductive strip has a width greater than a width of the gate strip. A contact plug is formed above the conductive strip and surrounded by an additional ILD layer.

公开(公告)号：US08765600B2

公开(公告)日：2014-07-01

申请号：US12913982

申请日：2010-10-28

申请人： Chung-Long Chang ,  Chih-Ping Chao ,  Chun-Hung Chen ,  Hua-Chao Tseng ,  Jye-Yen Cheng ,  Harry-Hak-Lay Chuang

发明人： Chung-Long Chang ,  Chih-Ping Chao ,  Chun-Hung Chen ,  Hua-Chao Tseng ,  Jye-Yen Cheng ,  Harry-Hak-Lay Chuang

IPC分类号： H01L21/4763 ,  H01L29/76

CPC分类号： H01L21/76838 ,  H01L21/76807 ,  H01L21/76816 ,  H01L23/485 ,  H01L23/53228 ,  H01L23/53242 ,  H01L23/53257 ,  H01L29/665 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device having a gate on a substrate with source/drain (S/D) regions adjacent to the gate. A first dielectric layer overlays the gate and the S/D regions, the first dielectric layer having first contact holes over the S/D regions with first contact plugs formed of a first material and the first contact plugs coupled to respective S/D regions. A second dielectric layer overlays the first dielectric layer and the first contact plugs. A second contact hole formed in the first and second dielectric layers is filled with a second contact plug formed of a second material. The second contact plug is coupled to the gate and interconnect structures formed in the second dielectric layer, the interconnect structures coupled to the first contact plugs. The second material is different from the first material, and the second material has an electrical resistance lower than that of the first material.

摘要翻译： 一种具有栅极的半导体器件，具有与栅极相邻的源极/漏极（S / D）区域的衬底。 第一介电层覆盖栅极和S / D区域，第一介电层在S / D区域上具有第一接触孔，第一接触插塞由第一材料形成，第一接触插塞连接到相应的S / D区域。 第二电介质层覆盖第一电介质层和第一接触插塞。 形成在第一和第二电介质层中的第二接触孔填充有由第二材料形成的第二接触插塞。 第二接触插塞耦合到形成在第二介电层中的栅极和互连结构，互连结构耦合到第一接触插塞。 第二材料与第一材料不同，第二材料的电阻低于第一材料的电阻。

公开(公告)号：US20080299723A1

公开(公告)日：2008-12-04

申请号：US11757763

申请日：2007-06-04

申请人： C. C. Wu ,  Chi-Feng Huang ,  Chun-Hung Chen ,  Chih-Ping Chao ,  John Chern

发明人： C. C. Wu ,  Chi-Feng Huang ,  Chun-Hung Chen ,  Chih-Ping Chao ,  John Chern

IPC分类号： H01L21/82

CPC分类号： H01L27/0629 ,  H01L29/7833

摘要： A method for forming a capacitor includes forming a dielectric layer over a substrate. A conductive layer is formed over the dielectric layer. Dopants are implanted through at least one of the dielectric layer and the conductive layer after forming the dielectric layer so as to form a conductive region under the dielectric layer, wherein the conductive layer is a top electrode of the capacitor and the conductive region is a bottom electrode of the capacitor.

摘要翻译： 形成电容器的方法包括在衬底上形成电介质层。 在电介质层上形成导电层。 在形成电介质层之后，通过介电层和导电层中的至少一个注入掺杂剂，以在电介质层下方形成导电区域，其中导电层是电容器的顶部电极，导电区域是底部 电容器的电极。

公开(公告)号：US07521330B2

公开(公告)日：2009-04-21

申请号：US11757763

申请日：2007-06-04

申请人： Chun Chieh Wu ,  Chi-Feng Huang ,  Chun-Hung Chen ,  Chih-Ping Chao ,  John Chern

发明人： Chun Chieh Wu ,  Chi-Feng Huang ,  Chun-Hung Chen ,  Chih-Ping Chao ,  John Chern

IPC分类号： H01L21/20

CPC分类号： H01L27/0629 ,  H01L29/7833

摘要： A method for forming a capacitor includes forming a dielectric layer over a substrate. A conductive layer is formed over the dielectric layer. Dopants are implanted through at least one of the dielectric layer and the conductive layer after forming the dielectric layer so as to form a conductive region under the dielectric layer, wherein the conductive layer is a top electrode of the capacitor and the conductive region is a bottom electrode of the capacitor.

摘要翻译： 形成电容器的方法包括在衬底上形成电介质层。 在电介质层上形成导电层。 在形成电介质层之后，通过介电层和导电层中的至少一个注入掺杂剂，以在电介质层下方形成导电区域，其中导电层是电容器的顶部电极，导电区域是底部 电容器的电极。

公开(公告)号：US09083326B2

公开(公告)日：2015-07-14

申请号：US13243279

申请日：2011-09-23

申请人： Chun-Hung Chen ,  Tzu-Chi Liu

发明人： Chun-Hung Chen ,  Tzu-Chi Liu

IPC分类号： G09G5/00 ,  H03K5/151

CPC分类号： H03K5/151

摘要： A signal transmitting circuit is provided for cutting off or outputting at least one driving signal for driving a designated light source. The signal transmitting circuit includes an input differential signaling driver, an output differential amplifier, and a fixed-voltage-level-difference supply device. The input differential signaling driver is for receiving a display signal, and outputting an inverting signal and a non-inverting signal according to the display signal. The output differential amplifier is for receiving the inverting signal and non-inverting signal and outputting or cutting off the driving signal according to the voltage-level difference between the inverting signal and the non-inverting signal. The fixed-voltage-level-difference supply device is for supplying a fixed-voltage-level difference to replace the inverting signal and the non-inverting signal received by the output differential amplifier; therefore the output of the output differential amplifier remains low voltage-level to cut off the output of light with a designated color.

摘要翻译： 提供信号发送电路，用于切断或输出用于驱动指定光源的至少一个驱动信号。 信号发送电路包括输入差分信号驱动器，输出差分放大器和固定电压电平差供给装置。 输入差分信号驱动器用于接收显示信号，并根据显示信号输出反相信号和非反相信号。 输出差分放大器用于接收反相信号和非反相信号，并根据反相信号和非反相信号之间的电压电平差输出或切断驱动信号。 固定电压电平差供给装置用于提供固定电压电平差，以代替由输出差分放大器接收的反相信号和非反相信号; 因此输出差分放大器的输出保持低电压电平，以切断指定颜色的光输出。

公开(公告)号：US08878555B2

公开(公告)日：2014-11-04

申请号：US13046780

申请日：2011-03-14

申请人： He-Wei Huang ,  Chun-Hung Chen ,  Chih-Yuan Chang

发明人： He-Wei Huang ,  Chun-Hung Chen ,  Chih-Yuan Chang

IPC分类号： G01R27/26 ,  H03K17/96 ,  G06F3/044

CPC分类号： G01R27/2605 ,  G06F3/044 ,  H03K17/962 ,  H03K2217/960725

摘要： A capacitance measurement device includes a charging control unit for charging a measured capacitor, a discharging control unit for discharging the measured capacitor, a first switch coupled to the measured capacitor and the charging control unit for controlling a connection between the measured capacitor and the charging control unit according to a first switching signal, a second switch coupled to the measured capacitor and the discharging control unit for controlling a connection between the measured capacitor and the discharging control unit according to a second switching signal, a first A/D converter coupled to the measured capacitor for converting a voltage signal on the measured capacitor into a first signal, and a duty cycle detecting circuit coupled to the measured capacitor for converting the voltage signal on the measured capacitor into a count value that represents the capacitance of the measured capacitor and outputting the count value to a processing unit.

摘要翻译： 电容测量装置包括用于对测量的电容器充电的充电控制单元，用于放电测量的电容器的放电控制单元，耦合到测量电容器的第一开关和用于控制测量的电容器与充电控制之间的连接的充电控制单元 根据第一切换信号的单元，耦合到测量的电容器的第二开关和放电控制单元，用于根据第二开关信号控制测量的电容器和放电控制单元之间的连接;第一A / D转换器， 测量电容器，用于将测量的电容器上的电压信号转换为第一信号;以及占空比检测电路，耦合到所测量的电容器，用于将测量的电容器上的电压信号转换成表示测量的电容器的电容的计数值，并输出 计数值到处理单元。

公开(公告)号：US08562619B2

公开(公告)日：2013-10-22

申请号：US12630078

申请日：2009-12-03

申请人： Chun-Jen Liao ,  Yang-Hwei Tsuang ,  Huang-Chien Liang ,  Chun-Hung Chen ,  Fon-Yih Tsuang ,  Yi-Jie Kuo

发明人： Chun-Jen Liao ,  Yang-Hwei Tsuang ,  Huang-Chien Liang ,  Chun-Hung Chen ,  Fon-Yih Tsuang ,  Yi-Jie Kuo

IPC分类号： A61B17/56 ,  A61F2/28

CPC分类号： A61B17/8822 ,  A61B17/8836 ,  A61L24/001 ,  A61L24/02 ,  A61L24/06 ,  A61L2430/02 ,  C08L67/04

摘要： A method for filling a bone defect in a subject in need thereof is disclosed. The method includes heating a bone cement composition at a first temperature where the bone cement composition is fluidic, and delivering an effective amount of the fluidic bone cement composition at a second temperature to the bone defect thereby filling the bone defect and allowing the fluidic bone cement composition to solidify, the second temperature being sufficiently high for maintaining the bone cement composition fluidic without causing thermal necrosis. Also disclosed are systems for carrying out the method.

摘要翻译： 公开了一种在有需要的受试者中填充骨缺损的方法。 该方法包括在骨水泥组合物为流体的第一温度下加热骨水泥组合物，并将有效量的第二温度下的流体骨粘固剂组合物输送到骨缺损，由此填充骨缺损并允许流体骨粘固剂 组合物固化，第二温度足够高以保持骨水泥组合物流体化而不引起热坏死。 还公开了用于执行该方法的系统。

公开(公告)号：US20120305403A1

公开(公告)日：2012-12-06

申请号：US13154420

申请日：2011-06-06

申请人： Chun-Ling Lin ,  Yen-Liang Lu ,  Chi-Mao Hsu ,  Chin-Fu Lin ,  Chun-Hung Chen ,  Tsun-Min Cheng ,  Meng-Hong Tsai

发明人： Chun-Ling Lin ,  Yen-Liang Lu ,  Chi-Mao Hsu ,  Chin-Fu Lin ,  Chun-Hung Chen ,  Tsun-Min Cheng ,  Meng-Hong Tsai

IPC分类号： C25D7/12 ,  C25D5/00

CPC分类号： C25D5/54 ,  C25D3/38 ,  C25D5/00 ,  C25D5/10 ,  C25D7/123 ,  H01L21/2885 ,  H01L21/76879

摘要： An electrical chemical plating process is provided. A semiconductor structure is provided in an electrical plating platform. A pre-electrical-plating step is performed wherein the pre-electrical-plating step is carried out under a fixed voltage environment and lasts for 0.2 to 0.5 seconds after the current is above the threshold current of the electrical plating platform. After the pre-electrical-plating step, a first electrical plating step is performed on the semiconductor structure.

摘要翻译： 提供电化学镀工艺。 半导体结构设置在电镀平台中。 进行预电镀步骤，其中预电镀步骤在固定电压环境下进行，并且在电流高于电镀平台的阈值电流之后持续0.2至0.5秒。 在预电镀步骤之后，对半导体结构进行第一电镀步骤。

公开(公告)号：US20100027722A1

公开(公告)日：2010-02-04

申请号：US12342051

申请日：2008-12-22

申请人： Chun-Hung Chen ,  Tsun-Tu Wang ,  Wing-Kai Tang

发明人： Chun-Hung Chen ,  Tsun-Tu Wang ,  Wing-Kai Tang

IPC分类号： H04L27/06

CPC分类号： H04L1/1854 ,  H04L5/0053

摘要： A wired signal receiving apparatus including a signal receiver, a signal peak detector, and a signal comparator is disclosed. The signal receiver includes an operation current detecting circuit for detecting an operation current. The signal receiver further receives a transmission signal. The signal peak detector receives the operation current, detects a peak thereof, and generates a peak current. The signal comparator compares a reference signal and the peak current to generate an output current for regulating the operation current.

摘要翻译： 公开了一种包括信号接收机，信号峰值检测器和信号比较器的有线信号接收装置。 信号接收机包括用于检测操作电流的操作电流检测电路。 信号接收机还接收发送信号。 信号峰值检测器接收工作电流，检测其峰值，并产生峰值电流。 信号比较器比较参考信号和峰值电流，以产生用于调节工作电流的输出电流。