摘要:
A method of forming a DRAM capacitor. A hemispherical grain structure is formed on the surface of the bottom electrode of the capacitor. By employing an additional annealing under a dopant contained ambient, the dopant is diffused into the hemispherical grain structure and distributed at the surface area of the hemispherical grain region.
摘要:
A copper-palladium alloy damascene technology applied to the ultra large scale integration (ULSI) circuits fabrication is disclosed. First, a TaN barrier is deposited over an oxide layer or in terms of the inter metal dielectric (IMD) layer. Then a copper-palladium seed is deposited over the TaN barrier. Furthermore, a copper-palladium gap-fill electroplating layer is electroplated over the dielectric oxide layer. Second, a copper-palladium annealing process is carried out. Then the copper-palladium electroplating surface is planarized by means of a chemical mechanical polishing (CMP) process. Third, the CoWP cap is self-aligned to the planarized copper-palladium alloy surface. Finally, a second IMD layer is deposited over the first IMD layer. Furthermore, a contact hole in the second dielectric layer over said CoWP cap layer is formed, and then the CoWP cap of the first IMD layer is connected with the copper-palladium alloy bottom surface of the second IMD layer directly. The other deposition processes are subsequently performed the same way.
摘要:
A method of forming bonding pad commences by forming a conformal barrier layer on a provided inter-metal dielectric layer. A first metal layer is formed on the barrier layer to partially fill the trench. A thin glue layer is formed on the first metal layer. A second metal layer is formed on the glue layer to fill the trench. The second metal layer, the glue layer, the first metal layer and the barrier layer are partially removed to expose the dielectric layer. A bonding pad structure is thus formed in the trench. The bonding pad structure comprises a first metal pad and a second metal pad.
摘要:
A method for forming an inter-metal dielectric layer without voids therein is described. Wiring lines are formed on a provided substrate. Each of the wiring lines comprises a protective layer thereon. A liner layer is formed over the substrate and over the wiring lines. A fluorinated silicate glass (FSG) layer is formed on the liner layer by using high density plasma chemical vapor deposition (HDPCVD). A thickness of the FSG layer is about 0.9-1 times a thickness of the wiring lines. A cap layer is formed on the FSG layer using HDPCVD. A thickness of the cap layer is about 0.2-0.3 times a thickness of the wiring lines. An oxide layer is formed on the cap layer to achieve a predetermined thickness. A part of the dielectric layer is removed to obtain a planarized surface.
摘要:
A method is described for manufacturing a multilevel metal interconnects. The method comprises the steps of providing a substrate and then forming a wire on the substrate. A dielectric layer is formed on the substrate and the wire and a protective layer is formed on the dielectric layer. An opening is formed by patterning the protective layer and the dielectric layer and a barrier layer is formed on the protective layer and in the opening. A copper layer is formed on the barrier layer and fills the opening. A portion of the copper layer and the barrier layer are removed by chemical-mechanical polishing.
摘要:
The present invention provides a method of forming an undoped silicate glass layer on a semiconductor wafer by performing a high density plasma chemical vapor deposition process. The semiconductor wafer being positioned in a deposition chamber. The method comprises forming the undoped silicate glass layer by performing the high density plasma chemical vapor deposition process in the deposition chamber under the following conditions: an argon (Ar) flow rate of 40 to 70 sccm (standard cubic centimeter per minute); an oxygen (O.sub.2) flow rate of 90 to 120 sccm; a silane flow rate of 70 to 100 sccm; a gas pressure of 3 to 10 mtorr; a temperature of 300 to 400.degree. C.; and a low frequency power of 2500 to 3500 watts. Wherein the ratio of Ar to O.sub.2 is 0.53, and O.sub.2 to silane is 1.23.
摘要:
An optical fiber connector includes a pair of optical fibers and a seat defining a pair of lenses at a front edge thereof and passageways aligned with the lenses respectively and receiving the optical fibers. The seat defines a pair of first apertures at a first surface thereof communicating with the passageways, and a pair of second aperture at a second surface thereof opposite to the first surface communicating with the passageways. Rear insides of the first apertures are aligned with front insides of the second apertures.
摘要:
A socket connector (100) comprises a socket body (5), a plurality of contacts (3) received in the socket body (5), a lid (1) movably mounted on the socket body (5) and moving up and down along a vertical direction, a moving plate (4) movably mounted upon the socket body (5) and moving along a horizontal direction and an operating lever (2) located between the lid (1) and the moving plate (4), the operating lever (2) comprises a press member (22), the press member (22) presses on the top surface of the moving plate (4) to prevent the floating of the moving plate (4) in the vertical direction.
摘要:
A memory device is disclosed that includes a plurality of word lines and a plurality of memory cells operating in one of a plurality of modes and coupled to at least one of the word lines. The memory device also includes a plurality of reference lines and reference cells. Each reference cell corresponds to one of the operating modes, supplies a reference current for the corresponding mode, and is coupled to at least one of the reference lines. A reference cell current from a reference cell can also be compared to a target range and, if outside the target range, the voltage level on a corresponding reference line can be adjusted accordingly such that the reference current falls within the target range (i.e., reference current trimming).
摘要:
An electrical connector (100) includes an insulative housing (2) defining a plurality of passageways (21) and a plurality of contacts (1) received in corresponding passageways. Each contact includes a moveable part (10) forming a pair of guiding beams (105), an immoveable part (20) coupled with the moveable part and a biasing device (30) constantly urging the moveable part away from immoveable part. The immoveable part includes a pair of posts (205) and defines a pair of guiding slots (207). The guiding beams are received in the guiding slots and are capable of moving with regard to the immovable part along opposite surfaces of the immoveable part. The guiding beams and the posts are decussated to surround the biasing device for preventing the biasing device from disengaging therefrom.