公开(公告)号：US20070264820A1

公开(公告)日：2007-11-15

申请号：US11434318

申请日：2006-05-15

申请人： Wuping Liu ,  Raymond Joy ,  Beichao Zhang ,  Liang Hsia ,  Boon Seah ,  Shyam Pal

发明人： Wuping Liu ,  Raymond Joy ,  Beichao Zhang ,  Liang Hsia ,  Boon Seah ,  Shyam Pal

IPC分类号： H01L21/4763

CPC分类号： H01L21/76802 ,  H01L21/02063 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76814

摘要： An embodiment of the invention shows a process to form a damascene opening preferably without hardmask overhang or dielectric layer undercut/void. The low-k dielectric material can be sandwiched in two hardmask films to form the dielectric film through which an interconnect opening is etched. A first example embodiment comprises the following. We form a lower interconnect and an insulating layer over a semiconductor structure. We form a first hardmask a dielectric layer, and a second hardmask layer, over the lower interconnect and insulating layer. We etch a first interconnect opening in the first hardmask, the dielectric layer and the second hardmask layer. Lastly, we form an interconnect in the first interconnect opening.

摘要翻译： 本发明的一个实施例示出了一种形成镶嵌开口的方法，优选地不具有硬掩模悬垂或电介质层底切/空隙。 低k电介质材料可以被夹在两个硬掩模膜中以形成蚀刻互连开口的电介质膜。 第一示例性实施例包括以下。 我们在半导体结构上形成下互连和绝缘层。 我们在下互连和绝缘层上形成第一硬掩模介电层和第二硬掩模层。 我们蚀刻第一硬掩模，电介质层和第二硬掩模层中的第一互连开口。 最后，我们在第一个互连开口中形成互连。

公开(公告)号：US07601607B2

公开(公告)日：2009-10-13

申请号：US11434318

申请日：2006-05-15

申请人： Wuping Liu ,  Raymond Joy ,  Beichao Zhang ,  Liang Choo Hsia ,  Boon Meng Seah ,  Shyam Pal

发明人： Wuping Liu ,  Raymond Joy ,  Beichao Zhang ,  Liang Choo Hsia ,  Boon Meng Seah ,  Shyam Pal

IPC分类号： H01L21/4763

CPC分类号： H01L21/76802 ,  H01L21/02063 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76814

摘要： An embodiment of the invention shows a process to form a damascene opening preferably without hardmask overhang or dielectric layer undercut/void. The low-k dielectric material can be sandwiched in two hardmask films to form the dielectric film through which an interconnect opening is etched. A first example embodiment comprises the following. We form a lower interconnect and an insulating layer over a semiconductor structure. We form a first hardmask a dielectric layer, and a second hardmask layer, over the lower interconnect and insulating layer. We etch a first interconnect opening in the first hardmask, the dielectric layer and the second hardmask layer. Lastly, we form an interconnect in the first interconnect opening.

摘要翻译： 本发明的一个实施例示出了一种形成镶嵌开口的方法，优选地不具有硬掩模悬垂或电介质层底切/空隙。 低k电介质材料可以被夹在两个硬掩模膜中以形成蚀刻互连开口的电介质膜。 第一示例性实施例包括以下。 我们在半导体结构上形成下互连和绝缘层。 我们在下互连和绝缘层上形成第一硬掩模介电层和第二硬掩模层。 我们蚀刻第一硬掩模，电介质层和第二硬掩模层中的第一互连开口。 最后，我们在第一个互连开口中形成互连。

公开(公告)号：US20050191851A1

公开(公告)日：2005-09-01

申请号：US11119274

申请日：2005-04-29

申请人： Wuping Liu ,  Beichao Zhang ,  Liang Hsia

发明人： Wuping Liu ,  Beichao Zhang ,  Liang Hsia

IPC分类号： H01L21/768 ,  H01L21/4763 ,  H01L21/44 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76849 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/7684 ,  H01L21/76865 ,  H01L21/76877

摘要： A new method is provided for the creation of damascene copper interconnects. A method is provided whereby created copper surfaces are capped with a layer of barrier material. With the cap structure of barrier material, the surface of the created copper interconnect is shielded against outside influences such as effects of processing chemicals. As a result of the creation of a cap of barrier material, conventional concerns of copper oxidation, copper back-sputtering and the like are eliminated.

摘要翻译： 提供了一种用于创建镶嵌铜互连的新方法。 提供了一种方法，由此产生的铜表面被一层屏障材料盖住。 通过阻挡材料的盖结构，所制造的铜互连的表面被屏蔽以防止诸如加工化学品的影响等外部影响。 作为阻挡材料盖的形成的结果，消除了铜氧化，铜背溅射等的常规问题。

公开(公告)号：US07323408B2

公开(公告)日：2008-01-29

申请号：US11299457

申请日：2005-12-12

申请人： Beichao Zhang ,  Wuping Liu ,  Liang-Choo Hsia

发明人： Beichao Zhang ,  Wuping Liu ,  Liang-Choo Hsia

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76865 ,  H01L21/76883 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A new method is provided for the creation of copper interconnects. A pattern of copper interconnects is created, a protective layer of semiconductor material is deposited over the surface of the created copper interconnects. The protective layer is patterned and etched, exposing the surface of the pattern of copper interconnects. The exposed copper surface is Ar sputtered after which a first barrier layer is deposited. The patterned and etched layer of protective material is removed, leaving in place overlying the pattern of copper interconnects a protective layer of first barrier material. A dielectric barrier layer, in the form of a layer of etch stop material, is deposited after which additional layers of dielectric interspersed with layers of etch stop material are deposited. Via and trench patterns are etched aligned with a copper pattern to which an electrical contact is to be established, the copper pattern being protected by the first layer of barrier material. A second barrier layer is deposited, the via and trench pattern is filled with copper after which excess copper is removed by polishing the surface of the deposited layer of copper.

摘要翻译： 提供了一种用于创建铜互连的新方法。 产生铜互连的图案，半导体材料的保护层沉积在所产生的铜互连的表面上。 保护层被图案化和蚀刻，暴露铜互连图案的表面。 暴露的铜表面是Ar溅射，之后沉积第一势垒层。 去除保护材料的图案化和蚀刻层，留在覆盖铜图案的位置使第一阻挡材料的保护层互连。 沉积了一层蚀刻停止材料形式的电介质阻挡层，之后沉积了分层的蚀刻停止材料层。 通孔和沟槽图案被蚀刻成与将要建立电接触的铜图案对齐，铜图案被第一层屏障材料保护。 沉积第二阻挡层，通孔和沟槽图案填充有铜，之后通过抛光沉积的铜层的表面去除多余的铜。

公开(公告)号：US07153766B2

公开(公告)日：2006-12-26

申请号：US10339188

申请日：2003-01-09

申请人： Beichao Zhang ,  Wuping Liu ,  Liang-Choo Hsia

发明人： Beichao Zhang ,  Wuping Liu ,  Liang-Choo Hsia

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76865 ,  H01L21/76883 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A new method is provided for the creation of copper interconnects. A pattern of copper interconnects is created, a protective layer of semiconductor material is deposited over the surface of the created copper interconnects. The protective layer is patterned and etched, exposing the surface of the pattern of copper interconnects. The exposed copper surface is Ar sputtered after which a first barrier layer is deposited. The patterned and etched layer of protective material is removed, leaving in place overlying the pattern of copper interconnects a protective layer of first barrier material. A dielectric barrier layer, in the form of a layer of etch stop material, is deposited after which additional layers of dielectric interspersed with layers of etch stop material are deposited. Via and trench patterns are etched aligned with a copper pattern to which an electrical contact is to be established, the copper pattern being protected by the first layer of barrier material. A second barrier layer is deposited, the via and trench pattern is filled with copper after which excess copper is removed by polishing the surface of the deposited layer of copper.

公开(公告)号：US20060088995A1

公开(公告)日：2006-04-27

申请号：US11299457

申请日：2005-12-12

申请人： Beichao Zhang ,  Wuping Liu ,  Liang-Choo Hsia

发明人： Beichao Zhang ,  Wuping Liu ,  Liang-Choo Hsia

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76865 ,  H01L21/76883 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A new method is provided for the creation of copper interconnects. A pattern of copper interconnects is created, a protective layer of semiconductor material is deposited over the surface of the created copper interconnects. The protective layer is patterned and etched, exposing the surface of the pattern of copper interconnects. The exposed copper surface is Ar sputtered after which a first barrier layer is deposited. The patterned and etched layer of protective material is removed, leaving in place overlying the pattern of copper interconnects a protective layer of first barrier material. A dielectric barrier layer, in the form of a layer of etch stop material, is deposited after which additional layers of dielectric interspersed with layers of etch stop material are deposited. Via and trench patterns are etched aligned with a copper pattern to which an electrical contact is to be established, the copper pattern being protected by the first layer of barrier material. A second barrier layer is deposited, the via and trench pattern is filled with copper after which excess copper is removed by polishing the surface of the deposited layer of copper.

摘要翻译： 提供了一种用于创建铜互连的新方法。 产生铜互连的图案，半导体材料的保护层沉积在所产生的铜互连的表面上。 保护层被图案化和蚀刻，暴露铜互连图案的表面。 暴露的铜表面是Ar溅射，之后沉积第一势垒层。 去除保护材料的图案化和蚀刻层，留在覆盖铜图案的位置使第一阻挡材料的保护层互连。 沉积了一层蚀刻停止材料形式的电介质阻挡层，之后沉积了分层的蚀刻停止材料层。 通孔和沟槽图案被蚀刻成与将要建立电接触的铜图案对齐，铜图案被第一层屏障材料保护。 沉积第二阻挡层，通孔和沟槽图案填充有铜，之后通过抛光沉积的铜层的表面去除多余的铜。

公开(公告)号：US20050093158A1

公开(公告)日：2005-05-05

申请号：US10697745

申请日：2003-10-30

申请人： Wuping Liu ,  Bei Zhang ,  Liang Hsia

发明人： Wuping Liu ,  Bei Zhang ,  Liang Hsia

IPC分类号： H01L21/4763 ,  H01L21/48 ,  H01L21/768 ,  H01L23/48 ,  H01L23/532 ,  H01L29/40

CPC分类号： H01L21/76814 ,  H01L21/4846 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76828 ,  H01L23/5329 ,  H01L2221/1026 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： In accordance with the objectives of the invention a new method is provided for the creation of an interconnect pattern. The invention provides for a layer of Photo-Active Dielectric (PAD) to be used for the insulation material in which the interconnect pattern is created, this without the use of an overlying exposure mask of photoresist.

摘要翻译： 根据本发明的目的，提供了一种用于创建互连图案的新方法。 本发明提供了一种用于产生互连图案的绝缘材料的光电介质（PAD）层，不需要使用光致抗蚀剂的上覆曝光掩模。

公开(公告)号：US20050127495A1

公开(公告)日：2005-06-16

申请号：US10734423

申请日：2003-12-12

申请人： Fan Zhang ,  Bei Zhang ,  Wuping Liu ,  Kho Chok ,  Liang Hsia ,  Tae Lee ,  Juan Tan ,  Xian Wang

发明人： Fan Zhang ,  Bei Zhang ,  Wuping Liu ,  Kho Chok ,  Liang Hsia ,  Tae Lee ,  Juan Tan ,  Xian Wang

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/04 ,  H01L21/4763

CPC分类号： H01L23/562 ,  H01L23/3178 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： In accordance with the objectives of the invention a new design and method for the implementation thereof is provided in the form of an “oxide ring”. A conventional die is provided with a guard ring or sealing ring, which surrounds and isolates the active surface area of an individual semiconductor die. The “oxide ring” of the invention surrounds the guard ring or sealing ring and forms in this manner a mechanical stress release buffer between the sawing paths of the die and the active surface area of the singulated individual semiconductor die.

摘要翻译： 根据本发明的目的，以“氧化物环”的形式提供了一种用于实施本发明的新设计和方法。 传统的模具设置有保护环或密封环，其围绕并隔离单个半导体管芯的有源表面积。 本发明的“氧化物环”围绕保护环或密封环，并以这种方式形成在管芯的锯切路径和单个化的半导体管芯的有源表面区域之间的机械应力释放缓冲器。

公开(公告)号：US20070134941A1

公开(公告)日：2007-06-14

申请号：US11297485

申请日：2005-12-08

申请人： Huang Liu ,  Bei Zhang ,  Wuping Liu ,  John Sudijono ,  Liang Hsia

发明人： Huang Liu ,  Bei Zhang ,  Wuping Liu ,  John Sudijono ,  Liang Hsia

IPC分类号： H01L21/469

CPC分类号： H01L21/31058 ,  B05D3/068 ,  H01J2237/04735 ,  H01J2237/3156 ,  H01L21/02112 ,  H01L21/02274 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/312 ,  H01L21/31633 ,  H01L21/76825 ,  H01L21/76834

摘要： An example embodiment is a method of curing a film over a semiconductor structure. We provide a semiconductor structure comprised of a substrate and an interconnect structure. We provide a film over the semiconductor structure. We provide an electron source, an anode grid between the electron source and the semiconductor structure. We cure the film by exposing the film to an electron beam from the electron source that passes through the anode grid. We control the electron beam by controlling the bias voltage between the anode grid and the semiconductor structure. Another embodiment is a tool for curing a film.

摘要翻译： 示例性实施例是在半导体结构上固化膜的方法。 我们提供由衬底和互连结构组成的半导体结构。 我们提供半导体结构的电影。 我们提供电子源，电子源和半导体结构之间的阳极栅极。 我们通过将膜暴露于电子源通过阳极栅格的电子束来固化膜。 我们通过控制阳极栅极和半导体结构之间的偏置电压来控制电子束。 另一个实施例是用于固化膜的工具。

公开(公告)号：US20060128156A1

公开(公告)日：2006-06-15

申请号：US11345890

申请日：2006-02-02

申请人： Wuping Liu ,  Bei Zhang ,  Liang Hsia

发明人： Wuping Liu ,  Bei Zhang ,  Liang Hsia

IPC分类号： H01B13/00 ,  H01L21/311 ,  B44C1/22 ,  C03C25/68

CPC分类号： H01L21/76814 ,  H01L21/4846 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76828 ,  H01L23/5329 ,  H01L2221/1026 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： In accordance with the objectives of the invention a new method is provided for the creation of an interconnect pattern. The invention provides for a layer of Photo-Active Dielectric (PAD) to be used for the insulation material in which the interconnect pattern is created, this without the use of an overlying exposure mask of photoresist.

摘要翻译： 根据本发明的目的，提供了一种用于创建互连图案的新方法。 本发明提供了一种用于产生互连图案的绝缘材料的光电介质（PAD）层，不需要使用光致抗蚀剂的上覆曝光掩模。