公开(公告)号：US20050135020A1

公开(公告)日：2005-06-23

申请号：US11060028

申请日：2005-02-16

申请人： Yasunari Sugita ,  Masayoshi Hiramoto ,  Nozomu Matsukawa ,  Mitsuo Satomi ,  Yoshio Kawashima ,  Akihiro Odagawa

发明人： Yasunari Sugita ,  Masayoshi Hiramoto ,  Nozomu Matsukawa ,  Mitsuo Satomi ,  Yoshio Kawashima ,  Akihiro Odagawa

IPC分类号： G01R33/09 ,  G11B5/39 ,  H01F10/14 ,  H01F10/16 ,  H01F10/32 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08 ,  H01L43/10 ,  G11B5/33 ,  G11B5/127

CPC分类号： H01L43/10 ,  B82Y10/00 ,  B82Y25/00 ,  G01R33/093 ,  G11B5/3903 ,  G11B5/3909 ,  G11B5/3916 ,  G11B2005/3996 ,  H01F10/3204 ,  H01F10/3231 ,  H01F10/3254 ,  H01F10/3268 ,  H01F10/3295 ,  Y10T428/115

摘要： The present invention provides a magnetoresistive (MR) element that is excellent in MR ratio and thermal stability and includes at least one magnetic layer including a ferromagnetic material M-X expressed by M100-aXa. Here, M is at least one selected from Fe, Co and Ni, X is expressed by X1bX2c,X3d (X1 is at least one selected from Cu, Ru, Rh, Pd, Ag, Os, Ir, Pt and Au, X2 is at least one selected from Al, Sc, Ti, V, Cr, Mn, Ga, Ge, Y, Zr, Nb, Mo, Hf, Ta, W, Re, Zn and lanthanide series elements, and X3 is at least one selected from Si, B, C, N, O, P and S), and a, b, c and d satisfy 0.05≦a≦60, 0≦b≦60, 0≦c≦30, 0≦d≦20, and a=b+c+d.

摘要翻译： 本发明提供了一种磁阻（MR）元件，它具有优异的MR比和热稳定性，并且包括至少一个包括由M 100-a X表示的铁磁材料MX的磁性层， / SUB>。 这里，M是选自Fe，Co和Ni中的至少一种，X由X 1表示，X 2， X 1，X 3是选自Cu，Ru，Rh，Pd，Ag，Os，Ir中的至少一种 ，Pt和Au，X 2是选自Al，Sc，Ti，V，Cr，Mn，Ga，Ge，Y，Zr，Nb，Mo，Hf，Ta，W中的至少一种， Re，Zn和镧系元素，X 3是选自Si，B，C，N，O，P和S中的至少一种），a，b，c和d满足0.05 < = a <= 60,0 <= b <= 60,0 <= c <= 30,0 <= d <= 20，a = b + c + d。

公开(公告)号：US06917492B2

公开(公告)日：2005-07-12

申请号：US10611224

申请日：2003-06-27

申请人： Nozomu Matsukawa ,  Masayoshi Hiramoto ,  Akihiro Odagawa ,  Yasunari Sugita ,  Mitsuo Satomi ,  Yoshio Kawashima

发明人： Nozomu Matsukawa ,  Masayoshi Hiramoto ,  Akihiro Odagawa ,  Yasunari Sugita ,  Mitsuo Satomi ,  Yoshio Kawashima

IPC分类号： G11B5/39 ,  H01F10/32 ,  H01F41/30 ,  H01L27/22 ,  H01L43/08 ,  H01L43/12 ,  G11B5/127

CPC分类号： H01L43/08 ,  B82Y10/00 ,  B82Y25/00 ,  B82Y40/00 ,  G11B5/3909 ,  G11B2005/3996 ,  H01F10/3254 ,  H01F41/307 ,  H01L27/224 ,  H01L27/228 ,  H01L43/12 ,  Y10T29/49034

摘要： A magnetoresistive element includes a pair of ferromagnetic layers and a non-magnetic layer arranged between the ferromagnetic layers. At least one of the ferromagnetic layers has a composition expressed by (MxLy)100-zRz at the interface with the non-magnetic layer. The non-magnetic layer includes at least one element selected from the group consisting of B, C, N, O, and P. Here, M is FeaCobNic, L is at least one element selected from the group consisting of Pt, Pd, Ir, and Rh, R is an element that has a lower free energy to form a compound with the element of the non-magnetic layer that is at least one selected from the group consisting of B, C, N, O, and P than does any other element included in the composition as M or L, and a, b, c, x, y, and z satisfy a+b+c=100, a≧30, x+y=100, 0

摘要翻译： 磁阻元件包括一对铁磁层和布置在铁磁层之间的非磁性层。 铁磁层中的至少一个具有由（M×××××××××××××××××××××××××××composition composition z SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB >在与非磁性层的界面处。 非磁性层包括选自B，C，N，O和P中的至少一种元素。这里，M是Fe L是选自Pt，Pd，Ir和Rh中的至少一种元素，R是具有较低自由能以与非金属元素形成化合物的元素， 磁性层是选自B，C，N，O和P中的至少一种，除了组合物中包含的任何其它元素为M或L，以及a，b，c，x，y和 z满足a + b + c = 100，a> = 30，x + y = 100,0

公开(公告)号：US06950333B2

公开(公告)日：2005-09-27

申请号：US10695731

申请日：2003-10-24

申请人： Masayoshi Hiramoto ,  Nozomu Matsukawa ,  Akihiro Odagawa ,  Mitsuo Satomi ,  Yasunari Sugita ,  Yoshio Kawashima

发明人： Masayoshi Hiramoto ,  Nozomu Matsukawa ,  Akihiro Odagawa ,  Mitsuo Satomi ,  Yasunari Sugita ,  Yoshio Kawashima

IPC分类号： G11C11/00 ,  G11C11/15 ,  G11C11/16 ,  G11C11/22 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22

CPC分类号： H01L27/224 ,  B82Y10/00 ,  G11C11/15 ,  G11C11/16 ,  G11C11/5607 ,  H01L27/228

摘要： A magnetic memory of the present invention includes two or more memory layers and two or more tunnel layers that are stacked in the thickness direction of the layers. The two or more memory layers are connected electrically in series. A group of first layers includes at least one layer selected from the two or more memory layers. A group of second layers includes at least one layer selected from the two or more memory layers. A resistance change caused by magnetization reversal in the group of first layers differs from a resistance change caused by magnetization reversal in the group of second layers.

摘要翻译： 本发明的磁存储器包括两层或多层存储层和两层或多层在层的厚度方向上层叠的隧道层。 两个或更多个存储器层串联电连接。 一组第一层包括从两个或更多个存储器层中选择的至少一个层。 一组第二层包括从两个或更多个存储器层中选择的至少一个层。 由第一层组中的磁化反转引起的电阻变化与由第二层组中的磁化反转引起的电阻变化不同。

公开(公告)号：US07079361B2

公开(公告)日：2006-07-18

申请号：US11060028

申请日：2005-02-16

申请人： Yasunari Sugita ,  Masayoshi Hiramoto ,  Nozomu Matsukawa ,  Mitsuo Satomi ,  Yoshio Kawashima ,  Akihiro Odagawa

发明人： Yasunari Sugita ,  Masayoshi Hiramoto ,  Nozomu Matsukawa ,  Mitsuo Satomi ,  Yoshio Kawashima ,  Akihiro Odagawa

IPC分类号： G11B5/127

CPC分类号： H01L43/10 ,  B82Y10/00 ,  B82Y25/00 ,  G01R33/093 ,  G11B5/3903 ,  G11B5/3909 ,  G11B5/3916 ,  G11B2005/3996 ,  H01F10/3204 ,  H01F10/3231 ,  H01F10/3254 ,  H01F10/3268 ,  H01F10/3295 ,  Y10T428/115

摘要： The present invention provides a magnetoresistive (MR) element that is excellent in MR ratio and thermal stability and includes at least one magnetic layer including a ferromagnetic material M-X expressed by M100-aXa. Here, M is at least one selected from Fe, Co and Ni, X is expressed by X1bX2cX3d (X1 is at least one selected from Cu, Ru, Rh, Pd, Ag, Os, Ir, Pt and Au, X2 is at least one selected from Al, Sc, Ti, V, Cr, Mn, Ga, Ge, Y, Zr, Nb, Mo, Hf, Ta, W, Re, Zn and lanthanide series elements, and X3 is at least one selected from Si, B, C, N, O, P and S), and a, b, c and d satisfy 0.05≦a≦60, 0≦b≦60, 0≦c≦30, 0≦d≦20, and a=b+c+d.

摘要翻译： 本发明提供了一种磁阻（MR）元件，它具有优异的MR比和热稳定性，并且包括至少一个包括由M 100-a X表示的铁磁材料MX的磁性层， / SUB>。 这里，M是选自Fe，Co和Ni中的至少一种，X由X 1表示，X 2， （X 1以上）选自Cu，Ru，Rh，Pd，Ag，Os，Ir中的至少一种， Pt和Au，X 2是选自Al，Sc，Ti，V，Cr，Mn，Ga，Ge，Y，Zr，Nb，Mo，Hf，Ta，W，Re中的至少一种 ，Zn和镧系元素，X 3是选自Si，B，C，N，O，P和S中的至少一种），a，b，c和d满足0.05 < a <= 60,0 <= b <= 60,0 <= c <= 30,0 <= d <= 20，a = b + c + d。

公开(公告)号：US06861940B2

公开(公告)日：2005-03-01

申请号：US10732053

申请日：2003-12-10

申请人： Nozomu Matsukawa ,  Akihiro Odagawa ,  Yasunari Sugita ,  Mitsuo Satomi ,  Yoshio Kawashima

发明人： Nozomu Matsukawa ,  Akihiro Odagawa ,  Yasunari Sugita ,  Mitsuo Satomi ,  Yoshio Kawashima

IPC分类号： G01R33/09 ,  H01F10/32 ,  H01C7/04

CPC分类号： H01L43/10 ,  B82Y25/00 ,  G01R33/093 ,  H01F10/324 ,  H01F10/3254 ,  H01F10/3268 ,  H01F10/3272

摘要： A magnetoresistive element of the present invention includes a multilayer structure that includes a non-magnetic layer (3) and a pair of ferromagnetic layers (1, 2) stacked on both sides of the non-magnetic layer (3). A resistance value differs depending on a relative angle between the magnetization directions of the ferromagnetic layers (1, 2) at the interfaces with the non-magnetic layer (3). The composition of at least one of the ferromagnetic layers (1, 2) in a range of 2 nm from the interface with the non-magnetic layer (3) is expressed by (MxOy)1-zZz, where Z is at least one element selected from the group consisting of Ru, Os, Rh, Ir, Pd, Pt, Cu, Ag, and Au, M is at least one element selected from the group consisting of elements other than Z and O and includes a ferromagnetic metal, and x, y, and z satisfy 0.33

摘要翻译： 本发明的磁阻元件包括层叠在非磁性层（3）的两侧的非磁性层（3）和一对铁磁体层（1,2）的多层结构体。 电阻值根据与非磁性层（3）的界面处的铁磁层（1,2）的磁化方向之间的相对角度而不同。 从与非磁性层（3）的界面在2nm范围内的铁磁层（1,2）中的至少一个的组成由（M×Oy）1-zZz表示，其中Z是至少一个元素 选自由Ru，Os，Rh，Ir，Pd，Pt，Cu，Ag和Au组成的组中的至少一种元素，M是选自Z和O以外的元素中的至少一种元素，并且包括铁磁性金属，以及 x，y和z满足0.33

公开(公告)号：US06943041B2

公开(公告)日：2005-09-13

申请号：US10719412

申请日：2003-11-21

申请人： Yasunari Sugita ,  Akihiro Odagawa ,  Nozomu Matsukawa ,  Yoshio Kawashima ,  Yasunori Morinaga

发明人： Yasunari Sugita ,  Akihiro Odagawa ,  Nozomu Matsukawa ,  Yoshio Kawashima ,  Yasunori Morinaga

IPC分类号： G01R33/09 ,  G11B5/39 ,  G11C11/16 ,  H01F10/32 ,  H01F41/30 ,  H01L27/22 ,  H01L43/08 ,  H01L43/12 ,  H01L21/00

CPC分类号： H01L27/228 ,  B82Y10/00 ,  B82Y25/00 ,  B82Y40/00 ,  G01R33/093 ,  G11B5/3903 ,  G11B5/3909 ,  G11B5/3916 ,  G11B2005/3996 ,  G11C11/16 ,  H01F10/3254 ,  H01F10/3268 ,  H01F41/302 ,  H01L43/08 ,  H01L43/12

摘要： The present invention provides a method for producing a magnetoresistive element including a tunnel insulating layer, and a first magnetic layer and a second magnetic layer that are laminated so as to sandwich the tunnel insulating layer, wherein a resistance value varies depending on a relative angle between magnetization directions of the first magnetic layer and the second magnetic layer. The method includes the steps of: (i) laminating a first magnetic layer, a third magnetic layer and an Al layer successively on a substrate; (ii) forming a tunnel insulating layer containing at least one compound selected from the group consisting of an oxide, nitride and oxynitride of Al by performing at least one reaction selected from the group consisting of oxidation, nitriding and oxynitriding of the Al layer; and (iii) forming a laminate including the first magnetic layer, the tunnel insulating layer and a second magnetic layer by laminating the second magnetic layer in such a manner that the tunnel insulating layer is sandwiched by the first magnetic layer and the second magnetic layer. The third magnetic layer has at least one crystal structure selected from the group consisting of a face-centered cubic crystal structure and a face-centered tetragonal crystal structure and is (111) oriented parallel to a film plane of the third magnetic layer. According to this production method, it is possible to produce a magnetoresistive element with excellent properties and thermal stability.

摘要翻译： 本发明提供了一种制造磁阻元件的方法，该磁阻元件包括隧道绝缘层，以及第一磁性层和第二磁性层，其被层压以夹住隧道绝缘层，其中电阻值根据相对角度而变化 第一磁性层和第二磁性层的磁化方向。 该方法包括以下步骤：（i）在衬底上依次层叠第一磁性层，第三磁性层和Al层; （ii）通过进行选自Al层的氧化，氮化和氮氧化的至少一种反应，形成包含至少一种选自Al的氧化物，氮化物和氮氧化物的化合物的隧道绝缘层; 以及（iii）通过层叠所述第二磁性层来形成包括所述第一磁性层，所述隧道绝缘层和第二磁性层的层压体，使得所述隧道绝缘层被所述第一磁性层和所述第二磁性层夹在中间。 第三磁性层具有至少一种选自面心立方晶体结构和面心四边形晶体结构的晶体结构，并且（111）取向为平行于第三磁性层的膜平面。 根据该制造方法，可以制造出具有优异性能和热稳定性的磁阻元件。

公开(公告)号：US06708390B2

公开(公告)日：2004-03-23

申请号：US10421989

申请日：2003-04-23

申请人： Yoshio Kawashima ,  Akihiro Odagawa ,  Nozomu Matsukawa ,  Yasunari Sugita ,  Yasunori Morinaga

发明人： Yoshio Kawashima ,  Akihiro Odagawa ,  Nozomu Matsukawa ,  Yasunari Sugita ,  Yasunori Morinaga

IPC分类号： G11B5127

CPC分类号： B82Y25/00 ,  B82Y10/00 ,  B82Y40/00 ,  G01R33/093 ,  G11B5/3903 ,  G11B5/3909 ,  G11B2005/3996 ,  H01F10/3254 ,  H01F10/3268 ,  H01F41/302 ,  Y10T29/49032 ,  Y10T29/49043 ,  Y10T29/49044

摘要： The present invention provides a magnetoresistive element that can suppress the characteristic degradation even after high-temperature heat treatment, specifically at 400° C. to 450° C. This element is manufactured by a method that includes the following processes in the indicated order: a film formation process for forming at least a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer on a substrate; a preheat process at 330° C. to 380° C. for not less than 60 minutes; and a heat treatment process at 400° C. to 450° C. This element has a resistance value that changes with a change in relative angle formed by the magnetization directions of the first ferromagnetic layer and the second ferromagnetic layer.

摘要翻译： 本发明提供即使在高温热处理后，特别是在400℃〜450℃也能够抑制特性劣化的磁阻元件。该元件通过以下顺序制造方法：以下述方式制造：a 用于在基板上形成至少第一铁磁层，第二铁磁层和非磁性层的成膜工艺; 在330℃至380℃下预热不少于60分钟; 以及在400℃至450℃的热处理过程。该元件具有随着由第一铁磁层和第二铁磁层的磁化方向形成的相对角度的变化而变化的电阻值。

公开(公告)号：US08481990B2

公开(公告)日：2013-07-09

申请号：US13375027

申请日：2011-03-07

申请人： Yoshio Kawashima ,  Takumi Mikawa ,  Yukio Hayakawa

发明人： Yoshio Kawashima ,  Takumi Mikawa ,  Yukio Hayakawa

IPC分类号： H01L47/00

CPC分类号： H01L45/146 ,  H01L27/2436 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/1675

摘要： A variable resistance nonvolatile memory element capable of suppressing a variation in resistance values is provided. A nonvolatile memory element according to the present invention includes: a silicon substrate (11); a lower electrode layer (102) formed on the silicon substrate (11); a variable resistance layer formed on the lower electrode layer (102); an upper electrode layer (104) formed on the variable resistance layer; a second interlayer insulating layer (19) formed to directly cover at least side surfaces of the lower electrode layer (102) and the variable resistance layer; a stress buffering region layer (105) for buffering a stress on the upper electrode layer (104), the stress buffering region layer being formed to directly cover at least an upper surface and side surfaces of the upper electrode layer (104) and comprising a material having a stress smaller than a stress of an insulating layer used as the second interlayer insulating layer (19); a second contact (16) extending to the upper electrode layer (104); and a wiring pattern (18) connected to the second contact (16).

摘要翻译： 提供了能够抑制电阻值变化的可变电阻非易失性存储元件。 根据本发明的非易失性存储元件包括：硅衬底（11）; 形成在所述硅衬底（11）上的下电极层（102）; 形成在所述下电极层（102）上的可变电阻层; 形成在所述可变电阻层上的上电极层（104） 形成为直接覆盖下电极层（102）和可变电阻层的至少侧面的第二层间绝缘层（19） 用于缓冲上电极层（104）上的应力的应力缓冲区层（105），所述应力缓冲区层形成为直接覆盖上电极层（104）的上表面和侧表面，并包括 具有小于用作第二层间绝缘层（19）的绝缘层的应力的应力的材料; 延伸到上电极层（104）的第二触点（16）; 以及连接到第二触点（16）的布线图案（18）。

公开(公告)号：US20130149815A1

公开(公告)日：2013-06-13

申请号：US13810465

申请日：2012-09-10

申请人： Hideaki Murase ,  Takumi Mikawa ,  Yoshio Kawashima ,  Atsushi Himeno

发明人： Hideaki Murase ,  Takumi Mikawa ,  Yoshio Kawashima ,  Atsushi Himeno

IPC分类号： H01L45/00

CPC分类号： H01L45/16 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1675

摘要： A method of manufacturing a nonvolatile memory element includes: forming a first conductive film above a substrate; forming, above the first conductive film, a first metal oxide layer and a second metal oxide layer having different degrees of oxygen deficiency and a second conductive film; forming a second electrode by patterning the second conductive film; forming a variable resistance layer by patterning the first metal oxide layer and the second metal oxide layer; removing a side portion of the variable resistance layer in a surface parallel to a main surface of the substrate to a position that is further inward than an edge of the second electrode; and forming a first electrode by patterning the first conductive film after or during the removing.

摘要翻译： 一种制造非易失性存储元件的方法包括：在衬底上形成第一导电膜; 在第一导电膜上方形成具有不同程度的氧缺陷的第一金属氧化物层和第二金属氧化物层和第二导电膜; 通过图案化第二导电膜形成第二电极; 通过图案化第一金属氧化物层和第二金属氧化物层来形成可变电阻层; 将平行于所述基板的主表面的表面中的所述可变电阻层的侧部移除到比所述第二电极的边缘更靠内侧的位置; 以及通过在去除之后或期间对第一导电膜进行图案化而形成第一电极。

公开(公告)号：US08394669B2

公开(公告)日：2013-03-12

申请号：US13128575

申请日：2010-07-12

申请人： Koji Arita ,  Takumi Mikawa ,  Atsushi Himeno ,  Yoshio Kawashima ,  Kenji Tominaga

发明人： Koji Arita ,  Takumi Mikawa ,  Atsushi Himeno ,  Yoshio Kawashima ,  Kenji Tominaga

IPC分类号： H01L21/02 ,  H01L45/00

CPC分类号： H01L27/2409 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1666 ,  H01L45/1675

摘要： A resistance variable element (100) used in a through-hole cross-point structure memory device, according to the present invention, and a resistance variable memory device including the resistance variable element, includes a substrate (7) and an interlayer insulating layer (3) formed on the substrate, and have a configuration in which a through-hole (4) is formed to penetrate the interlayer insulating layer, a first resistance variable layer (2) comprising transition metal oxide is formed outside the through-hole, a second resistance variable layer (5) comprising transition metal oxide is formed inside the through-hole, the first resistance variable layer is different in resistivity from the second resistance variable layer, and the first resistance variable layer and the second resistance variable layer are in contact with each other only in an opening (20) of the through-hole which is closer to the substrate.

摘要翻译： 在根据本发明的通孔交叉点结构存储装置中使用的电阻可变元件（100）和包括电阻可变元件的电阻变化存储装置包括基板（7）和层间绝缘层（ 3），并且具有形成贯通层间绝缘层的通孔（4）的构造，在通孔的外侧形成有包含过渡金属氧化物的第一电阻变化层（2）， 在通孔内形成有包含过渡金属氧化物的第二电阻变化层（5），第一电阻变化层的电阻率与第二电阻变化层不同，第一电阻变化层和第二电阻变化层接触 彼此仅在更靠近基板的通孔的开口（20）中。