公开(公告)号：US20090256159A1

公开(公告)日：2009-10-15

申请号：US12382955

申请日：2009-03-27

申请人： Yi-Chieh Lin ,  Cheng-Ta Kuo ,  Yu-Pin Hsu ,  Chi-Ming Tsai

发明人： Yi-Chieh Lin ,  Cheng-Ta Kuo ,  Yu-Pin Hsu ,  Chi-Ming Tsai

IPC分类号： H01L33/00 ,  H01L29/20

CPC分类号： H01L33/12 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02642 ,  H01L21/02647 ,  H01L33/007

摘要： This invention discloses a GaN semiconductor device comprising a substrate; a metal-rich nitride compound thin film on the substrate; a buffer layer formed on the metal-rich nitride compound thin film, and a semiconductor stack layer on the buffer layer wherein the metal-dominated nitride compound thin film covers a partial upper surface of the substrate. Because metal-rich nitride compound is amorphous, the epitaxial growth direction of the buffer layer grows upwards in the beginning and then turns laterally, and the epitaxy defects of the buffer layer also bend with the epitaxial growth direction of the buffer layer. Therefore, the probability of the epitaxial defects extending to the semiconductor stack layer is reduced and the reliability of the GaN semiconductor device is improved.

摘要翻译： 本发明公开了一种包括基板的GaN半导体器件; 在基板上形成富金属的氮化物化合物薄膜; 形成在富金属氮化物化合物薄膜上的缓冲层，以及缓冲层上的半导体堆叠层，其中金属主导的氮化物化合物薄膜覆盖基板的部分上表面。 因为富金属的氮化物是非晶体，所以缓冲层的外延生长方向在开始时向上生长然后横向变化，并且缓冲层的外延缺陷也随着缓冲层的外延生长方向而弯曲。 因此，延伸到半导体堆叠层的外延缺陷的概率降低，并且提高了GaN半导体器件的可靠性。

公开(公告)号：US08487317B2

公开(公告)日：2013-07-16

申请号：US12382955

申请日：2009-03-27

申请人： Yi-Chieh Lin ,  Cheng-Ta Kuo ,  Yu-Pin Hsu ,  Chi-Ming Tsai

发明人： Yi-Chieh Lin ,  Cheng-Ta Kuo ,  Yu-Pin Hsu ,  Chi-Ming Tsai

IPC分类号： H01L33/00 ,  H01L29/20

CPC分类号： H01L33/12 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02642 ,  H01L21/02647 ,  H01L33/007

摘要： This invention discloses a GaN semiconductor device comprising a substrate; a metal-rich nitride compound thin film on the substrate; a buffer layer formed on the metal-rich nitride compound thin film, and a semiconductor stack layer on the buffer layer wherein the metal-dominated nitride compound thin film covers a partial upper surface of the substrate. Because metal-rich nitride compound is amorphous, the epitaxial growth direction of the buffer layer grows upwards in the beginning and then turns laterally, and the epitaxy defects of the buffer layer also bend with the epitaxial growth direction of the buffer layer. Therefore, the probability of the epitaxial defects extending to the semiconductor stack layer is reduced and the reliability of the GaN semiconductor device is improved.

公开(公告)号：US07153713B2

公开(公告)日：2006-12-26

申请号：US11030790

申请日：2005-01-07

申请人： Wei-Chih Lai ,  Jinn-Kong Sheu ,  Chi-Ming Tsai ,  Cheng-Ta Kuo

发明人： Wei-Chih Lai ,  Jinn-Kong Sheu ,  Chi-Ming Tsai ,  Cheng-Ta Kuo

IPC分类号： H01L21/00

CPC分类号： H01L33/007 ,  H01L33/02 ,  H01L33/14 ,  H01L33/20

摘要： A method for manufacturing a high efficiency light-emitting diode (LED) is disclosed. In the method, a substrate is provided, in which an N-type buffer layer, an N-type cladding layer and an active layer are stacked on the substrate in sequence. A first P-type cladding layer is formed on the active layer. Next, a growth-interruption step is performed, and a catalyst is introduced to form a plurality of nuclei sites on a surface of the first P-type cladding layer. A second P-type cladding layer is formed on the first P-type cladding layer according to the nuclei sites, so that the second P-type cladding layer has a surface with a plurality of mesa hillocks. Then, a contact layer is formed on the second P-type cladding layer. Subsequently, a transparent electrode is formed on the contact layer.

摘要翻译： 公开了一种用于制造高效率发光二极管（LED）的方法。 在该方法中，提供了基板，其中N型缓冲层，N型覆层和有源层依次层叠在基板上。 在有源层上形成第一P型覆层。 接下来，进行生长中断步骤，并且引入催化剂以在第一P型包覆层的表面上形成多个核部位。 根据核部位在第一P型包层上形成第二P型包覆层，使得第二P型包覆层具有多个台面小丘的表面。 然后，在第二P型包覆层上形成接触层。 随后，在接触层上形成透明电极。

公开(公告)号：US20060094138A1

公开(公告)日：2006-05-04

申请号：US11030790

申请日：2005-01-07

申请人： Wei-Chih Lai ,  Jinn-Kong Sheu ,  Chi-Ming Tsai ,  Cheng-Ta Kuo

发明人： Wei-Chih Lai ,  Jinn-Kong Sheu ,  Chi-Ming Tsai ,  Cheng-Ta Kuo

IPC分类号： H01L21/00

CPC分类号： H01L33/007 ,  H01L33/02 ,  H01L33/14 ,  H01L33/20

摘要： A method for manufacturing a high efficiency light-emitting diode (LED) is disclosed. In the method, a substrate is provided, in which an N-type buffer layer, an N-type cladding layer and an active layer are stacked on the substrate in sequence. A first P-type cladding layer is formed on the active layer. Next, a growth-interruption step is performed, and a catalyst is introduced to form a plurality of nuclei sites on a surface of the first P-type cladding layer. A second P-type cladding layer is formed on the first P-type cladding layer according to the nuclei sites, so that the second P-type cladding layer has a surface with a plurality of mesa hillocks. Then, a contact layer is formed on the second P-type cladding layer. Subsequently, a transparent electrode is formed on the contact layer.

公开(公告)号：US08960411B2

公开(公告)日：2015-02-24

申请号：US13786244

申请日：2013-03-05

申请人： Chi-Ming Tsai ,  I-Chiang Yang

发明人： Chi-Ming Tsai ,  I-Chiang Yang

IPC分类号： B65G47/36 ,  A63F9/30

CPC分类号： B65G47/36 ,  A63F9/30 ,  G07F11/42

摘要： A vending machine is equipped with a dispensing device that includes a plate, a track, carriers, a work station, a driving unit and a sensor. The plate is horizontally placed in a vending machine. The track is connected to the plate. The carriers are movably connected to the track for carrying products. The work station causes a selected one of the carriers to release the corresponding one of the products. The driving unit drives the carriers along the track. The sensor senses the selected one of the carriers and accordingly stops the driving unit so that the selected one of the carriers is placed at the work station.

摘要翻译： 自动售货机配备有分配装置，其包括板，轨道，载体，工作站，驱动单元和传感器。 该板水平放置在自动售货机中。 轨道连接到板。 载体可移动地连接到用于承载产品的轨道。 工作站使选定的一个载体释放对应的一个产品。 驱动单元沿轨道驱动载体。 感测器感测所选择的一个载体，因此停止驱动单元，使得所选择的一个载体被放置在工作站。

公开(公告)号：US08657294B2

公开(公告)日：2014-02-25

申请号：US13449260

申请日：2012-04-17

申请人： Chi-Ming Tsai ,  I-Chiang Yang

发明人： Chi-Ming Tsai ,  I-Chiang Yang

IPC分类号： A63F7/22

CPC分类号： A63F9/0096 ,  A63F9/24 ,  A63F2009/2402

摘要： A lifting device for hammer game machine includes frame, a motor laterally mounted to a lower portion of the frame, a seat longitudinally mounted to an upper portion of the frame, a lifting unit partially received in and extending through the seat, a first bracket is secured on a lower end of the lifting device, a linkage assembly connected to the motor and a second bracket laterally mounted onto the linkage assembly through the frame. The first bracket and the second bracket are slidably relative to the frame and selectively connected to each other before being operated.

摘要翻译： 用于锤击游戏机的提升装置包括框架，横向安装到框架的下部的马达，纵向安装在框架上部的座椅，部分地容纳在座椅中并贯穿座椅的提升单元，第一托架 固定在提升装置的下端，连接到电动机的连杆组件和通过框架横向安装到连杆组件上的第二支架。 第一支架和第二支架相对于框架可滑动并且在操作之前彼此选择性地连接。

公开(公告)号：US07085698B2

公开(公告)日：2006-08-01

申请号：US10025414

申请日：2001-12-18

申请人： Chi-Ming Tsai ,  Shao-Po Wu

发明人： Chi-Ming Tsai ,  Shao-Po Wu

IPC分类号： G06F17/50

CPC分类号： G06F17/5081

摘要： A method of generating simulation reports regarding an integrated circuit layout is provided. The method can include providing a plurality of control points associated with the integrated circuit layout. A single simulation of the plurality of control points can be performed. Detailed information from the single simulation can be stored in a database. Desired information can then be extracted from the database to generate the simulation reports.

公开(公告)号：US20130256659A1

公开(公告)日：2013-10-03

申请号：US13436952

申请日：2012-04-01

申请人： Chi-Ming Tsai ,  Liang-Guang Chen ,  Han-Hsin Kuo ,  Fu-Ming Huang ,  Hao-Jen Liao ,  Ming-Chung Liang

发明人： Chi-Ming Tsai ,  Liang-Guang Chen ,  Han-Hsin Kuo ,  Fu-Ming Huang ,  Hao-Jen Liao ,  Ming-Chung Liang

IPC分类号： H01L23/58 ,  H01L21/66

CPC分类号： H01L22/12 ,  H01L21/7684 ,  H01L22/30 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present disclosure provides a semiconductor device. The semiconductor device includes a substrate and an interconnect structure disposed over the substrate. The interconnect structure includes a plurality of interconnect layers. One of the interconnect layers contains: a plurality of metal via slots and a bulk metal component disposed over the plurality of metal via slots. The present disclosure also provides a method. The method includes providing a wafer, and forming a first layer over the wafer. The method includes forming an interconnect structure over the first layer. The forming the interconnect structure includes forming a second interconnect layer over the first layer, and forming a third interconnect layer over the second interconnect layer. The second interconnect layer is formed to contain a plurality of metal via slots and a bulk metal component formed over the plurality of metal via slots. The third interconnect layer contains one or more metal trenches.

摘要翻译： 本发明提供一种半导体器件。 半导体器件包括衬底和布置在衬底上的互连结构。 互连结构包括多个互连层。 互连层中的一个包含：多个金属通孔插槽和设置在多个金属通孔上的体金属部件。 本公开还提供了一种方法。 该方法包括提供晶片，并在晶片上形成第一层。 该方法包括在第一层上形成互连结构。 形成互连结构包括在第一层上形成第二互连层，以及在第二互连层上形成第三互连层。 第二互连层形成为包含多个金属通孔槽和形成在多个金属通孔上的体金属部件。 第三互连层包含一个或多个金属沟槽。

公开(公告)号：US07653890B2

公开(公告)日：2010-01-26

申请号：US11096469

申请日：2005-04-01

申请人： Chi-Ming Tsai ,  Lai-Chee Man ,  Yao-Ting Wang ,  Fang-Cheng Chang

发明人： Chi-Ming Tsai ,  Lai-Chee Man ,  Yao-Ting Wang ,  Fang-Cheng Chang

IPC分类号： G06F17/50 ,  G06F9/455

CPC分类号： G03F1/36

摘要： A Wafer Image Modeling and Prediction System (“WIMAPS”) is described that includes systems and methods that generate and/or apply models of resolution enhancement techniques (“RET”) and printing processes in integrated circuit (“IC”) fabrication. The WIMAPS provides efficient processes for use by designers in predicting the RET and wafer printing process so as to allow designers to filter predict printed silicon contours prior to application of RET and printing processes to the circuit design.

摘要翻译： 描述了一种晶片图像建模和预测系统（“WIMAPS”），其包括在集成电路（“IC”）制造中生成和/或应用分辨率增强技术（“RET”）和印刷过程的模型的系统和方法。 WIMAPS提供了设计人员在预测RET和晶片印刷过程中使用的有效过程，以便设计人员可以在将RET和印刷工艺应用于电路设计之前过滤预测印刷硅轮廓。

公开(公告)号：US07131100B2

公开(公告)日：2006-10-31

申请号：US10316275

申请日：2002-12-10

申请人： Chin-Hsen Lin ,  Chi-Ming Tsai

发明人： Chin-Hsen Lin ,  Chi-Ming Tsai

IPC分类号： G06F17/50 ,  G06F9/00

CPC分类号： G03F1/36 ,  G06F17/5081 ,  G06F2217/12 ,  Y02P90/265

摘要： Features of a mask, when close enough to one another, can cause unwanted phantom images to print on an integrated circuit. Advantageously, potential locations of phantom images can be automatically identified from a mask layout. This technique can include creating perimeters or rings around features in the mask layout (in one case, after proximity correction). An overlap of perimeters/rings can be assigned a particular weight such that areas of greater overlap have a higher weight and areas of less overlap have a lower weight. If the weight of an overlap area exceeds a trigger weight, then an evaluation point can be added to the mask layout, thereby identifying that layout location as a potential location of a phantom image. After simulation of the mask layout, that layout location can be analyzed to determine if a phantom image would print.

摘要翻译： 掩模的特征，当彼此足够接近时，可能会导致不想要的幻像图像在集成电路上打印。 有利地，可以从掩模布局自动识别幻影图像的潜在位置。 这种技术可以包括围绕掩模布局中的特征创建周长或环（在一种情况下，在邻近校正之后）。 周长/环的重叠可以被赋予特定的重量，使得更大重叠的区域具有较高的重量并且具有较小重叠的区域具有较低的重量。 如果重叠区域的重量超过触发权重，则可以将评估点添加到掩模布局，从而将该布局位置识别为幻影图像的潜在位置。 在模拟面具布局之后，可以分析该布局位置以确定幻影图像是否打印。