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    METHODS TO OBTAIN LOW K DIELECTRIC BARRIER WITH SUPERIOR ETCH RESISTIVITY
    2.
    发明申请
    METHODS TO OBTAIN LOW K DIELECTRIC BARRIER WITH SUPERIOR ETCH RESISTIVITY 有权
    获得具有超级蚀刻电阻率的低K介电阻挡层的方法

    公开(公告)号：US20090093132A1

    公开(公告)日：2009-04-09

    申请号：US11869416

    申请日：2007-10-09

    申请人： HUIWEN XU ,  Yijun Liu ,  Li-Qun Xia ,  Derek R. Witty ,  Hichem M'Saad

    发明人： HUIWEN XU ,  Yijun Liu ,  Li-Qun Xia ,  Derek R. Witty ,  Hichem M'Saad

    IPC分类号： H01L21/31

    CPC分类号： H01L21/02205 ,  C23C16/22 ,  C23C16/505 ,  H01L21/02112 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02203 ,  H01L21/02274 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/3185

    摘要： The present invention generally provides a method for forming a dielectric barrier with lowered dielectric constant, improved etching resistivity and good barrier property. One embodiment provides a method for processing a semiconductor substrate comprising flowing a precursor to a processing chamber, wherein the precursor comprises silicon-carbon bonds and carbon-carbon bonds, and generating a low density plasma of the precursor in the processing chamber to form a dielectric barrier film having carbon-carbon bonds on the semiconductor substrate, wherein the at least a portion of carbon-carbon bonds in the precursor is preserved in the low density plasma and incorporated in the dielectric barrier film.

    摘要翻译： 本发明通常提供一种形成具有降低的介电常数，改进的蚀刻电阻率和良好的阻挡性能的介电阻挡层的方法。 一个实施例提供了一种用于处理半导体衬底的方法，包括将前体流入处理室，其中前体包含硅 - 碳键和碳 - 碳键，并在处理室中产生前体的低密度等离子体以形成电介质 在半导体衬底上具有碳 - 碳键的阻挡膜，其中前体中的至少一部分碳 - 碳键保存在低密度等离子体中并且并入介电阻挡膜中。

    Methods to obtain low k dielectric barrier with superior etch resistivity
    3.
    发明授权
    Methods to obtain low k dielectric barrier with superior etch resistivity 有权
    获得具有优异蚀刻电阻率的低k电介质阻挡层的方法

    公开(公告)号：US07964442B2

    公开(公告)日：2011-06-21

    申请号：US11869416

    申请日：2007-10-09

    申请人： Huiwen Xu ,  Yijun Liu ,  Li-Qun Xia ,  Derek R. Witty ,  Hichem M'Saad

    发明人： Huiwen Xu ,  Yijun Liu ,  Li-Qun Xia ,  Derek R. Witty ,  Hichem M'Saad

    IPC分类号： H01L51/40

    CPC分类号： H01L21/02205 ,  C23C16/22 ,  C23C16/505 ,  H01L21/02112 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02203 ,  H01L21/02274 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/3185

    摘要： The present invention generally provides a method for forming a dielectric barrier with lowered dielectric constant, improved etching resistivity and good barrier property. One embodiment provides a method for processing a semiconductor substrate comprising flowing a precursor to a processing chamber, wherein the precursor comprises silicon-carbon bonds and carbon-carbon bonds, and generating a low density plasma of the precursor in the processing chamber to form a dielectric barrier film having carbon-carbon bonds on the semiconductor substrate, wherein the at least a portion of carbon-carbon bonds in the precursor is preserved in the low density plasma and incorporated in the dielectric barrier film.

    摘要翻译： 本发明通常提供一种形成具有降低的介电常数，改进的蚀刻电阻率和良好的阻挡性能的介电阻挡层的方法。 一个实施例提供了一种用于处理半导体衬底的方法，包括将前体流入处理室，其中前体包含硅 - 碳键和碳 - 碳键，并在处理室中产生前体的低密度等离子体以形成电介质 在半导体衬底上具有碳 - 碳键的阻挡膜，其中前体中的至少一部分碳 - 碳键保存在低密度等离子体中并且并入介电阻挡膜中。

    In-situ oxide capping after CVD low k deposition
    9.
    发明授权
    In-situ oxide capping after CVD low k deposition 有权
    CVD低k沉积后的原位氧化物封盖

    公开(公告)号：US07112541B2

    公开(公告)日：2006-09-26

    申请号：US10840754

    申请日：2004-05-06

    申请人： Li-Qun Xia ,  Huiwen Xu ,  Derek R. Witty ,  Hichem M'Saad

    发明人： Li-Qun Xia ,  Huiwen Xu ,  Derek R. Witty ,  Hichem M'Saad

    IPC分类号： H01L21/469

    CPC分类号： H01L21/76826 ,  C23C16/401 ,  C23C16/45523 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02362 ,  H01L21/31633 ,  H01L21/76829

    摘要： A method of processing a substrate including depositing a low dielectric constant film comprising silicon, carbon, and oxygen on the substrate and depositing an oxide rich cap on the low dielectric constant film is provided. The low dielectric constant film is deposited from a gas mixture comprising an organosilicon compound and an oxidizing gas in the presence of RF power in a chamber. The RF power and a flow of the organosilicon compound and the oxidizing gas are continued in the chamber after the deposition of the low dielectric constant film at flow rates sufficient to deposit an oxide rich cap on the low dielectric constant film.

    摘要翻译： 提供一种处理衬底的方法，包括在衬底上沉积包含硅，碳和氧的低介电常数膜并在低介电常数膜上沉积氧化物富盖。 在室内存在RF功率的情况下，从包含有机硅化合物和氧化气体的气体混合物中沉积低介电常数膜。 在低介电常数薄膜以低于在低介电常数膜上沉积富含氧化物的盖子的流速下沉积后，室内继续进行RF功率和有机硅化合物和氧化气体的流动。

    Decreasing the etch rate of silicon nitride by carbon addition
    10.
    发明授权
    Decreasing the etch rate of silicon nitride by carbon addition 有权
    通过碳添加降低氮化硅的蚀刻速率

    公开(公告)号：US07501355B2

    公开(公告)日：2009-03-10

    申请号：US11478273

    申请日：2006-06-29

    申请人： Ritwik Bhatia ,  Li-Qun Xia ,  Chad Peterson ,  Hichem M'Saad

    发明人： Ritwik Bhatia ,  Li-Qun Xia ,  Chad Peterson ,  Hichem M'Saad

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/0332 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/3185 ,  H01L21/76825 ,  H01L21/76829

    摘要： Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon source compound, a silicon source compound, and a nitrogen source in the presence of RF power are provided. Also provided are methods of UV post-treating silicon nitride layers to provide silicon nitride hard masks. The carbon-doped silicon nitride layers and UV post-treated silicon nitride layers have desirable wet etch rates and dry etch rates for hard mask layers.

    摘要翻译： 提供了形成氮化硅硬掩模的方法。 氮化硅硬掩模包括碳掺杂的氮化硅层和未掺杂的氮化硅层。 提供了在RF功率存在下由包含碳源化合物，硅源化合物和氮源的混合物沉积的碳掺杂氮化硅层。 还提供了UV后处理氮化硅层以提供氮化硅硬掩模的方法。 碳掺杂的氮化硅层和UV后处理的氮化硅层对于硬掩模层具有期望的湿蚀刻速率和干蚀刻速率。