公开(公告)号：US07547558B2

公开(公告)日：2009-06-16

申请号：US10835311

申请日：2004-04-30

申请人： Yoichi Okita ,  Junichi Watanabe ,  Naoya Sashida

发明人： Yoichi Okita ,  Junichi Watanabe ,  Naoya Sashida

IPC分类号： H01L21/00

CPC分类号： H01L28/57 ,  H01L27/11507

摘要： An Al2O3 film for covering a ferroelectric capacitor is formed by a sputtering process. The thickness of the Al2O3 film is preferably optimized according to amount of remanent polarization and fatigue tolerance required for the ferroelectric capacitor, for example, 10 nm to 100 nm. Next, oxygen is supplied to a PZT film via the Al2O3 film by executing a heat treatment in an oxygen atmosphere. As a result, an oxygen deficit in the PZT film is made up for. At this time, evaporation of Pb in the PZT film is suppressed because of the Al2O3 film, and deterioration of the fatigue tolerance responsive to decrease of Pb amount is suppressed. Subsequently, another Al2O3 film is formed as a second protective film by the sputtering process for opposing the deterioration factor in later process. The thickness of the Al2O3 film is preferably the thickness which sufficiently protects the ferroelectric capacitor from the deterioration factor in later wiring process.

摘要翻译： 通过溅射法形成用于覆盖铁电电容器的Al 2 O 3膜。 Al 2 O 3膜的厚度优选根据强电介质电容器所需的剩余极化和耐疲劳性的量优化，例如10nm〜100nm。 接下来，通过在氧气氛中进行热处理，经由Al 2 O 3膜向PZT膜供给氧。 结果，PZT膜中的氧气缺乏。 此时，由于Al 2 O 3膜，PZT膜中的Pb的蒸发被抑制，并且抑制了响应于Pb量降低的疲劳强度的劣化。 随后，通过用于与稍后的工艺中的劣化因子相对的溅射工艺，形成另一Al 2 O 3膜作为第二保护膜。 Al 2 O 3膜的厚度优选是在稍后的布线处理中充分保护铁电体的劣化因子的厚度。

公开(公告)号：US20050136554A1

公开(公告)日：2005-06-23

申请号：US10835311

申请日：2004-04-30

申请人： Yoichi Okita ,  Junichi Watanabe ,  Naoya Sashida

发明人： Yoichi Okita ,  Junichi Watanabe ,  Naoya Sashida

IPC分类号： H01L27/105 ,  H01L21/00 ,  H01L21/02 ,  H01L21/326 ,  H01L21/479 ,  H01L21/82 ,  H01L21/8246

CPC分类号： H01L28/57 ,  H01L27/11507

摘要： An Al2O3 film for covering a ferroelectric capacitor is formed by a sputtering process. The thickness of the Al2O3 film is preferably optimized according to amount of remanent polarization and fatigue tolerance required for the ferroelectric capacitor, for example, 10 nm to 100 nm. Next, oxygen is supplied to a PZT film via the Al203 film by executing a heat treatment in an oxygen atmosphere. As a result, an oxygen deficit in the PZT film is made up for. At this time, evaporation of Pb in the PZT film is suppressed because of the Al2O3 film, and deterioration of the fatigue tolerance responsive to decrease of Pb amount is suppressed. Subsequently, another Al2O3 film is formed as a second protective film by the sputtering process for opposing the deterioration factor in later process. The thickness of the Al2O3 film is preferably the thickness which sufficiently protects the ferroelectric capacitor from the deterioration factor in later wiring process.

摘要翻译： 通过溅射法形成用于覆盖铁电电容器的Al 2 O 3 N 3膜。 Al 2 O 3膜的厚度优选根据强电介质电容器所需的剩余极化和耐疲劳性的量优化，例如10nm至100nm。 接着，通过在氧气氛中进行热处理，通过Al 2 O 3膜将氧气供给到PZT膜。 结果，PZT膜中的氧气缺乏。 此时，由于Al 2 O 3 O 3膜，PZT膜中的Pb的蒸发被抑制，并且抑制了响应于Pb量降低的疲劳强度的劣化 。 随后，通过溅射工艺形成另一个Al 2 O 3 3膜作为第二保护膜，用于与稍后的工艺中的劣化因子相反。 Al 2 O 3膜的厚度优选是在稍后的布线工艺中充分保护铁电电容器免受劣化因素的厚度。

公开(公告)号：US08558294B2

公开(公告)日：2013-10-15

申请号：US12126357

申请日：2008-05-23

申请人： Naoya Sashida

发明人： Naoya Sashida

IPC分类号： H01L27/105

CPC分类号： H01L27/11507 ,  H01L28/57

摘要： A semiconductor device includes a semiconductor substrate formed with an active element, an oxidation resistant film formed over the semiconductor substrate so as to cover the active element, a ferroelectric capacitor formed over the oxidation resistance film, the ferroelectric capacitor having a construction of consecutively stacking a lower electrode, a ferroelectric film and an upper electrode, and an interlayer insulation film formed over the oxidation resistance film so as to cover the ferroelectric capacitor, wherein there are formed, in the interlayer insulation film, a first via-plug in a first contact hole exposing the first electrode and a second via-plug in a second contact hole exposing the lower electrode, and wherein there is formed another conductive plug in the interlayer insulation film in an opening exposing the oxidation resistant film.

摘要翻译： 半导体器件包括形成有活性元件的半导体衬底，形成在半导体衬底上以覆盖有源元件的抗氧化膜，在抗氧化膜上形成的铁电电容器，具有连续层叠结构的铁电电容器 下电极，铁电体膜和上电极，以及层间绝缘膜，形成在所述抗氧化膜上以覆盖所述铁电电容器，其中在所述层间绝缘膜中形成有第一触点中的第一通孔 在暴露下电极的第二接触孔中露出第一电极和第二通孔的孔，并且其中在暴露抗氧化膜的开口中在层间绝缘膜中形成另一个导电插塞。

公开(公告)号：US07790476B2

公开(公告)日：2010-09-07

申请号：US12061408

申请日：2008-04-02

申请人： Naoya Sashida

发明人： Naoya Sashida

IPC分类号： H01L21/00

CPC分类号： H01L27/11507 ,  H01L21/76826 ,  H01L21/7687 ,  H01L28/56 ,  H01L28/57

摘要： A method for fabricating a ferroelectric memory device, including terminating a surface of the interlayer insulation film and a surface of the contact plug with an OH group; forming a layer containing Si, oxygen and a CH group on the surface of the interlayer insulation film and the contact hole terminated with the OH group by coating a Si compound containing a Si atom and a CH group in a molecule thereof; converting the layer containing Si, oxygen and the CH group to a layer containing nitrogen at a surface thereof, by substituting the CH group in the layer containing Si, oxygen and the CH group at least at a surface part thereof with nitrogen atoms; and forming a layer showing self-orientation on the surface containing nitrogen.

摘要翻译： 一种用于制造铁电存储器件的方法，包括用OH基终止层间绝缘膜的表面和接触插塞的表面; 通过在其分子中涂覆含有Si原子和CH基团的Si化合物，在层间绝缘膜的表面上形成含有Si，氧和CH基团的层和通过OH基终止的接触孔; 通过在含有Si，氧和CH基团的层中至少在其表面部分用氮原子代替CH基团，将含有Si，氧和CH基团的层转化成含氮表面的层; 并在含氮表面上形成显示自身取向的层。

公开(公告)号：US07598557B2

公开(公告)日：2009-10-06

申请号：US11051643

申请日：2005-01-27

申请人： Kouichi Nagai ,  Hideaki Kikuchi ,  Naoya Sashida ,  Yasutaka Ozaki

发明人： Kouichi Nagai ,  Hideaki Kikuchi ,  Naoya Sashida ,  Yasutaka Ozaki

IPC分类号： H01L27/108

CPC分类号： H01L27/11502 ,  H01L21/02063 ,  H01L27/0688 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/57

摘要： The semiconductor device comprises a first insulation film 26 formed over a semiconductor substrate 10, first conductor plug 32 buried in a first contact hole 28a formed down to a source/drain diffused layer 22, a capacitor 44 formed over the first insulation film 26, a first hydrogen diffusion preventing film 48 formed over the first insulation film 26, covering the capacitor 44, a second insulation film 50 formed over the first hydrogen diffusion preventing film and having the surface planarized, a second hydrogen diffusion preventing film 52 formed over the first hydrogen diffusion preventing film 26 and having the surface planarized, a second hydrogen diffusion preventing film 52 formed over the second insulation film 50, second conductor plug 62 buried in a second contact hole 56 formed down to the lower electrode 38 or the upper electrode 42 of the capacitor 44, a third conductor plug 62 buried in a third contact hole 58 formed down to the first conductor plug 32, and an interconnection 64 connected to the second conductor plug 62 or the third conductor plug 62.

摘要翻译： 半导体器件包括形成在半导体衬底10上的第一绝缘膜26，埋在第一接触孔28a中的第一导体插塞32，第一接触孔28a形成在源极/漏极扩散层22上，形成在第一绝缘膜26上的电容器44 在第一绝缘膜26上形成的覆盖电容器44的第一氢扩散防止膜48，形成在第一氢扩散防止膜上并具有表面平坦化的第二绝缘膜50，形成在第一氢上的第二氢扩散防止膜52 具有表面平坦化的扩散防止膜26，形成在第二绝缘膜50上的第二氢扩散防止膜52，埋在第二接触孔56中的第二导体插塞62，第二接触孔56形成在下电极38或下电极38的上电极42 电容器44，埋在第一接触孔58中的第三导体插头62，并形成在第一导体插塞32的下方 连接到第二导体插头62或第三导体插头62的部分64。

公开(公告)号：US20090127657A1

公开(公告)日：2009-05-21

申请号：US12314041

申请日：2008-12-03

申请人： Naoya Sashida

发明人： Naoya Sashida

IPC分类号： H01L29/92

CPC分类号： H01L27/11502 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02197 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02356 ,  H01L21/31612 ,  H01L27/105 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/40 ,  H01L28/55 ,  H01L28/65 ,  Y10S438/901

摘要： There is provided a semiconductor device which comprises a first interlayer insulating film (first insulating film) formed over a silicon (semiconductor) substrate, a capacitor formed on the first interlayer insulating film and having a lower electrode, a dielectric film, and an upper electrode, a fourth interlayer insulating film (second insulating film) formed over the capacitor and the first interlayer insulating film, and a metal pattern formed on the fourth interlayer insulating film over the capacitor and its periphery to have a stress in an opposite direction to the fourth interlayer insulating film. As a result, characteristics of the capacitor covered with the interlayer insulating film can be improved.

公开(公告)号：US07528432B2

公开(公告)日：2009-05-05

申请号：US10697944

申请日：2003-10-31

申请人： Naoya Sashida

发明人： Naoya Sashida

IPC分类号： H01L29/72

CPC分类号： H01L27/11502 ,  H01L21/31612 ,  H01L21/3162 ,  H01L27/0629 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/57

摘要： There is provided a semiconductor device manufacturing method which comprises the steps of forming a first insulating film over a silicon substrate (semiconductor substrate), forming a lower electrode, a dielectric film, and an upper electrode of a capacitor on the first insulating film, forming a first capacitor protection insulating film for covering at least the dielectric film and the upper electrode, forming a second capacitor protection insulating film, which covers the first capacitor protection insulating film, by a chemical vapor deposition method in a state that a bias voltage is not applied to the silicon substrate, and forming a second insulating film on the second capacitor protection insulating film by the chemical vapor deposition method in a state that the bias voltage is applied to the silicon substrate.

摘要翻译： 提供了一种半导体器件制造方法，其包括在第一绝缘膜上在硅衬底（半导体衬底）上形成第一绝缘膜，形成下电极，电介质膜和电容器的上电极的步骤，形成 用于至少覆盖电介质膜和上电极的第一电容器保护绝缘膜，通过化学气相沉积法在偏压不是的状态下形成覆盖第一电容器保护绝缘膜的第二电容器保护绝缘膜 施加到硅衬底，并且在施加偏置电压至硅衬底的状态下，通过化学气相沉积法在第二电容器保护绝缘膜上形成第二绝缘膜。

公开(公告)号：US07456454B2

公开(公告)日：2008-11-25

申请号：US10096864

申请日：2002-03-14

申请人： Naoya Sashida

发明人： Naoya Sashida

IPC分类号： H01L31/113

CPC分类号： H01L21/7687 ,  H01L21/76877 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/60

摘要： According to the present invention, contact plugs are formed by a CVD method without deteriorating the properties of the ferroelectric capacitor in a semiconductor device having a fine ferroelectric capacitor. Adhesive film is formed in a contact hole, which exposes an upper electrode of the ferroelectric capacitor after conducting heat treatment in an oxidizing atmosphere, and a W layer is deposited by the CVD method using such TiN adhesive film as a hydrogen barrier and the contact hole is filled.

摘要翻译： 根据本发明，通过CVD方法形成接触插塞，而不会劣化具有精细铁电电容器的半导体器件中的强电介质电容器的特性。 在接触孔中形成粘合膜，该接触孔在氧化气氛中进行热处理后露出强电介质电容器的上部电极，并且通过使用这种TiN粘合膜作为氢气阻挡层的CVD法沉积W层，并且接触孔 充满。

公开(公告)号：US20080224194A1

公开(公告)日：2008-09-18

申请号：US12126357

申请日：2008-05-23

申请人： Naoya Sashida

发明人： Naoya Sashida

IPC分类号： H01L43/00 ,  H01L43/12

CPC分类号： H01L27/11507 ,  H01L28/57

摘要： A semiconductor device includes a semiconductor substrate formed with an active element, an oxidation resistant film formed over the semiconductor substrate so as to cover the active element, a ferroelectric capacitor formed over the oxidation resistance film, the ferroelectric capacitor having a construction of consecutively stacking a lower electrode, a ferroelectric film and an upper electrode, and an interlayer insulation film formed over the oxidation resistance film so as to cover the ferroelectric capacitor, wherein there are formed, in the interlayer insulation film, a first via-plug in a first contact hole exposing the first electrode and a second via-plug in a second contact hole exposing the lower electrode, and wherein there is formed another conductive plug in the interlayer insulation film in an opening exposing the oxidation resistant film.

摘要翻译： 半导体器件包括形成有活性元件的半导体衬底，形成在半导体衬底上以覆盖有源元件的抗氧化膜，在抗氧化膜上形成的铁电电容器，具有连续层叠结构的铁电电容器 下电极，铁电体膜和上电极，以及层间绝缘膜，形成在所述抗氧化膜上以覆盖所述铁电电容器，其中在所述层间绝缘膜中形成有第一触点中的第一通孔 在暴露下电极的第二接触孔中露出第一电极和第二通孔的孔，并且其中在暴露抗氧化膜的开口中在层间绝缘膜中形成另一个导电插塞。

公开(公告)号：US20070032015A1

公开(公告)日：2007-02-08

申请号：US11326187

申请日：2006-01-06

申请人： Akio Itoh ,  Naoya Sashida

发明人： Akio Itoh ,  Naoya Sashida

IPC分类号： H01L21/8242 ,  H01L21/44

CPC分类号： H01L27/11507 ,  H01L21/76816 ,  H01L21/76832 ,  H01L21/7684 ,  H01L23/544 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11509 ,  H01L28/57 ,  H01L28/65 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

摘要： To provide a semiconductor device capable of improving accuracy in finishing a hole in which a conductive plug right under a capacitor, and a manufacturing method of such a semiconductor device comprising the following steps: a step of forming first and second conductive plugs 32a, 32b in first and second holes 11a, 11b in a first insulating film 11; a step of forming a first opening 14a in an oxidation preventing insulating film 14; a step of forming an auxiliary conductive plug 36a in the first opening 14a; a step of forming a capacitor Q on the auxiliary conductive plug 36a; a step of forming third and fourth holes 41a, 41b in a second insulating film 41 covering the capacitor Q; a step of forming the second opening 14b in the oxidation preventing insulating film 14 under the fourth hole 41b; a step of forming a third conductive plug 47a in the third hole 41a; and a step of forming a fourth conductive plug 47b in the third hole 41a.

摘要翻译： 为了提供能够提高电容器正下方的导电插塞的精加工精度的半导体装置及其制造方法，包括以下步骤：形成第一和第二导电塞32a，32的步骤 b在第一绝缘膜11中的第一和第二孔11a，11b中; 在防氧化绝缘膜14中形成第一开口14a的步骤; 在第一开口14a中形成辅助导电塞36a的步骤; 在辅助导电塞36a上形成电容器Q的步骤; 在覆盖电容器Q的第二绝缘膜41中形成第三和第四孔41a，41b的步骤; 在第四孔41b的下方的防氧化绝缘膜14中形成第二开口部14b的工序; 在第三孔41a中形成第三导电塞47a的步骤; 以及在第三孔41a中形成第四导电插塞47b的步骤。