公开(公告)号：US5040880A

公开(公告)日：1991-08-20

申请号：US409590

申请日：1989-09-15

申请人： Yoshifumi Morimoto ,  Junji Tanaka ,  Eiji Tanaka

发明人： Yoshifumi Morimoto ,  Junji Tanaka ,  Eiji Tanaka

IPC分类号： C03C27/06 ,  G02B1/02 ,  G02B5/20

CPC分类号： C03C27/06 ,  G02B1/02 ,  G02B5/20

摘要： By forming corner parts of transparent quartz plates and the glass plate in rounded arc shape, in a mirror-surface finishing to accurate plane, polishing powder grain can flow out smoothly and evenly from all the periphery of the plates, and thus the surfaces of those component plates are finished to accurate plate of mirror-surfaces, without making a recessed part at their central parts which has been observed in the conventional plates of rectangular form, and hence, a quartz optical filter made by laminating the improved plates having accurate planes attains an excellent performance characteristic which does not give any degradation in light propagation.

摘要翻译： 通过将透明石英板和玻璃板的角部形成为圆弧形，在镜面精加工到精确的平面上，抛光粉粒可以从板的所有周边平滑均匀地流出，因此，这些表面 组件板被精加工成精确的镜面平板，而在常规的矩形形状的板中未观察到它们的中心部分处形成凹陷部分，因此通过层压具有精确平面的改进板制成的石英滤光器达到 优异的性能特性，不会导致光传播中的任何劣化。

公开(公告)号：US20120275099A1

公开(公告)日：2012-11-01

申请号：US13512310

申请日：2010-11-26

申请人： Takashi Yamami ,  Junji Tanaka ,  Akito Iwai

发明人： Takashi Yamami ,  Junji Tanaka ,  Akito Iwai

IPC分类号： H05K7/00

CPC分类号： H04M1/0208 ,  H04M1/0216 ,  H04M1/0247 ,  H04M1/0277

摘要： A portable electronic device in which a pair of housings are coupled and movable between a fully closed state and a fully open state, and electronic components contained in first and second housings are connected by using a flexible lead, the portable electronic device being able to accommodate a bending displacement of the flexible lead in association with relative movement of both housings without providing a large space inside the device. The portable electronic device includes a coupling arm which couples the first and second housing so as to be relatively movable between a fully closed state and a fully open state; a flexible lead includes a belt-like lead portion extending through the inside of the coupling arm; and the coupling arm is formed with a lead accommodating portion for tolerating a bending deformation of the lead portion in association with opening and closing of both the housings.

摘要翻译： 一种便携式电子设备，其中一对壳体在完全关闭状态和完全打开状态之间联接并可移动，并且包含在第一和第二壳体中的电子部件通过使用柔性引线连接，便携式电子设备能够容纳 与两个壳体的相对移动相关联的柔性引线的弯曲位移，而不在该装置内部提供大的空间。 便携式电子设备包括联接臂，其联接第一和第二壳体，以便在完全关闭状态和完全打开状态之间相对移动; 柔性引线包括延伸穿过联接臂内部的带状引线部分; 并且联接臂形成有用于相对于两个壳体的打开和关闭而允许引线部分的弯曲变形的引线容纳部分。

公开(公告)号：US07859096B2

公开(公告)日：2010-12-28

申请号：US12624117

申请日：2009-11-23

申请人： Masanori Onodera ,  Kouichi Meguro ,  Junji Tanaka

发明人： Masanori Onodera ,  Kouichi Meguro ,  Junji Tanaka

IPC分类号： H01L21/44

CPC分类号： H01L25/50 ,  G06F1/183 ,  H01L21/56 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/66 ,  H01L24/11 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/18 ,  H01L2221/68331 ,  H01L2223/6677 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85186 ,  H01L2224/85986 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/4554

摘要： The present invention provides a semiconductor device and a fabrication method therefor, the semiconductor device including a first semiconductor chip disposed on a substrate, a first sealing resin sealing the first semiconductor chip, a built-in semiconductor device disposed on the first sealing resin, and a second sealing resin sealing the first sealing resin and the built-in semiconductor device and covering a side surface of the substrate. According to an aspect of the present invention, it is possible to provide a high-quality semiconductor device and a fabrication method therefor, in which downsizing and cost reduction can be realized.

摘要翻译： 本发明提供一种半导体器件及其制造方法，所述半导体器件包括设置在基板上的第一半导体芯片，密封第一半导体芯片的第一密封树脂，设置在第一密封树脂上的内置半导体器件，以及 密封第一密封树脂和内置半导体器件并覆盖基板的侧表面的第二密封树脂。 根据本发明的一个方面，可以提供一种能够实现小型化和降低成本的高品质半导体器件及其制造方法。

公开(公告)号：US07851260B2

公开(公告)日：2010-12-14

申请号：US12332146

申请日：2008-12-10

申请人： Junji Tanaka ,  Kouichi Meguro ,  Yasuhiro Shinma

发明人： Junji Tanaka ,  Kouichi Meguro ,  Yasuhiro Shinma

IPC分类号： H01L21/00

CPC分类号： H01L21/561 ,  H01L24/97 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device is disclosed. As a part of the method, one surface of a substrate is molded with resin where the substrate and the resin are heated in a first heating process and maintained in a flat condition. The substrate and the resin are returned to room temperature while being maintained in the flat condition after the first heating process. The resin is cut after the substrate and the resin are returned to room temperature from a surface of the resin that is opposite the surface of the resin where the substrate contacts the resin. The substrate is left intact when the resin is cut. Thereafter, the substrate is separated.

摘要翻译： 公开了一种制造半导体器件的方法。 作为该方法的一部分，基板的一个表面用树脂模制，其中基板和树脂在第一加热过程中被加热并保持在平坦的状态。 在第一加热处理之后，将基板和树脂恢复到室温，同时保持在平坦状态。 在基板之后切割树脂，树脂从与树脂接触的树脂表面相对的树脂表面返回到室温。 当切割树脂时，基材保持不变。 此后，分离基板。

公开(公告)号：US07816788B2

公开(公告)日：2010-10-19

申请号：US12122556

申请日：2008-05-16

申请人： Junichi Kasai ,  Junji Tanaka ,  Naomi Masuda

发明人： Junichi Kasai ,  Junji Tanaka ,  Naomi Masuda

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L22/24 ,  H01L23/544 ,  H01L24/06 ,  H01L24/17 ,  H01L24/81 ,  H01L2223/5442 ,  H01L2223/5448 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/06051 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/17051 ,  H01L2224/81121 ,  H01L2224/8121 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/20106 ,  H01L2924/351 ,  H05K1/0269 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2203/0465 ,  Y02P70/613 ,  Y10T29/53022 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Structures, methods, and systems for assessing bonding of electrodes in FCB packaging are disclosed. In one embodiment, a method comprises mounting a semiconductor chip with a plurality of first electrodes of a first shape to a mounted portion with a second electrode of a second shape, wherein the second shape is different from the first shape, bonding a respective on of the plurality of first electrodes and the second electrode using a first solder bump, generating an X-ray image of the first solder bump, and determining an acceptability of the bonding of the respective one of the plurality of first electrodes and the second electrode based on the X-ray image of the first solder bump.

摘要翻译： 公开了用于评估FCB封装中电极接合的结构，方法和系统。 在一个实施例中，一种方法包括将具有第一形状的多个第一电极的半导体芯片安装到具有第二形状的第二电极的安装部分，其中第二形状与第一形状不同， 所述多个第一电极和所述第二电极使用第一焊料凸块，产生所述第一焊料凸块的X射线图像，以及基于所述多个第一电极和所述第二电极中的相应一个的接合，基于 第一焊锡凸块的X射线图像。

公开(公告)号：US07696616B2

公开(公告)日：2010-04-13

申请号：US11339352

申请日：2006-01-25

申请人： Yasuhiro Shinma ,  Masanori Onodera ,  Kouichi Meguro ,  Koji Taya ,  Junji Tanaka ,  Junichi Kasai

发明人： Yasuhiro Shinma ,  Masanori Onodera ,  Kouichi Meguro ,  Koji Taya ,  Junji Tanaka ,  Junichi Kasai

IPC分类号： H01L23/02

CPC分类号： H05K1/144 ,  H01L23/49827 ,  H01L23/5387 ,  H01L24/73 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/01004 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/023 ,  H05K1/147 ,  H05K1/189 ,  H05K3/361 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/10515 ,  H05K2201/10734 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A stacked type semiconductor device includes semiconductor devices, interposers by which the semiconductor devices are stacked, the interposers having electrodes provided on sides thereof, and a connection substrate connecting the electrodes together. The electrodes provided on the sides of the interposers may be connected to the connection substrate by one of an electrically conductive adhesive or an anisotropically conductive film.

摘要翻译： 堆叠型半导体器件包括半导体器件，半导体器件堆叠的插入器，具有设置在其侧面上的电极的插入器以及将电极连接在一起的连接基板。 设置在插入件侧面的电极可以通过导电粘合剂或各向异性导电膜中的一种连接到连接基板。

公开(公告)号：US20090242422A1

公开(公告)日：2009-10-01

申请号：US12384063

申请日：2009-03-31

申请人： Kazuhiro Kurosu ,  Keigo Watanabe ,  Junji Tanaka

发明人： Kazuhiro Kurosu ,  Keigo Watanabe ,  Junji Tanaka

IPC分类号： C25B1/22 ,  C25B15/00

CPC分类号： C25B15/00 ,  C25B1/14

摘要： In an electrolyzer comprising an anode compartment provided with porous anodes, a cathode compartment, and a membrane providing a partition between the anode compartment and the cathode compartment, wherein a solution containing sulfide ions is introduced into the anode compartment, and an aqueous solution containing caustic soda is introduced into the cathode compartment, thereby producing a polysulfide containing polysulfide sulfur through electrolytic oxidation, wherein the anode compartment of the electrolyzer is cleaned with the use, of an aqueous solution containing at least either one of an inorganic acid, a chelating agent, and a scale-cleaning agent, thereby recovering performance of the electrolyzer. Further, when the contents of the anode compartment are replaced with an alkaline aqueous solution containing not more than 0.1 mass % of sulfide ions and not more than 0.1 mass % of carbonate ions upon stopping the electrolytic oxidation, thereby maintaining the performance of the electrolyzer.

摘要翻译： 在包括设置有多孔阳极的阳极室，阴极室和在阳极室和阴极室之间提供隔板的膜的电解槽中，其中将包含硫化物离子的溶液引入阳极室中，并将含有苛性碱的水溶液 将苏打引入阴极室，由此通过电解氧化生成含有多硫化硫的硫化物，其中使用含有无机酸，螯合剂，螯合剂等中的至少一种的水溶液清洗电解槽的阳极室， 和垢垢清洗剂，从而回收电解槽的性能。 此外，当停止电解氧化时，当含有不超过0.1质量％的硫化物离子和不超过0.1质量％的碳酸根离子的碱性水溶液代替阳极室的内容物，从而保持电解器的性能。

公开(公告)号：US20090093967A1

公开(公告)日：2009-04-09

申请号：US11914247

申请日：2005-05-13

申请人： Junji Tanaka

发明人： Junji Tanaka

IPC分类号： G06F19/00

CPC分类号： G16B20/00 ,  G16B40/00

摘要： The present invention provides that the analysis can be estimated the characteristics of the originated populations which belong to the samples and the characteristics of the samples from sample data. By loading the sample data, by interfering with the second state variable showing the characteristics in the environment system to the first state variable showing the characteristics in the objective system, by converging the variable by selecting the maximum resonant state, and by estimating the characteristics of the samples and the characteristics of the originated populations which belong to the samples, then the result estimated the characteristics of the originated populations is outputted.

摘要翻译： 本发明提供了可以从样本数据估计属于样本的起始群体的特征和样本的特征的分析。 通过加载样本数据，通过将表示环境系统的特征的第二状态变量与示出目标系统中的特征的第一状态变量相互干扰，通过选择最大共振状态来收敛变量，并且通过估计 样品和属于样品的原始种群的特征，然后输出结果估计的起源群体的特征。

公开(公告)号：US20090093085A1

公开(公告)日：2009-04-09

申请号：US12315417

申请日：2008-12-03

申请人： Masanori Onodera ,  Kouichi Meguro ,  Junichi Kasai ,  Yasuhiro Shinma ,  Koji Taya ,  Junji Tanaka

发明人： Masanori Onodera ,  Kouichi Meguro ,  Junichi Kasai ,  Yasuhiro Shinma ,  Koji Taya ,  Junji Tanaka

IPC分类号： H01L21/71 ,  H01L23/48

CPC分类号： H01L21/6835 ,  H01L21/67336 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2225/06513 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/3511

摘要： A carrier structure for fabricating a stacked-type semiconductor device includes: a lower carrier that has laminated thin plates and has first openings for mounting first semiconductor packages thereon; and an upper carrier having second openings for mounting second semiconductor packages on the first semiconductor packages. The lower carrier composed of the laminated thin plates realizes an even plate thickness and reduces warps because stress is distributed to the thin plates. This results in an improved production yield. A pattern of the openings in the thin plates of the lower carrier may be formed by etching or electric discharging. The openings thus formed have reduced warps and burrs.

摘要翻译： 用于制造层叠型半导体器件的载体结构包括：具有叠层薄板并具有用于在其上安装第一半导体封装的第一开口的下载体; 以及具有用于将第二半导体封装安装在第一半导体封装上的第二开口的上载体。 由层压薄板构成的下部载体由于应力分布在薄板上，因此实现了均匀的板厚度并且减少了翘曲。 这导致提高的产量。 下载体的薄板中的开口的图案可以通过蚀刻或放电形成。 如此形成的开口减少了经纱和毛刺。

公开(公告)号：US20080169544A1

公开(公告)日：2008-07-17

申请号：US11654704

申请日：2007-01-17

申请人： Junji Tanaka ,  Junichi Kasai ,  Kouichi Meguro ,  Masanori Onodera ,  Koji Taya

发明人： Junji Tanaka ,  Junichi Kasai ,  Kouichi Meguro ,  Masanori Onodera ,  Koji Taya

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L25/105 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of fabricating a semiconductor device includes: mounting a semiconductor chip on a substrate; forming an upper connection terminal on a side of the substrate on which the semiconductor chip is mounted; forming a resin seal portion that seals the semiconductor chip and the upper connection terminal so that an upper surface of the upper connection terminal is exposed; and shaping the upper connection terminal so that the upper surface of the upper connection terminal becomes lower than an upper surface of the resin seal portion.

摘要翻译： 制造半导体器件的方法包括：将半导体芯片安装在基板上; 在其上安装有半导体芯片的基板的一侧上形成上连接端子; 形成密封半导体芯片和上连接端子以使上连接端子的上表面露出的树脂密封部; 并且使上连接端子成形，使得上连接端子的上表面变得低于树脂密封部分的上表面。