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    Thermal head driving integrated circuit
    1.
    发明授权
    Thermal head driving integrated circuit 有权
    热敏头驱动集成电路

    公开(公告)号：US06346960B1

    公开(公告)日：2002-02-12

    申请号：US09404936

    申请日：1999-09-23

    申请人： Yoshihide Kanakubo ,  Yasuhiro Moya ,  Tatsuya Kitta ,  Kazutoshi Ishii ,  Sumitaka Goto

    发明人： Yoshihide Kanakubo ,  Yasuhiro Moya ,  Tatsuya Kitta ,  Kazutoshi Ishii ,  Sumitaka Goto

    IPC分类号： B41J2345

    CPC分类号： B41J2/355

    摘要： A thermal head driving integrated circuit may be used to perform an “n” color or “n” gradation printing operation with a simplified circuit having a reduced size by employing a single delay element connected to a plurality of resistive heating elements. The integrated circuit has a plurality of drive units each for driving a respective one of the heating elements and each having a drive transistor for driving a respective heating element, one or more delay elements, the number of delay elements being less than “n”, for supplying delayed print data to the drive transistor, a print data storing unit for storing the print data of each of the “n” types, and a print data supplying unit for supplying print data stored in the print data storing unit to the “n” delay elements.

    摘要翻译： 可以使用热敏头驱动集成电路，通过采用连接到多个电阻加热元件的单个延迟元件，通过具有减小的尺寸的简化电路来执行“n”种颜色或“n”级别打印操作。 集成电路具有多个驱动单元，每个驱动单元用于驱动相应的一个加热元件，并且每个驱动单元具有用于驱动相应加热元件的驱动晶体管，一个或多个延迟元件，延迟元件的数量小于“n” 用于将延迟的打印数据提供给驱动晶体管;打印数据存储单元，用于存储每个“n”类型的打印数据，以及打印数据提供单元，用于将存储在打印数据存储单元中的打印数据提供给“n” “延迟元素

    Thermal head driving integrated circuit
    2.
    发明授权
    Thermal head driving integrated circuit 有权
    热敏头驱动集成电路

    公开(公告)号：US06359639B1

    公开(公告)日：2002-03-19

    申请号：US09428901

    申请日：1999-10-28

    申请人： Tatsuya Kitta ,  Yoshihide Kanakubo ,  Yasuhiro Moya ,  Kazutoshi Ishii ,  Sumitaka Gotou

    发明人： Tatsuya Kitta ,  Yoshihide Kanakubo ,  Yasuhiro Moya ,  Kazutoshi Ishii ,  Sumitaka Gotou

    IPC分类号： B41J2345

    CPC分类号： B41J2/355

    摘要： A thermal head driving integrated circuit capable of preventing the lowering of data transfer speed, and in which the number of bonding pads can be reduced as well as current consumption has a driver circuit in which at least two shift registers are series-arranged in front and rear stages to sequentially transfer print data in a serial signal manner to be read out in a batch mode to drive a plurality of heating resistive elements. A switch circuit is interposed between an output terminal of the front-staged shift register and an input terminal of the rear-staged shift register to selectively connect and disconnect the two shift registers.

    摘要翻译： 能够防止数据传送速度降低的热敏头驱动集成电路，其中可以减少接合焊盘的数量以及电流消耗，具有驱动电路，其中至少两个移位寄存器串联排列在前面， 后级以串行信号方式顺序传送打印数据，以便以分批模式读出以驱动多个加热电阻元件。 开关电路插在前级移位寄存器的输出端子和后级移位寄存器的输入端子之间，以选择性地连接和断开两个移位寄存器。

    Semiconductor device and method of manufacturing the same
    3.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US6107128A

    公开(公告)日：2000-08-22

    申请号：US324693

    申请日：1999-06-02

    申请人： Kazutoshi Ishii ,  Sumitaka Gotou ,  Yasuhiro Moya ,  Tatsuya Kitta ,  Yoshihide Kanakubo

    发明人： Kazutoshi Ishii ,  Sumitaka Gotou ,  Yasuhiro Moya ,  Tatsuya Kitta ,  Yoshihide Kanakubo

    IPC分类号： H01L29/78 ,  H01L21/8238 ,  H01L27/092

    CPC分类号： H01L27/0925 ,  H01L21/823857

    摘要： Since a field effect MOS transistor can be formed with a reduced number of manufacturing processes, a semiconductor integrated circuit device can be materialized at a low cost. A semiconductor device has a structure in which a gate electrode is provided in the vicinity of the surface of a semiconductor substrate through a gate insulating film, a second conductive type heavily doped impurity region is provided in a region adjacent to a part of the gate electrode through a part of the gate insulating film and a part of a thick oxide film, another second conductive type heavily doped impurity region is provided in a region adjacent to an opposite part of the gate electrode opposing the part of the gate electrode through the part of the gate insulating film and a part of another thick oxide film, and a first conductive type heavily doped impurity region for device isolation is provided so as to surround the gate electrode and the second conductive type heavily doped impurity regions.

    摘要翻译： 由于能够以较少数量的制造工艺形成场效应MOS晶体管，所以能够以低成本实现半导体集成电路器件。 半导体器件具有其中通过栅极绝缘膜在半导体衬底的表面附近设置栅电极的结构，在与栅电极的一部分相邻的区域中设置第二导电型重掺杂杂质区 通过栅极绝缘膜的一部分和厚氧化物膜的一部分，另一个第二导电型重掺杂杂质区设置在与栅电极的与栅电极的一部分相对的相对部分附近的区域中， 设置栅绝缘膜和另一厚氧化膜的一部分，以及用于器件隔离的第一导电型重掺杂杂质区域，以围绕栅电极和第二导电型重掺杂杂质区。

    Small geometry high voltage semiconductor device
    7.
    发明授权
    Small geometry high voltage semiconductor device 失效
    小几何高压半导体器件

    公开(公告)号：US06222235B1

    公开(公告)日：2001-04-24

    申请号：US08677541

    申请日：1996-07-10

    申请人： Yoshikazu Kojima ,  Kazutoshi Ishii ,  Masaaki Kamiya ,  Yasuhiro Moya

    发明人： Yoshikazu Kojima ,  Kazutoshi Ishii ,  Masaaki Kamiya ,  Yasuhiro Moya

    IPC分类号： H01L2362

    CPC分类号： H01L29/7834 ,  H01L27/0266 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/105 ,  H01L29/42364 ,  H01L29/42368 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device including multiple high-voltage drive transistors in its output section is improved in electrostatic withstand voltage by connecting electrostatic protection transistors in parallel with the high-voltage drive transistors connected to the output pads. The drain withstand voltage of the electrostatic protection transistors is made lower than the drain withstand voltage of the high-voltage drive transistors. In addition, the channel length of electrostatic protection transistors is made short to enable efficient bipolar operation of the electrostatic protection transistors.

    摘要翻译： 在其输出部分中包括多个高电压驱动晶体管的半导体器件通过将静电保护晶体管与连接到输出焊盘的高电压驱动晶体管并联连接来提高静电耐受电压。 使静电保护晶体管的漏极耐受电压低于高电压驱动晶体管的漏极耐受电压。 此外，静电保护晶体管的沟道长度变短，以实现静电保护晶体管的高效双极性操作。