SEMICONDUCTOR MEMORY DEVICE
    2.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 审中-公开
    半导体存储器件

    公开(公告)号:US20100072526A1

    公开(公告)日:2010-03-25

    申请号:US12554396

    申请日:2009-09-04

    IPC分类号: H01L29/92 H01L21/02

    摘要: A semiconductor memory device includes a semiconductor substrate; a ferroelectric capacitor comprising an upper electrode, a ferroelectric film, and a lower electrode above the semiconductor substrate; and an upper interlayer dielectric film surrounding a periphery of the ferroelectric capacitor, wherein a gap is provided between the ferroelectric capacitor and the upper interlayer dielectric film.

    摘要翻译: 半导体存储器件包括半导体衬底; 一个铁电电容器,包括在半导体衬底之上的上电极,铁电体膜和下电极; 以及围绕所述铁电电容器的周围的上层间绝缘膜,其中在所述铁电电容器和所述上层间电介质膜之间设置有间隙。

    Semiconductor device having ferroelectric memory and manufacturing method of the semiconductor device
    4.
    发明申请
    Semiconductor device having ferroelectric memory and manufacturing method of the semiconductor device 审中-公开
    具有铁电存储器的半导体器件和半导体器件的制造方法

    公开(公告)号:US20050205910A1

    公开(公告)日:2005-09-22

    申请号:US10960029

    申请日:2004-10-08

    CPC分类号: H01L27/11502 H01L27/11507

    摘要: A transistor including a source/drain region is formed on a semiconductor substrate. A plug electrode is formed on the source/drain region. A conductive film is formed on the plug electrode. A first insulation film is formed on the conductive film. A lower electrode is formed on the first insulation film, and electrically connected to the conductive film formed on the plug electrode. A ferroelectric film is formed on the lower electrode. An upper electrode is formed on the ferroelectric film.

    摘要翻译: 包括源极/漏极区域的晶体管形成在半导体衬底上。 插头电极形成在源极/漏极区域上。 在插头电极上形成导电膜。 在导电膜上形成第一绝缘膜。 在第一绝缘膜上形成下电极,与形成在插塞电极上的导电膜电连接。 在下电极上形成铁电体膜。 在铁电体膜上形成上部电极。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号:US20090095994A1

    公开(公告)日:2009-04-16

    申请号:US12250888

    申请日:2008-10-14

    摘要: A semiconductor device comprises a substrate; an insulating layer formed over the substrate; a contact hole formed through the insulating layer; a plurality of first plug electrodes each formed inside the contact hole to the surface of the insulating layer; a capacitor layer formed on the first plug electrode in a first region; and a second plug electrode formed on the first plug electrode in a second region different from the first region. The capacitor layer includes a lower electrode, a ferroelectric film, and an upper electrode stacked in turn. The first plug electrode includes a plug conduction layer formed from the surface of the substrate, and a plug barrier layer formed from above the plug conduction layer up to an upper surface of the insulating layer, the plug barrier layer having a higher etching selection ratio than the lower electrode.

    摘要翻译: 半导体器件包括衬底; 形成在所述基板上的绝缘层; 穿过所述绝缘层形成的接触孔; 多个第一插头电极,每个第一插头电极各自形成在所述接触孔内部到所述绝缘层的表面; 在第一区域中形成在所述第一插头电极上的电容器层; 以及形成在与第一区域不同的第二区域中的第一插塞电极上的第二插头电极。 电容器层包括下电极,铁电体膜和依次堆叠的上电极。 第一插头电极包括从基板的表面形成的插头导电层和从插塞导电层的上方形成的插塞阻挡层,直到绝缘层的上表面,插塞阻挡层具有比 下电极。

    Semiconductor device having ferroelectric capacitor and method for manufacturing the same
    9.
    发明授权
    Semiconductor device having ferroelectric capacitor and method for manufacturing the same 失效
    具有铁电电容器的半导体器件及其制造方法

    公开(公告)号:US06762065B2

    公开(公告)日:2004-07-13

    申请号:US10448359

    申请日:2003-05-30

    IPC分类号: H01L2100

    摘要: A lower electrode is formed on an insulating film on a semiconductor substrate. A pair of ferroelectric films are formed on the lower electrode separately from each other. An upper electrode is formed on each of the pair of ferroelectric films. A portion of the lower electrode on which the ferroelectric film is formed is thicker than a portion thereof on which the ferroelectric film is not formed. Such a structure is obtained by sequentially depositing the lower electrode, the ferroelectric film, and the upper electrode on the insulating film, forming a mask on the upper-electrode, using this mask to etch the upper-electrode and the ferroelectric film to thereby pattern a pair of upper electrodes and a pair of ferroelectric electrodes, forming such a mask that continuously covers the pair of upper electrodes and the pair of ferroelectric films, and then etching the lower-electrode material film.

    摘要翻译: 在半导体衬底上的绝缘膜上形成下电极。 一对铁电体膜分别形成在下电极上。 在一对铁电体膜中的每一个上形成上电极。 形成铁电体膜的下部电极的一部分比不形成强电介质膜的部分厚。 通过使用该掩模在绝缘膜上依次沉积下电极,铁电体膜和上电极,在上电极上形成掩模,以蚀刻上电极和铁电体膜,从而形成图案 一对上电极和一对铁电电极,形成连续地覆盖一对上电极和一对铁电体膜的掩模,然后蚀刻下电极材料膜。

    Semiconductor device and method of manufacturing the same
    10.
    发明授权
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号:US06680499B2

    公开(公告)日:2004-01-20

    申请号:US09988138

    申请日:2001-11-19

    IPC分类号: H01L2976

    摘要: Provided are a semiconductor memory device that permits increasing the degree of integration without decreasing the capacitance of the capacitor included in a memory cell, and a method of manufacturing the particular semiconductor memory device. Specifically, provided are a semiconductor memory device, comprising a semiconductor substrate, an interlayer insulating film formed on the semiconductor substrate, a first electrode formed on the interlayer insulating film, a first ferroelectric film formed on the first electrode, a second electrode formed on the first ferroelectric film, a second ferroelectric film formed on the second electrode, and a third electrode formed on the second ferroelectric film, and a method of manufacturing the particular semiconductor memory device.

    摘要翻译: 提供一种允许增加集成度而不减小包括在存储单元中的电容器的电容的半导体存储器件,以及制造特定半导体存储器件的方法。 具体地,提供一种半导体存储器件,包括半导体衬底,形成在半导体衬底上的层间绝缘膜,形成在层间绝缘膜上的第一电极,形成在第一电极上的第一铁电膜,形成在第一电极上的第二电极 第一铁电体膜,形成在第二电极上的第二铁电体膜和形成在第二铁电体膜上的第三电极,以及制造特定半导体存储器件的方法。