公开(公告)号：US5675176A

公开(公告)日：1997-10-07

申请号：US530721

申请日：1995-09-15

申请人： Yukihiro Ushiku ,  Atsushi Yagishita ,  Satoshi Inaba ,  Minoru Takahashi ,  Masanori Numano ,  Yoshiki Hayashi ,  Yoshiaki Matsushita ,  Yasunori Okayama ,  Hiroyasu Kubota ,  Norihiko Tsuchiya

发明人： Yukihiro Ushiku ,  Atsushi Yagishita ,  Satoshi Inaba ,  Minoru Takahashi ,  Masanori Numano ,  Yoshiki Hayashi ,  Yoshiaki Matsushita ,  Yasunori Okayama ,  Hiroyasu Kubota ,  Norihiko Tsuchiya

IPC分类号： H01L27/092 ,  H01L27/108 ,  H01L29/10 ,  H01L29/30

CPC分类号： H01L27/0921 ,  H01L27/10808 ,  H01L29/1079

摘要： A semiconductor device has a semiconductor substrate having a groove, and a semiconductor element formed in a surface region of the semiconductor substrate. A substance having a thermal expansion coefficient different from the semiconductor substrate is embedded in at least a portion of the groove, a crystal defect is generated from the region near the bottom of the groove in the semiconductor substrate, thereby alleviating stress and strain in other regions of the semiconductor substrate, such that such regions cannot generate crystal defects in a region necessary for a circuit operation of the semiconductor element of the surface region.

摘要翻译： 半导体器件具有具有凹槽的半导体衬底和形成在半导体衬底的表面区域中的半导体元件。 具有与半导体基板不同的热膨胀系数的物质嵌入到槽的至少一部分中，从半导体衬底中的槽的底部附近的区域产生晶体缺陷，从而减轻其他区域中的应力和应变 使得这些区域不会在表面区域的半导体元件的电路操作所需的区域中产生晶体缺陷。

公开(公告)号：US5739575A

公开(公告)日：1998-04-14

申请号：US705647

申请日：1996-08-30

申请人： Masanori Numano ,  Norihiko Tsuchiya ,  Hiroyasu Kubota ,  Yoshiaki Matsushita ,  Yoshiki Hayashi ,  Yukihiro Ushiku ,  Atsushi Yagishita ,  Satoshi Inaba ,  Yasunori Okayama ,  Minoru Takahashi

发明人： Masanori Numano ,  Norihiko Tsuchiya ,  Hiroyasu Kubota ,  Yoshiaki Matsushita ,  Yoshiki Hayashi ,  Yukihiro Ushiku ,  Atsushi Yagishita ,  Satoshi Inaba ,  Yasunori Okayama ,  Minoru Takahashi

IPC分类号： H01L21/302 ,  H01L21/3065 ,  H01L21/322 ,  H01L21/74 ,  H01L21/76 ,  H01L21/762 ,  H01L27/08 ,  H01L29/00

CPC分类号： H01L21/76237 ,  H01L21/74

摘要： Element isolation technique for LSIs having a fine pattern of sub-micron class or finer. A high strained region doped with impurities at a high concentration is formed under, and remote from, a buried insulating material (dielectrics) layer for element isolation. With this buried dielectrics element isolation (BDEI) structure, since the high strained layer exists just under the buried dielectrics layer, crystal defects generated near the buried dielectrics layer due to strain caused by a difference of thermal expansion coefficient between a semiconductor layer and the buried dielectrics layer, are moved toward the high strained layer. Accordingly, the crystal defects do not reach an active region where active elements are formed, so that leakage current in the p-n junction formed in the active layer can be advantageously reduced.

摘要翻译： 具有亚微米级精细图案或精细图案的LSI的元件隔离技术。 在埋设绝缘材料（电介质）层的下面，远离用于元件隔离的方式形成掺杂高浓度杂质的高应变区。 由于这种埋置的电介质元件隔离（BDEI）结构，由于高应变层存在于掩埋电介质层的正下方，所以由于半导体层与埋入层之间的热膨胀系数的差异引起的应变引起的掩埋电介质层附近产生的晶体缺陷 电介质层向高应变层移动。 因此，晶体缺陷不会到达形成有源元件的有源区域，从而有利地减少了形成在有源层中的p-n结中的泄漏电流。

公开(公告)号：US5534294A

公开(公告)日：1996-07-09

申请号：US279007

申请日：1994-07-22

申请人： Atsuko Kubota ,  Masakatu Kojima ,  Norihiko Tsuchiya ,  Shuichi Samata ,  Masanori Numano ,  Yoshihiro Ueno

发明人： Atsuko Kubota ,  Masakatu Kojima ,  Norihiko Tsuchiya ,  Shuichi Samata ,  Masanori Numano ,  Yoshihiro Ueno

IPC分类号： H01L21/304 ,  C30B15/00 ,  C30B33/00 ,  H01L21/322 ,  H01L21/332 ,  C23C16/24

CPC分类号： C30B29/06 ,  C30B15/00 ,  C30B33/00 ,  H01L21/3221 ,  H01L21/3225 ,  H01L29/66393 ,  Y10S148/06 ,  Y10S148/061

摘要： Provided is a process for producing a semiconductor silicon wafer by which an intrinsic gettering effect can be improved and at the same time the top side can be made free from faults. A silicon ingot is produced and sliced to obtain silicon wafers. Then, a polycrystal silicon depositing film is formed on one side of a silicon wafer, which is subjected to a heat treatment in an inert gas, a reducing gas or a mixture thereof to discharge oxygen from the vicinity of the other side. Alternatively, after discharging oxygen from the silicon wafer by a heat treatment, a polycrystal silicon depositing film may be formed on one side of the silicon wafer.

摘要翻译： 本发明提供一种半导体硅晶片的制造方法，其特征在于能够提高固有的吸杂效果，同时能够使上侧无缺陷。 生产硅锭并切片以获得硅晶片。 然后，在硅晶片的一侧上形成多晶硅沉积膜，该硅晶片在惰性气体，还原气体或其混合物中进行热处理，以从另一侧附近排出氧气。 或者，在通过热处理从硅晶片中排出氧之后，可以在硅晶片的一侧上形成多晶硅沉积膜。

公开(公告)号：US5738942A

公开(公告)日：1998-04-14

申请号：US580926

申请日：1995-12-29

申请人： Atsuko Kubota ,  Masakatu Kojima ,  Norihiko Tsuchiya ,  Shuichi Samata ,  Masanori Numano ,  Yoshihiro Ueno

发明人： Atsuko Kubota ,  Masakatu Kojima ,  Norihiko Tsuchiya ,  Shuichi Samata ,  Masanori Numano ,  Yoshihiro Ueno

IPC分类号： H01L21/304 ,  C30B15/00 ,  C30B33/00 ,  H01L21/322 ,  H01L21/332 ,  B32B9/00 ,  H01L21/306 ,  H01L23/58 ,  H01L29/04

CPC分类号： C30B29/06 ,  C30B15/00 ,  C30B33/00 ,  H01L21/3221 ,  H01L21/3225 ,  H01L29/66393 ,  Y10S148/06 ,  Y10S148/061

摘要： Provided is a process for producing a semiconductor silicon wafer by which an intrinsic gettering effect can be improved and at the same time the top side can be made free from faults. A silicon ingot is produced and sliced to obtain silicon wafers. Then, a polycrystal silicon depositing film is formed on one side of a silicon wafer, which is subjected to a heat treatment in an inert gas, a reducing gas or a mixture thereof to discharge oxygen from the vicinity of the other side. Alternatively, after discharging oxygen from the silicon wafer by a heat treatment, a polycrystal silicon depositing film may be formed on one side of the silicon wafer.

摘要翻译： 本发明提供一种半导体硅晶片的制造方法，其特征在于能够提高固有的吸杂效果，同时能够使上侧无缺陷。 生产硅锭并切片以获得硅晶片。 然后，在硅晶片的一侧上形成多晶硅沉积膜，该硅晶片在惰性气体，还原气体或其混合物中进行热处理，以从另一侧附近排出氧气。 或者，在通过热处理从硅晶片中排出氧之后，可以在硅晶片的一侧上形成多晶硅沉积膜。

公开(公告)号：US20060189145A1

公开(公告)日：2006-08-24

申请号：US11346236

申请日：2006-02-03

申请人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

发明人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

IPC分类号： H01L21/461 ,  C23F1/00 ,  B44C1/22

CPC分类号： H01L21/76802 ,  H01L21/02063 ,  H01L21/31116 ,  H01L21/76814

摘要： An insulating film formed on a conducting layer is dry-etched so as to make a connection hole in the insulating film to expose the conducting layer. Plasma is supplied onto the exposed conducting layer to dry-clean a damage layer produced in the connection hole. A product produced in the connection hole as a result of the dry cleaning is removed by a wet process. An oxide film formed in the connection hole as a result of the wet process is etched by a chemical dry process using a gas including either NF3 or HF. A thermally decomposable reaction product produced as a result of the etching is removed by heat treatment.

摘要翻译： 对形成在导电层上的绝缘膜进行干蚀刻，以在绝缘膜上形成连接孔，使导电层露出。 将等离子体供应到暴露的导电层上以干燥在连接孔中产生的损伤层。 作为干式清洗的连接孔中产生的产品通过湿法除去。 通过使用包含NF 3或HF的气体的化学干法，蚀刻形成在连接孔中的作为湿法处理的结果的氧化膜。 通过热处理除去作为蚀刻结果产生的可热分解的反应产物。

公开(公告)号：US5951755A

公开(公告)日：1999-09-14

申请号：US801113

申请日：1997-02-14

申请人： Moriya Miyashita ,  Masanobu Ogino ,  Tadahide Hoshi ,  Masanori Numano ,  Shuichi Samata ,  Akiko Sekihara ,  Keiko Akita

发明人： Moriya Miyashita ,  Masanobu Ogino ,  Tadahide Hoshi ,  Masanori Numano ,  Shuichi Samata ,  Akiko Sekihara ,  Keiko Akita

IPC分类号： H01L21/322 ,  C30B25/92

CPC分类号： H01L21/3225

摘要： A manufacturing method for manufacturing a semiconductor substrate has first annealing step for annealing silicon single crystal to permit oxygen embryos or oxygen precipitations grown from the oxygen embryos precipitating in a predetermined region and a second annealing step for permitting said oxygen embryos or said oxygen precipitations to contract using a second temperature range higher than the first temperature range, said second temperature range being high enough to contract said oxygen embryos and low enough to prevent redistribution of boron from affecting to device characteristics, to form a denuded zone in said predetermined region at the principal surface. An inspection method for inspecting a semiconductor substrate further has measuring step, subsequent to said first and second annealing steps for measuring the density of oxygen embryos grown into oxygen precipitations among those precipitated in said silicon single crystal.

摘要翻译： 用于制造半导体衬底的制造方法具有用于使硅单晶退火的第一退火步骤，以允许从预定区域中的氧胚生长的氧胚胎或氧沉淀，以及用于允许所述氧胚胎或所述氧沉淀物收缩的第二退火步骤 使用高于第一温度范围的第二温度范围，所述第二温度范围足够高以收缩所述氧胚，并且足够低以防止硼的再分布影响到设备特性，以在主体的所述预定区域中形成裸露区域 表面。 用于检查半导体衬底的检查方法还具有测量步骤，在所述第一和第二退火步骤之后，测量在所述硅单晶中析出的氧沉淀物中生长的氧胚胎的密度。

公开(公告)号：US07605076B2

公开(公告)日：2009-10-20

申请号：US11346236

申请日：2006-02-03

申请人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

发明人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

IPC分类号： H01L21/4763 ,  H01L21/28 ,  H01L21/302

CPC分类号： H01L21/76802 ,  H01L21/02063 ,  H01L21/31116 ,  H01L21/76814

摘要： An insulating film formed on a conducting layer is dry-etched so as to make a connection hole in the insulating film to expose the conducting layer. Plasma is supplied onto the exposed conducting layer to dry-clean a damage layer produced in the connection hole. A product produced in the connection hole as a result of the dry cleaning is removed by a wet process. An oxide film formed in the connection hole as a result of the wet process is etched by a chemical dry process using a gas including either NF3 or HF. A thermally decomposable reaction product produced as a result of the etching is removed by heat treatment.

摘要翻译： 对形成在导电层上的绝缘膜进行干蚀刻，以在绝缘膜上形成连接孔，使导电层露出。 将等离子体供应到暴露的导电层上以干燥在连接孔中产生的损伤层。 作为干式清洗的连接孔中产生的产品通过湿法除去。 通过使用包括NF 3或HF的气体的化学干法，蚀刻形成在连接孔中的作为湿法处理的结果的氧化膜。 通过热处理除去作为蚀刻结果产生的可热分解的反应产物。

公开(公告)号：US08232197B2

公开(公告)日：2012-07-31

申请号：US12585238

申请日：2009-09-09

申请人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

发明人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

IPC分类号： H01L21/4763 ,  H01L21/28

CPC分类号： H01L21/76802 ,  H01L21/02063 ,  H01L21/31116 ,  H01L21/76814

摘要： An insulating film formed on a conducting layer is dry-etched so as to make a connection hole in the insulating film to expose the conducting layer. Plasma is supplied onto the exposed conducting layer to dry-clean a damage layer produced in the connection hole. A product produced in the connection hole as a result of the dry cleaning is removed by a wet process. An oxide film formed in the connection hole as a result of the wet process is etched by a chemical dry process using a gas including either NF3 or HF. A thermally decomposable reaction product produced as a result of the etching is removed by heat treatment.

摘要翻译： 对形成在导电层上的绝缘膜进行干蚀刻，以在绝缘膜上形成连接孔，使导电层露出。 将等离子体供应到暴露的导电层上以干燥在连接孔中产生的损伤层。 作为干式清洗的连接孔中产生的产品通过湿法除去。 通过使用包括NF 3或HF的气体的化学干法，蚀刻形成在连接孔中的作为湿法处理的结果的氧化膜。 通过热处理除去作为蚀刻结果产生的可热分解的反应产物。

公开(公告)号：US5508800A

公开(公告)日：1996-04-16

申请号：US31924

申请日：1993-03-16

申请人： Moriya Miyashita ,  Hachiro Hiratsuka ,  Atsuko Kubota ,  Shuichi Samata ,  Masanori Numano ,  Hiroyuki Fukui

发明人： Moriya Miyashita ,  Hachiro Hiratsuka ,  Atsuko Kubota ,  Shuichi Samata ,  Masanori Numano ,  Hiroyuki Fukui

IPC分类号： H01L21/66 ,  G01N1/28 ,  G01N21/84 ,  G01N21/95 ,  H01L21/306 ,  G01N21/88

CPC分类号： H01L21/02046 ,  G01N21/9501 ,  H01L21/02019 ,  H01L21/02052 ,  H01L21/30608

摘要： There are provided a method of inspecting and evaluating semiconductor substrates, good quality semiconductor substrates, a method of manufacturing good quality semiconductor substrates, and a method of manufacturing semiconductor devices using good quality semiconductor substrates.A semiconductor substrate is processed with aqueous basic solution. In this process, the substrate is dipped in the aqueous solution or exposed to a vapor of the aqueous solution. With this process, the surface of the substrate is selectively etched. The substrate surface after the etching process is radiated with a laser beam to measure a light scattered point density. The quality of the substrate can be judged in accordance with the measured density. A thermal treatment may be carried out before or after processing the substrate with the aqueous basic solution. The thermal treatment considerably changes the fine defect density on the surface of the substrate. In accordance with such a change, the quality of the substrate may be judged. If a substrate judged as having a good quality is used, a semiconductor device having a good quality substrate can be obtained.

摘要翻译： 提供了一种检查和评估半导体衬底，优质半导体衬底，制造优质半导体衬底的方法以及使用优质半导体衬底制造半导体器件的方法。 用碱性水溶液处理半导体衬底。 在该方法中，将基材浸渍在水溶液中或暴露于水溶液的蒸气中。 通过该工艺，选择性地蚀刻衬底的表面。 蚀刻处理后的基板表面用激光束照射以测量光散射点密度。 可以根据测量的密度来判断基板的质量。 热处理可以在用碱性水溶液处理基材之前或之后进行。 热处理显着地改变了衬底表面上的细小缺陷密度。 根据这样的变化，可以判断基板的质量。 如果使用判断为质量好的基板，则可以获得具有优质基板的半导体器件。

公开(公告)号：US20100003816A1

公开(公告)日：2010-01-07

申请号：US12585238

申请日：2009-09-09

申请人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

发明人： Makoto Honda ,  Kaori Yomogihara ,  Kazuhiro Murakami ,  Masanori Numano ,  Takahito Nagamatsu ,  Hideaki Harakawa ,  Hideto Matsuyama ,  Hirokazu Ezawa ,  Hisashi Kaneko

IPC分类号： H01L21/768

CPC分类号： H01L21/76802 ,  H01L21/02063 ,  H01L21/31116 ,  H01L21/76814

摘要： An insulating film formed on a conducting layer is dry-etched so as to make a connection hole in the insulating film to expose the conducting layer. Plasma is supplied onto the exposed conducting layer to dry-clean a damage layer produced in the connection hole. A product produced in the connection hole as a result of the dry cleaning is removed by a wet process. An oxide film formed in the connection hole as a result of the wet process is etched by a chemical dry process using a gas including either NF3 or HF. A thermally decomposable reaction product produced as a result of the etching is removed by heat treatment.

摘要翻译： 对形成在导电层上的绝缘膜进行干蚀刻，以在绝缘膜上形成连接孔，使导电层露出。 将等离子体供应到暴露的导电层上以干燥在连接孔中产生的损伤层。 作为干式清洗的连接孔中产生的产品通过湿法除去。 通过使用包括NF 3或HF的气体的化学干法，蚀刻形成在连接孔中的作为湿法处理的结果的氧化膜。 通过热处理除去作为蚀刻结果产生的可热分解的反应产物。